Type Definition efm32gg11b::eth::txpfcpause::R

type R = R<u32, TXPFCPAUSE>;

Reader of register TXPFCPAUSE

Implementations

impl R

pub fn vectorenb(&self) -> VECTORENB_R

Bits 0:7 - Priority Vector Enable. If bit 17 of the network control register is written with a one then the priority enable vector of the PFC priority based pause frame will be set equal to the value stored in this register [7:0].

pub fn vector(&self) -> VECTOR_R

Bits 8:15 - Priority Vector Pause Size. If bit 17 of the network control register is written with a one then for each entry equal to zero in the Transmit PFC Pause Register[15:8], the PFC pause frame’s pause quantum field associated with that entry will be taken from the transmit pause quantum register. For each entry equal to one in the Transmit PFC Pause Register [15:8], the pause quantum associated with that entry will be zero.