Type Definition efm32gg11b::eth::ifcr::R[][src]

type R = R<u32, IFCR>;
Expand description

Reader of register IFCR

Implementations

Bit 0 - Management frame sent

Bit 1 - Receive complete

Bit 2 - RX used bit read

Bit 3 - TX used bit read

Bit 4 - Transmit under run

Bit 5 - Retry limit exceeded or late collision

Bit 6 - Transmit frame corruption due to AMBA (AHB) error.

Bit 7 - Transmit complete

Bit 10 - Receive overrun

Bit 11 - Hresp not OK

Bit 12 - Pause frame with non-zero pause quantum received

Bit 13 - Pause Time zero

Bit 14 - Pause frame transmitted

Bit 18 - PTP delay_req frame received

Bit 19 - PTP sync frame received

Bit 20 - PTP delay_req frame transmitted

Bit 21 - PTP sync frame transmitted

Bit 22 - PTP pdelay_req frame received

Bit 23 - PTP pdelay_resp frame received

Bit 24 - PTP pdelay_req frame transmitted

Bit 25 - PTP pdelay_resp frame transmitted

Bit 26 - TSU seconds register increment

Bit 27 - Receive LPI indication status bit change

Bit 28 - WOL event received interrupt.

Bit 29 - TSU timer comparison interrupt.