Type Definition efm32gg11b::eth::ienro::W [−][src]
type W = W<u32, IENRO>;
Expand description
Writer for register IENRO
Implementations
Bit 0 - management done interrupt mask
Bit 2 - receive used bit read interrupt mask
Bit 3 - transmit used bit read interrupt mask
Bit 4 - transmit buffer under run interrupt mask
Bit 5 - Retry limit exceeded or late collision (gigabit mode only) interrupt mask
Bit 6 - Transmit frame corruption due to AMBA (AHB) error interrupt mask
Bit 10 - Receive overrun interrupt mask
Bit 11 - bresp/hresp not OK interrupt mask
Bit 12 - Pause frame with non-zero pause quantum interrupt mask
Bit 13 - pause time zero interrupt mask
Bit 18 - PTP delay_req frame received mask
Bit 19 - PTP sync frame received mask
Bit 20 - PTP delay_req frame transmitted mask
Bit 21 - PTP sync frame transmitted mask
Bit 22 - PTP pdelay_req frame received mask
Bit 23 - PTP pdelay_resp frame received mask
Bit 24 - PTP pdelay_req frame transmitted mask
Bit 25 - PTP pdelay_resp frame transmitted mask
Bit 26 - TSU seconds register increment mask
Bit 27 - RX LPI indication mask
Bit 28 - WOL event received mask
Bit 29 - TSU timer comparison interrupt mask.