Type Definition efm32gg11b::eth::dmacfg::W [−][src]
type W = W<u32, DMACFG>;
Expand description
Writer for register DMACFG
Implementations
Bits 0:4 - Selects the burst length to use on the AMBA (AHB) when transferring frame data.
Bit 5 - Enable header data Splitting.
Bits 8:9 - Receiver packet buffer memory size select.
Bit 10 - Transmitter packet buffer memory size select.
Bit 11 - Transmitter IP, TCP and UDP checksum generation offload enable
Bit 12 - Forces the DMA
Bits 16:23 - DMA receive buffer size in external AMBA (AHB) system memory.
Bit 24 - Auto Discard RX pkts during lack of resource.
Bit 25 - Force max length bursts on RX.
Bit 26 - Force max length bursts on TX.
Bit 28 - Enable RX extended BD mode.
Bit 29 - Enable TX extended BD mode.