e310x/aonclk/
lfrosccfg.rs

1#[doc = "Register `lfrosccfg` reader"]
2pub type R = crate::R<LfrosccfgSpec>;
3#[doc = "Register `lfrosccfg` writer"]
4pub type W = crate::W<LfrosccfgSpec>;
5#[doc = "Field `div` reader - "]
6pub type DivR = crate::FieldReader;
7#[doc = "Field `div` writer - "]
8pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 6>;
9#[doc = "Field `trim` reader - "]
10pub type TrimR = crate::FieldReader;
11#[doc = "Field `trim` writer - "]
12pub type TrimW<'a, REG> = crate::FieldWriter<'a, REG, 5>;
13#[doc = "Field `enable` reader - "]
14pub type EnableR = crate::BitReader;
15#[doc = "Field `enable` writer - "]
16pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ready` reader - "]
18pub type ReadyR = crate::BitReader;
19#[doc = "Field `ready` writer - "]
20pub type ReadyW<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bits 0:5"]
23    #[inline(always)]
24    pub fn div(&self) -> DivR {
25        DivR::new((self.bits & 0x3f) as u8)
26    }
27    #[doc = "Bits 16:20"]
28    #[inline(always)]
29    pub fn trim(&self) -> TrimR {
30        TrimR::new(((self.bits >> 16) & 0x1f) as u8)
31    }
32    #[doc = "Bit 30"]
33    #[inline(always)]
34    pub fn enable(&self) -> EnableR {
35        EnableR::new(((self.bits >> 30) & 1) != 0)
36    }
37    #[doc = "Bit 31"]
38    #[inline(always)]
39    pub fn ready(&self) -> ReadyR {
40        ReadyR::new(((self.bits >> 31) & 1) != 0)
41    }
42}
43impl W {
44    #[doc = "Bits 0:5"]
45    #[inline(always)]
46    pub fn div(&mut self) -> DivW<LfrosccfgSpec> {
47        DivW::new(self, 0)
48    }
49    #[doc = "Bits 16:20"]
50    #[inline(always)]
51    pub fn trim(&mut self) -> TrimW<LfrosccfgSpec> {
52        TrimW::new(self, 16)
53    }
54    #[doc = "Bit 30"]
55    #[inline(always)]
56    pub fn enable(&mut self) -> EnableW<LfrosccfgSpec> {
57        EnableW::new(self, 30)
58    }
59    #[doc = "Bit 31"]
60    #[inline(always)]
61    pub fn ready(&mut self) -> ReadyW<LfrosccfgSpec> {
62        ReadyW::new(self, 31)
63    }
64}
65#[doc = "AON Clock Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lfrosccfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lfrosccfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
66pub struct LfrosccfgSpec;
67impl crate::RegisterSpec for LfrosccfgSpec {
68    type Ux = u32;
69}
70#[doc = "`read()` method returns [`lfrosccfg::R`](R) reader structure"]
71impl crate::Readable for LfrosccfgSpec {}
72#[doc = "`write(|w| ..)` method takes [`lfrosccfg::W`](W) writer structure"]
73impl crate::Writable for LfrosccfgSpec {
74    type Safety = crate::Unsafe;
75    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
76    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
77}
78#[doc = "`reset()` method sets lfrosccfg to value 0"]
79impl crate::Resettable for LfrosccfgSpec {
80    const RESET_VALUE: u32 = 0;
81}
e310x/aonclk/lfrosccfg.rs

e310x/aonclk/
lfrosccfg.rs
