dxil-reader 0.12.0

//! A disassembler of DXIL programs: the listing `dxc -dumpbin` (dxc 1.9.2609) prints of a container, byte for byte.
//!
//! The listing is dxc's comment header (`dxcdisassembler.cpp`: the feature flags, the signature parts, the debug name
//! and hash, the pipeline state validation runtime info, and from the program's metadata its signatures, buffer
//! layouts, resource bindings, view-id state and a library's subobjects), then the program's module as LLVM 3.7 prints
//! it, with dxc's comment after each call of a DXIL operation. What the reader can't read is an error, never a listing
//! that differs from dxc's.
//!
//! ```no_run
//! # fn main() -> Result<(), dxil_reader::Error> {
//! let container = std::fs::read("shader.dxil").expect("a compiled shader");
//! print!("{}", dxil_reader::disasm::disassemble(&container)?);
//! # Ok(()) }
//! ```
//!
//! [`disassemble_with_positions`] gives the same text with, for each instruction of a function body, the line that
//! lists it and the bits of the container that store it.
mod annotate;
mod asm;
mod header;
mod layout;
#[rustfmt::skip] // written by `cargo xtask dxil-ops`, as it is
mod ops;

use crate::{Module, Result, bitstream, error, psv, rdat};

/// The listing `dxc -dumpbin` prints of a DXBC container holding a DXIL program, to the newline it ends with.
pub fn disassemble(container: &[u8]) -> Result<String> {
    Ok(listing(container)?.text)
}

/// The listing of [`disassemble`], with where each instruction of the listed module's function bodies is listed and
/// stored.
#[derive(Clone, Debug, PartialEq, Eq)]
pub struct Positioned {
    /// The listing, byte for byte the text [`disassemble`] gives.
    pub text: String,
    /// Each instruction of a function body, in listing order: the bodies as the listing defines them, each body's
    /// instructions block by block. Nothing else of the listing has an entry: not the header, globals, declarations
    /// or metadata.
    pub instructions: Vec<Listed>,
    /// The part whose module is listed: `ILDB`, the debug module, where the container has one, else `DXIL`. The two
    /// modules are stored apart, so an instruction's bits in one are not its bits in the other.
    pub part: [u8; 4],
    /// The byte of the container where that part's bitcode starts (its `BC` magic): bit `b` of [`Listed::at`] and
    /// [`Listed::end`] is bit `b % 8` of container byte `bitcode + b / 8`, counting from the least significant bit, as
    /// LLVM's bitstream does.
    pub bitcode: usize,
}

/// One instruction of a [`Positioned`] listing.
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub struct Listed {
    /// The line of the text that lists it, from 0. It is one line, but for a `switch`, whose cases and closing bracket
    /// follow on lines of their own.
    pub line: usize,
    /// The bit its record starts at in the part's bitcode: [`crate::module::Instruction::at`] of the module read from
    /// that bitcode ([`crate::module()`] of `(chunks, part)`), so an instruction is found by that value.
    pub at: usize,
    /// The bit just past its record ([`crate::bitstream::Record::end`]): the record is bits `at..end`.
    pub end: usize,
}

/// [`disassemble`]'s listing, with the line and the bits of each instruction of a function body.
pub fn disassemble_with_positions(container: &[u8]) -> Result<Positioned> {
    let l = listing(container)?;
    // each record's bits, by where it starts: an instruction is a record of a function block
    let mut records = Vec::new();
    for b in &l.blocks {
        function_records(b, &mut records);
    }
    records.sort_unstable();
    let mut instructions = Vec::with_capacity(l.marks.len());
    let (mut line, mut counted) = (0usize, 0usize);
    for mark in &l.marks {
        let before = l
            .text
            .get(counted..mark.byte)
            .ok_or_else(|| error(mark.at, "an instruction's text"))?;
        line = line.saturating_add(before.bytes().filter(|&c| c == b'\n').count());
        counted = mark.byte;
        let end = records
            .binary_search_by_key(&mark.at, |&(at, _)| at)
            .ok()
            .and_then(|i| records.get(i))
            .map(|&(_, end)| end)
            .ok_or_else(|| error(mark.at, "an instruction that is not a record of a function block"))?;
        instructions.push(Listed {
            line,
            at: mark.at,
            end,
        });
    }
    Ok(Positioned {
        text: l.text,
        instructions,
        part: l.part,
        bitcode: l.bitcode,
    })
}

/// The records of every function block in `block` and the blocks it holds, as (start bit, end bit).
fn function_records(block: &bitstream::Block, out: &mut Vec<(usize, usize)>) {
    // LLVM's FUNCTION_BLOCK_ID
    if block.id == 12 {
        out.extend(block.records().map(|r| (r.at, r.end)));
    }
    for b in block.blocks() {
        function_records(b, out);
    }
}

/// A listing and what [`disassemble_with_positions`] needs to place its instructions.
struct Listing {
    text: String,
    /// Each instruction's record bit and the byte of `text` its line starts at.
    marks: Vec<asm::Mark>,
    /// The listed module's blocks.
    blocks: Vec<bitstream::Block>,
    part: [u8; 4],
    bitcode: usize,
}

fn listing(container: &[u8]) -> Result<Listing> {
    let parts = crate::parts(container)?;
    let find = |kind: &[u8; 4]| parts.iter().find(|c| &c.kind == kind).map(|c| c.data);
    let mut s = String::new();
    if let Some(sfi0) = find(b"SFI0") {
        header::feature_info(&mut s, sfi0)?;
    }
    for (kind, name, input) in [
        (b"ISG1", "Input", true),
        (b"OSG1", "Output", false),
        (b"PSG1", "Patch Constant", false),
    ] {
        if let Some(part) = find(kind) {
            header::part_signature(&mut s, name, part, input)?;
        }
    }
    if let Some(ildn) = find(b"ILDN") {
        header::debug_name(&mut s, ildn);
    }
    if let Some(hash) = find(b"HASH") {
        header::hash(&mut s, hash)?;
    }
    // the debug module, where the container has one, is the one listed
    let (part, program) = [*b"ILDB", *b"DXIL"]
        .into_iter()
        .find_map(|kind| find(&kind).map(|data| (kind, data)))
        .ok_or_else(|| error(0, "the container has no DXIL part"))?;
    let program = crate::program(program)?;
    // the bitcode is a slice of the container's own bytes
    let bitcode = program
        .bitcode
        .as_ptr()
        .addr()
        .checked_sub(container.as_ptr().addr())
        .filter(|&b| b < container.len())
        .ok_or_else(|| error(0, "the program's bitcode outside the container"))?;
    if let Some(part) = find(b"PSV0") {
        // the shader kind is the high half of the program header's version word; dxc passes its low byte
        let kind = u8::try_from(program.program_version >> 16 & 0xFF).unwrap_or(u8::MAX);
        header::psv_runtime(&mut s, &psv::read(part)?, kind)?;
    }
    let blocks = bitstream::read(program.bitcode, *b"BC\xc0\xde")?;
    let module = Module::read(&blocks)?;
    // the STAT part's module holds the reflection the program part's may be stripped of; dxc ignores one whose header
    // it can't read
    let reflection = match find(b"STAT").map(crate::program) {
        Some(Ok(part)) => Some(read(part.bitcode)?),
        _ => None,
    };
    if module.named_metadata.iter().any(|(n, _)| n == "dx.version") {
        let kind = crate::reflection::shader_model(&module)?
            .map(|(k, _, _)| k)
            .ok_or_else(|| error(module.at, "the module has no dx.shaderModel metadata"))?;
        if kind != "lib" {
            header::dxil_signatures(&mut s, &module, &kind)?;
        }
        header::reflection_sections(&mut s, reflection.as_ref().unwrap_or(&module))?;
        let subobjects = match find(b"RDAT") {
            Some(part) => rdat::subobjects(part)?,
            None => Vec::new(),
        };
        if subobjects.is_empty() && module.named_metadata.iter().any(|(n, _)| n == "dx.subobjects") {
            return Err(error(
                module.at,
                "subobjects in dx.subobjects metadata are not supported",
            ));
        }
        header::subobjects(&mut s, &subobjects);
    }
    let marks = asm::write(&mut s, &module)?;
    // dxc's console writer ends the text with a newline of its own
    s.push('\n');
    Ok(Listing {
        text: s,
        marks,
        blocks,
        part,
        bitcode,
    })
}

/// The module part of the listing: from `target datalayout` on, the program's IR as dxc prints it.
pub fn module_text(m: &Module) -> Result<String> {
    let mut s = String::new();
    asm::write(&mut s, m)?;
    Ok(s)
}

fn read(bitcode: &[u8]) -> Result<Module> {
    Module::read(&crate::bitstream::read(bitcode, *b"BC\xc0\xde")?)
}