Struct dw1000::ll::DW1000

pub struct DW1000<SPI, CS> { /* fields omitted */ }

Entry point to the DW1000 driver’s low-level API

Please consider using hl::DW1000 instead.

Implementations

impl<SPI, CS> DW1000<SPI, CS>

pub fn new(spi: SPI, chip_select: CS) -> Self

Create a new instance of DW1000

Requires the SPI peripheral and the chip select pin that are connected to the DW1000.

pub fn cir<'a>(
    &mut self,
    start_index: u16,
    buffer: &'a mut [u8]
) -> Result<&'a mut [u8], Error<SPI, CS>> where
    SPI: Transfer<u8> + Write<u8>,
    CS: OutputPin, 

Reads the CIR accumulator.

Starts reading from the start_index and puts all results in the buffer. A slice with the CIR data is returned

NOTE: The buffer passed in must be 4 bytes bigger than the cir buffer slice you want to get back due to protocol

pub fn access_spi<F>(&mut self, f: F) where
    F: FnOnce(SPI) -> SPI, 

Allows for an access to the spi type. This can be used to change the speed.

In closure you get ownership of the SPI so you can destruct it and build it up again if necessary.

impl<SPI, CS> DW1000<SPI, CS>

pub fn dev_id(&mut self) -> RegAccessor<'_, DEV_ID, SPI, CS>

Device identifier

pub fn eui(&mut self) -> RegAccessor<'_, EUI, SPI, CS>

Extended Unique Identifier

pub fn panadr(&mut self) -> RegAccessor<'_, PANADR, SPI, CS>

PAN Identifier and Short Address

pub fn sys_cfg(&mut self) -> RegAccessor<'_, SYS_CFG, SPI, CS>

System Configuration

pub fn sys_time(&mut self) -> RegAccessor<'_, SYS_TIME, SPI, CS>

System Time Counter

pub fn tx_fctrl(&mut self) -> RegAccessor<'_, TX_FCTRL, SPI, CS>

TX Frame Control

pub fn dx_time(&mut self) -> RegAccessor<'_, DX_TIME, SPI, CS>

Delayed Send or Receive Time

pub fn sys_ctrl(&mut self) -> RegAccessor<'_, SYS_CTRL, SPI, CS>

System Control Register

pub fn sys_mask(&mut self) -> RegAccessor<'_, SYS_MASK, SPI, CS>

System Event Mask Register

pub fn sys_status(&mut self) -> RegAccessor<'_, SYS_STATUS, SPI, CS>

System Event Status Register

pub fn rx_finfo(&mut self) -> RegAccessor<'_, RX_FINFO, SPI, CS>

RX Frame Information

pub fn rx_fqual(&mut self) -> RegAccessor<'_, RX_FQUAL, SPI, CS>

Rx Frame Quality Information

pub fn rx_ttcki(&mut self) -> RegAccessor<'_, RX_TTCKI, SPI, CS>

Receiver Time Tracking Interval

pub fn rx_ttcko(&mut self) -> RegAccessor<'_, RX_TTCKO, SPI, CS>

Receiver Time Tracking Offset

pub fn rx_time(&mut self) -> RegAccessor<'_, RX_TIME, SPI, CS>

Receive Time Stamp

pub fn tx_time(&mut self) -> RegAccessor<'_, TX_TIME, SPI, CS>

Transmit Time Stamp

pub fn tx_antd(&mut self) -> RegAccessor<'_, TX_ANTD, SPI, CS>

TX Antenna Delay

pub fn sys_state(&mut self) -> RegAccessor<'_, SYS_STATE, SPI, CS>

System State information

pub fn tx_power(&mut self) -> RegAccessor<'_, TX_POWER, SPI, CS>

TX Power Control

pub fn chan_ctrl(&mut self) -> RegAccessor<'_, CHAN_CTRL, SPI, CS>

Channel Control Register

pub fn sfd_length(&mut self) -> RegAccessor<'_, SFD_LENGTH, SPI, CS>

This is the length of the SFD sequence used when the data rate is 850kbps and higher.

pub fn agc_tune1(&mut self) -> RegAccessor<'_, AGC_TUNE1, SPI, CS>

AGC Tuning register 1

pub fn agc_tune2(&mut self) -> RegAccessor<'_, AGC_TUNE2, SPI, CS>

AGC Tuning register 2

pub fn ec_ctrl(&mut self) -> RegAccessor<'_, EC_CTRL, SPI, CS>

External Clock Sync Counter Config

pub fn ec_rxtc(&mut self) -> RegAccessor<'_, EC_RXTC, SPI, CS>

External clock synchronisation counter captured on RMARKER

pub fn ec_golp(&mut self) -> RegAccessor<'_, EC_GOLP, SPI, CS>

External clock offset to first path 1 GHz counter

pub fn gpio_mode(&mut self) -> RegAccessor<'_, GPIO_MODE, SPI, CS>

GPIO Mode Control Register

pub fn gpio_dir(&mut self) -> RegAccessor<'_, GPIO_DIR, SPI, CS>

GPIO Direction Control Register

pub fn gpio_dout(&mut self) -> RegAccessor<'_, GPIO_DOUT, SPI, CS>

GPIO Data Output register

pub fn gpio_irqe(&mut self) -> RegAccessor<'_, GPIO_IRQE, SPI, CS>

GPIO Interrupt Enable

pub fn gpio_isen(&mut self) -> RegAccessor<'_, GPIO_ISEN, SPI, CS>

GPIO Interrupt Sense Selection

pub fn gpio_imode(&mut self) -> RegAccessor<'_, GPIO_IMODE, SPI, CS>

GPIO Interrupt Mode (Level / Edge)

pub fn gpio_ibes(&mut self) -> RegAccessor<'_, GPIO_IBES, SPI, CS>

GPIO Interrupt “Both Edge” Select

pub fn gpio_iclr(&mut self) -> RegAccessor<'_, GPIO_ICLR, SPI, CS>

GPIO Interrupt Latch Clear

pub fn gpio_idbe(&mut self) -> RegAccessor<'_, GPIO_IDBE, SPI, CS>

GPIO Interrupt De-bounce Enable

pub fn gpio_raw(&mut self) -> RegAccessor<'_, GPIO_RAW, SPI, CS>

GPIO raw state

pub fn drx_tune0b(&mut self) -> RegAccessor<'_, DRX_TUNE0B, SPI, CS>

Digital Tuning Register 0b

pub fn drx_tune1a(&mut self) -> RegAccessor<'_, DRX_TUNE1A, SPI, CS>

Digital Tuning Register 1a

pub fn drx_tune1b(&mut self) -> RegAccessor<'_, DRX_TUNE1B, SPI, CS>

Digital Tuning Register 1b

pub fn drx_tune2(&mut self) -> RegAccessor<'_, DRX_TUNE2, SPI, CS>

Digital Tuning Register 2

pub fn drx_sfdtoc(&mut self) -> RegAccessor<'_, DRX_SFDTOC, SPI, CS>

SFD timeout

pub fn drx_pretoc(&mut self) -> RegAccessor<'_, DRX_PRETOC, SPI, CS>

Preamble detection timeou

pub fn drx_tune4h(&mut self) -> RegAccessor<'_, DRX_TUNE4H, SPI, CS>

Digital Tuning Register 4h

pub fn dxr_car_int(&mut self) -> RegAccessor<'_, DRX_CAR_INT, SPI, CS>

Carrier Recovery Integrator Register

pub fn rxpacc_nosat(&mut self) -> RegAccessor<'_, RXPACC_NOSAT, SPI, CS>

Digital debug register. Unsaturated accumulated preamble symbols.

pub fn rf_rxctrlh(&mut self) -> RegAccessor<'_, RF_RXCTRLH, SPI, CS>

Analog RX Control Register

pub fn rf_txctrl(&mut self) -> RegAccessor<'_, RF_TXCTRL, SPI, CS>

Analog TX Control Register

pub fn rf_status(&mut self) -> RegAccessor<'_, RF_STATUS, SPI, CS>

RF Status Register

pub fn ldotune(&mut self) -> RegAccessor<'_, LDOTUNE, SPI, CS>

LDO voltage tuning parameter

pub fn tc_pgdelay(&mut self) -> RegAccessor<'_, TC_PGDELAY, SPI, CS>

Pulse Generator Delay

pub fn fs_pllcfg(&mut self) -> RegAccessor<'_, FS_PLLCFG, SPI, CS>

Frequency synth - PLL configuration

pub fn fs_plltune(&mut self) -> RegAccessor<'_, FS_PLLTUNE, SPI, CS>

Frequency synth - PLL Tuning

pub fn aon_wcfg(&mut self) -> RegAccessor<'_, AON_WCFG, SPI, CS>

AON Wakeup Configuration Register

pub fn aon_ctrl(&mut self) -> RegAccessor<'_, AON_CTRL, SPI, CS>

AON Control Register

pub fn aon_cfg0(&mut self) -> RegAccessor<'_, AON_CFG0, SPI, CS>

AON Configuration Register 0

pub fn aon_cfg1(&mut self) -> RegAccessor<'_, AON_CFG1, SPI, CS>

AON Configuration Register 1

pub fn otp_addr(&mut self) -> RegAccessor<'_, OTP_ADDR, SPI, CS>

OTP Address

pub fn otp_ctrl(&mut self) -> RegAccessor<'_, OTP_CTRL, SPI, CS>

OTP Control

pub fn otp_rdat(&mut self) -> RegAccessor<'_, OTP_RDAT, SPI, CS>

OTP Read Data

pub fn lde_cfg1(&mut self) -> RegAccessor<'_, LDE_CFG1, SPI, CS>

LDE Configuration Register 1

pub fn lde_ppindx(&mut self) -> RegAccessor<'_, LDE_PPINDX, SPI, CS>

LDE Peak Path Index

pub fn lde_ppampl(&mut self) -> RegAccessor<'_, LDE_PPAMPL, SPI, CS>

LDE Peak Path Amplitude

pub fn lde_rxantd(&mut self) -> RegAccessor<'_, LDE_RXANTD, SPI, CS>

RX Antenna Delay

pub fn lde_cfg2(&mut self) -> RegAccessor<'_, LDE_CFG2, SPI, CS>

LDE Configuration Register 2

pub fn lde_repc(&mut self) -> RegAccessor<'_, LDE_REPC, SPI, CS>

LDE Replica Coefficient configuration

pub fn evc_ctrl(&mut self) -> RegAccessor<'_, EVC_CTRL, SPI, CS>

Event Counter Control

pub fn evc_hpw(&mut self) -> RegAccessor<'_, EVC_HPW, SPI, CS>

Half Period Warning Counter

pub fn evc_tpw(&mut self) -> RegAccessor<'_, EVC_TPW, SPI, CS>

TX Power-Up Warning Counter

pub fn pmsc_ctrl0(&mut self) -> RegAccessor<'_, PMSC_CTRL0, SPI, CS>

PMSC Control Register 0

pub fn pmsc_ctrl1(&mut self) -> RegAccessor<'_, PMSC_CTRL1, SPI, CS>

PMSC Control Register 1

pub fn pmsc_ledc(&mut self) -> RegAccessor<'_, PMSC_LEDC, SPI, CS>

PMSC LED Control Register

impl<SPI, CS> DW1000<SPI, CS>

pub fn tx_buffer(&mut self) -> RegAccessor<'_, TX_BUFFER, SPI, CS>

Transmit Data Buffer

impl<SPI, CS> DW1000<SPI, CS>

pub fn rx_buffer(&mut self) -> RegAccessor<'_, RX_BUFFER, SPI, CS>

Receive Data Buffer