disc-v 0.1.3

A RISC-V disassembler
Documentation
disc-v
Copyright (c) 2026 Christopher Swenson
Licensed under the Apache License, Version 2.0; see LICENSE.

disc-v is based on the RISC-V disassembler in the Caliptra MCU emulator
(https://github.com/chipsalliance/caliptra-mcu-sw, emulator/app/src/dis.rs),
which is licensed under the Apache License, Version 2.0.

That code, and therefore disc-v, is derived from riscv-disassembler
(https://github.com/michaeljclark/riscv-disassembler), which was distributed
under the following license:

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Copyright (c) 2016-2017 Michael Clark <michaeljclark@mac.com>
Copyright (c) 2017-2018 SiFive, Inc.

Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
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The test data in tests/data/riscv-opcodes.txt and the CSR names in
src/csr.rs are derived from riscv-opcodes
(https://github.com/riscv/riscv-opcodes), Copyright (c) 2022 RISC-V
International, under the BSD 3-Clause license in
tests/data/LICENSE-riscv-opcodes.