#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"CRG_GPU registers"]
unsafe impl ::core::marker::Send for super::CrgGpu {}
unsafe impl ::core::marker::Sync for super::CrgGpu {}
impl super::CrgGpu {
#[allow(unused)]
#[inline(always)]
pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
self.ptr
}
#[inline(always)]
pub const fn clk_gpu_reg(
&self,
) -> &'static crate::common::Reg<self::ClkGpuReg_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::ClkGpuReg_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(4usize),
)
}
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ClkGpuReg_SPEC;
impl crate::sealed::RegSpec for ClkGpuReg_SPEC {
type DataType = u32;
}
pub type ClkGpuReg = crate::RegValueT<ClkGpuReg_SPEC>;
impl ClkGpuReg {
#[inline(always)]
pub fn mipi_d_phy_en(
self,
) -> crate::common::RegisterFieldBool<3, 1, 0, ClkGpuReg_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<3,1,0,ClkGpuReg_SPEC,crate::common::RW>::from_register(self,0)
}
#[inline(always)]
pub fn mipi_phy_en(
self,
) -> crate::common::RegisterFieldBool<2, 1, 0, ClkGpuReg_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<2,1,0,ClkGpuReg_SPEC,crate::common::RW>::from_register(self,0)
}
#[inline(always)]
pub fn mipi_dsi_en(
self,
) -> crate::common::RegisterFieldBool<1, 1, 0, ClkGpuReg_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<1,1,0,ClkGpuReg_SPEC,crate::common::RW>::from_register(self,0)
}
#[inline(always)]
pub fn gpu_enable(
self,
) -> crate::common::RegisterFieldBool<0, 1, 0, ClkGpuReg_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<0,1,0,ClkGpuReg_SPEC,crate::common::RW>::from_register(self,0)
}
}
impl ::core::default::Default for ClkGpuReg {
#[inline(always)]
fn default() -> ClkGpuReg {
<crate::RegValueT<ClkGpuReg_SPEC> as RegisterValue<_>>::new(0)
}
}