1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"RFMON registers"]
28unsafe impl ::core::marker::Send for super::Rfmon {}
29unsafe impl ::core::marker::Sync for super::Rfmon {}
30impl super::Rfmon {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "AHB master start address"]
38 #[inline(always)]
39 pub const fn rfmon_addr_reg(
40 &self,
41 ) -> &'static crate::common::Reg<self::RfmonAddrReg_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::RfmonAddrReg_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(4usize),
45 )
46 }
47 }
48
49 #[doc = "AHB master current address"]
50 #[inline(always)]
51 pub const fn rfmon_crv_addr_reg(
52 &self,
53 ) -> &'static crate::common::Reg<self::RfmonCrvAddrReg_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::RfmonCrvAddrReg_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(16usize),
57 )
58 }
59 }
60
61 #[doc = "The remaining data to be transferred"]
62 #[inline(always)]
63 pub const fn rfmon_crv_len_reg(
64 &self,
65 ) -> &'static crate::common::Reg<self::RfmonCrvLenReg_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::RfmonCrvLenReg_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(20usize),
69 )
70 }
71 }
72
73 #[doc = "Control register"]
74 #[inline(always)]
75 pub const fn rfmon_ctrl_reg(
76 &self,
77 ) -> &'static crate::common::Reg<self::RfmonCtrlReg_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::RfmonCtrlReg_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(0usize),
81 )
82 }
83 }
84
85 #[doc = "Data length register"]
86 #[inline(always)]
87 pub const fn rfmon_len_reg(
88 &self,
89 ) -> &'static crate::common::Reg<self::RfmonLenReg_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::RfmonLenReg_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(8usize),
93 )
94 }
95 }
96
97 #[doc = "Status register"]
98 #[inline(always)]
99 pub const fn rfmon_stat_reg(
100 &self,
101 ) -> &'static crate::common::Reg<self::RfmonStatReg_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::RfmonStatReg_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(12usize),
105 )
106 }
107 }
108}
109#[doc(hidden)]
110#[derive(Copy, Clone, Eq, PartialEq)]
111pub struct RfmonAddrReg_SPEC;
112impl crate::sealed::RegSpec for RfmonAddrReg_SPEC {
113 type DataType = u32;
114}
115
116#[doc = "AHB master start address"]
117pub type RfmonAddrReg = crate::RegValueT<RfmonAddrReg_SPEC>;
118
119impl RfmonAddrReg {
120 #[doc = "It is the bits \\[31:2\\] of base address that is used by the AHB master interface of the controller. Defines the AHB address where the controller will start storing data at. Bits \\[1:0\\] of the address are always considered to be 0."]
121 #[inline(always)]
122 pub fn rfmon_addr(
123 self,
124 ) -> crate::common::RegisterField<
125 2,
126 0x3fffffff,
127 1,
128 0,
129 u32,
130 u32,
131 RfmonAddrReg_SPEC,
132 crate::common::RW,
133 > {
134 crate::common::RegisterField::<
135 2,
136 0x3fffffff,
137 1,
138 0,
139 u32,
140 u32,
141 RfmonAddrReg_SPEC,
142 crate::common::RW,
143 >::from_register(self, 0)
144 }
145}
146impl ::core::default::Default for RfmonAddrReg {
147 #[inline(always)]
148 fn default() -> RfmonAddrReg {
149 <crate::RegValueT<RfmonAddrReg_SPEC> as RegisterValue<_>>::new(0)
150 }
151}
152
153#[doc(hidden)]
154#[derive(Copy, Clone, Eq, PartialEq)]
155pub struct RfmonCrvAddrReg_SPEC;
156impl crate::sealed::RegSpec for RfmonCrvAddrReg_SPEC {
157 type DataType = u32;
158}
159
160#[doc = "AHB master current address"]
161pub type RfmonCrvAddrReg = crate::RegValueT<RfmonCrvAddrReg_SPEC>;
162
163impl RfmonCrvAddrReg {
164 #[doc = "Bits \\[31:2\\] of AHB address that will be used by the controller in the next memory access. The bits \\[1:0\\] are always 0."]
165 #[inline(always)]
166 pub fn rfmon_crv_addr(
167 self,
168 ) -> crate::common::RegisterField<
169 2,
170 0x3fffffff,
171 1,
172 0,
173 u32,
174 u32,
175 RfmonCrvAddrReg_SPEC,
176 crate::common::R,
177 > {
178 crate::common::RegisterField::<
179 2,
180 0x3fffffff,
181 1,
182 0,
183 u32,
184 u32,
185 RfmonCrvAddrReg_SPEC,
186 crate::common::R,
187 >::from_register(self, 0)
188 }
189}
190impl ::core::default::Default for RfmonCrvAddrReg {
191 #[inline(always)]
192 fn default() -> RfmonCrvAddrReg {
193 <crate::RegValueT<RfmonCrvAddrReg_SPEC> as RegisterValue<_>>::new(0)
194 }
195}
196
197#[doc(hidden)]
198#[derive(Copy, Clone, Eq, PartialEq)]
199pub struct RfmonCrvLenReg_SPEC;
200impl crate::sealed::RegSpec for RfmonCrvLenReg_SPEC {
201 type DataType = u32;
202}
203
204#[doc = "The remaining data to be transferred"]
205pub type RfmonCrvLenReg = crate::RegValueT<RfmonCrvLenReg_SPEC>;
206
207impl RfmonCrvLenReg {
208 #[doc = "Indicates the number of words (minus 1) that remain to be transfered."]
209 #[inline(always)]
210 pub fn rfmon_crv_len(
211 self,
212 ) -> crate::common::RegisterField<
213 0,
214 0x1ffff,
215 1,
216 0,
217 u32,
218 u32,
219 RfmonCrvLenReg_SPEC,
220 crate::common::R,
221 > {
222 crate::common::RegisterField::<
223 0,
224 0x1ffff,
225 1,
226 0,
227 u32,
228 u32,
229 RfmonCrvLenReg_SPEC,
230 crate::common::R,
231 >::from_register(self, 0)
232 }
233}
234impl ::core::default::Default for RfmonCrvLenReg {
235 #[inline(always)]
236 fn default() -> RfmonCrvLenReg {
237 <crate::RegValueT<RfmonCrvLenReg_SPEC> as RegisterValue<_>>::new(0)
238 }
239}
240
241#[doc(hidden)]
242#[derive(Copy, Clone, Eq, PartialEq)]
243pub struct RfmonCtrlReg_SPEC;
244impl crate::sealed::RegSpec for RfmonCtrlReg_SPEC {
245 type DataType = u32;
246}
247
248#[doc = "Control register"]
249pub type RfmonCtrlReg = crate::RegValueT<RfmonCtrlReg_SPEC>;
250
251impl RfmonCtrlReg {
252 #[doc = "Write this bit with 1, when the required throughput for the transferring of the captured data is close to the capacity of the system bus/memory. The controller will be aggressive in the usage of the bus. The availability of the bus will be affected for the remaining masters."]
253 #[inline(always)]
254 pub fn rfmon_breq_force(
255 self,
256 ) -> crate::common::RegisterFieldBool<2, 1, 0, RfmonCtrlReg_SPEC, crate::common::RW> {
257 crate::common::RegisterFieldBool::<2,1,0,RfmonCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
258 }
259
260 #[doc = "Write with 1 to enable the circular mode. In circular mode the controller continuously writes data in to the memory until being disabled by software. Data are transferred in the circular buffer in the memory, as defined by RFMON_ADDR_REG and RFMON_LEN_REG registers. Disabling of the controller is realized by writing RFMON_PACK_EN with 0."]
261 #[inline(always)]
262 pub fn rfmon_circ_en(
263 self,
264 ) -> crate::common::RegisterFieldBool<1, 1, 0, RfmonCtrlReg_SPEC, crate::common::RW> {
265 crate::common::RegisterFieldBool::<1,1,0,RfmonCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
266 }
267
268 #[doc = "Starts capturing data from the test bus\n0 : No data captured.\n1 : Data captured.\nShould be written with 1 to start data acquisition.\nWhen the controller is not in circular mode (RFMON_CIRC_EN = 0) and after capturing a predefined number of words (RFMON_LEN), this bit will be auto cleared.\nIn circular mode (RFMON_CIRC_EN = 1) the RFMON_PACK_EN remains 1 to be cleared by software."]
269 #[inline(always)]
270 pub fn rfmon_pack_en(
271 self,
272 ) -> crate::common::RegisterFieldBool<0, 1, 0, RfmonCtrlReg_SPEC, crate::common::RW> {
273 crate::common::RegisterFieldBool::<0,1,0,RfmonCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
274 }
275}
276impl ::core::default::Default for RfmonCtrlReg {
277 #[inline(always)]
278 fn default() -> RfmonCtrlReg {
279 <crate::RegValueT<RfmonCtrlReg_SPEC> as RegisterValue<_>>::new(0)
280 }
281}
282
283#[doc(hidden)]
284#[derive(Copy, Clone, Eq, PartialEq)]
285pub struct RfmonLenReg_SPEC;
286impl crate::sealed::RegSpec for RfmonLenReg_SPEC {
287 type DataType = u32;
288}
289
290#[doc = "Data length register"]
291pub type RfmonLenReg = crate::RegValueT<RfmonLenReg_SPEC>;
292
293impl RfmonLenReg {
294 #[doc = "The number of words (minus one) that should be captured."]
295 #[inline(always)]
296 pub fn rfmon_len(
297 self,
298 ) -> crate::common::RegisterField<0, 0x1ffff, 1, 0, u32, u32, RfmonLenReg_SPEC, crate::common::RW>
299 {
300 crate::common::RegisterField::<
301 0,
302 0x1ffff,
303 1,
304 0,
305 u32,
306 u32,
307 RfmonLenReg_SPEC,
308 crate::common::RW,
309 >::from_register(self, 0)
310 }
311}
312impl ::core::default::Default for RfmonLenReg {
313 #[inline(always)]
314 fn default() -> RfmonLenReg {
315 <crate::RegValueT<RfmonLenReg_SPEC> as RegisterValue<_>>::new(0)
316 }
317}
318
319#[doc(hidden)]
320#[derive(Copy, Clone, Eq, PartialEq)]
321pub struct RfmonStatReg_SPEC;
322impl crate::sealed::RegSpec for RfmonStatReg_SPEC {
323 type DataType = u32;
324}
325
326#[doc = "Status register"]
327pub type RfmonStatReg = crate::RegValueT<RfmonStatReg_SPEC>;
328
329impl RfmonStatReg {
330 #[doc = "Indicates that during transfer of data, at least one overflow has been detected.\n0 : The transfer completed without overflows.\n1 : At least one overflow occured in the fifo.\nWrite 1 to clear this bit."]
331 #[inline(always)]
332 pub fn rfmon_oflow_stk(
333 self,
334 ) -> crate::common::RegisterFieldBool<1, 1, 0, RfmonStatReg_SPEC, crate::common::RW> {
335 crate::common::RegisterFieldBool::<1,1,0,RfmonStatReg_SPEC,crate::common::RW>::from_register(self,0)
336 }
337
338 #[doc = "Indicates the state of the controller.\n0 : The controller is idle.\n1 : The controller is active. The capturing process and/or the dma activity is in progress.\nThe controller will be activated (RFMON_ACTIVE == 1), when RFMON_PACK_EN will be written with 1. Will return to inactive state, after the end of the capturing process (RFMON_PACK_EN==0) and the completion of the transfer of all data to memory."]
339 #[inline(always)]
340 pub fn rfmon_active(
341 self,
342 ) -> crate::common::RegisterFieldBool<0, 1, 0, RfmonStatReg_SPEC, crate::common::R> {
343 crate::common::RegisterFieldBool::<0,1,0,RfmonStatReg_SPEC,crate::common::R>::from_register(self,0)
344 }
345}
346impl ::core::default::Default for RfmonStatReg {
347 #[inline(always)]
348 fn default() -> RfmonStatReg {
349 <crate::RegValueT<RfmonStatReg_SPEC> as RegisterValue<_>>::new(0)
350 }
351}