da14697_pac/
crg_sys.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:38 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"CRG_SYS registers"]
28unsafe impl ::core::marker::Send for super::CrgSys {}
29unsafe impl ::core::marker::Sync for super::CrgSys {}
30impl super::CrgSys {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[inline(always)]
38    pub const fn batcheck_reg(
39        &self,
40    ) -> &'static crate::common::Reg<self::BatcheckReg_SPEC, crate::common::RW> {
41        unsafe {
42            crate::common::Reg::<self::BatcheckReg_SPEC, crate::common::RW>::from_ptr(
43                self._svd2pac_as_ptr().add(4usize),
44            )
45        }
46    }
47
48    #[doc = "Peripheral divider register"]
49    #[inline(always)]
50    pub const fn clk_sys_reg(
51        &self,
52    ) -> &'static crate::common::Reg<self::ClkSysReg_SPEC, crate::common::RW> {
53        unsafe {
54            crate::common::Reg::<self::ClkSysReg_SPEC, crate::common::RW>::from_ptr(
55                self._svd2pac_as_ptr().add(0usize),
56            )
57        }
58    }
59}
60#[doc(hidden)]
61#[derive(Copy, Clone, Eq, PartialEq)]
62pub struct BatcheckReg_SPEC;
63impl crate::sealed::RegSpec for BatcheckReg_SPEC {
64    type DataType = u32;
65}
66
67pub type BatcheckReg = crate::RegValueT<BatcheckReg_SPEC>;
68
69impl BatcheckReg {
70    #[doc = "Enable a current load on the battery."]
71    #[inline(always)]
72    pub fn batcheck_load_enable(
73        self,
74    ) -> crate::common::RegisterFieldBool<7, 1, 0, BatcheckReg_SPEC, crate::common::RW> {
75        crate::common::RegisterFieldBool::<7,1,0,BatcheckReg_SPEC,crate::common::RW>::from_register(self,0)
76    }
77
78    #[doc = "Set the current load to (ILOAD+1) mA."]
79    #[inline(always)]
80    pub fn batcheck_iload(
81        self,
82    ) -> crate::common::RegisterField<4, 0x7, 1, 0, u8, u8, BatcheckReg_SPEC, crate::common::RW>
83    {
84        crate::common::RegisterField::<4,0x7,1,0,u8,u8,BatcheckReg_SPEC,crate::common::RW>::from_register(self,0)
85    }
86
87    #[doc = "Trim the current load with steps of 2.7 percent from -19.1 percent to +19.1 percent.\n0: +0.0 percent , 8: -0 percent\n1: +2.7 percent , 9: -2.7 percent\n2: +5.5 percent , 10: -5.5 percent\n3: +8.2 percent , 11: -8.2 percent\n4: +10.9 percent , 12: -10.9 percent\n5: +13.6 percent , 13: -13.6 percent\n6: +16.4 percent , 14: -16.4 percent\n7: +19.1 percent , 15: -19.1 percent"]
88    #[inline(always)]
89    pub fn batcheck_trim(
90        self,
91    ) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, BatcheckReg_SPEC, crate::common::RW>
92    {
93        crate::common::RegisterField::<0,0xf,1,0,u8,u8,BatcheckReg_SPEC,crate::common::RW>::from_register(self,0)
94    }
95}
96impl ::core::default::Default for BatcheckReg {
97    #[inline(always)]
98    fn default() -> BatcheckReg {
99        <crate::RegValueT<BatcheckReg_SPEC> as RegisterValue<_>>::new(0)
100    }
101}
102
103#[doc(hidden)]
104#[derive(Copy, Clone, Eq, PartialEq)]
105pub struct ClkSysReg_SPEC;
106impl crate::sealed::RegSpec for ClkSysReg_SPEC {
107    type DataType = u32;
108}
109
110#[doc = "Peripheral divider register"]
111pub type ClkSysReg = crate::RegValueT<ClkSysReg_SPEC>;
112
113impl ClkSysReg {
114    #[doc = "Enables the clocks for the charger FSM block"]
115    #[inline(always)]
116    pub fn clk_chg_en(
117        self,
118    ) -> crate::common::RegisterFieldBool<5, 1, 0, ClkSysReg_SPEC, crate::common::RW> {
119        crate::common::RegisterFieldBool::<5,1,0,ClkSysReg_SPEC,crate::common::RW>::from_register(self,0)
120    }
121
122    #[doc = "Generates a SW reset towards the LCD controller."]
123    #[inline(always)]
124    pub fn lcd_reset_req(
125        self,
126    ) -> crate::common::RegisterFieldBool<4, 1, 0, ClkSysReg_SPEC, crate::common::RW> {
127        crate::common::RegisterFieldBool::<4,1,0,ClkSysReg_SPEC,crate::common::RW>::from_register(self,0)
128    }
129
130    #[doc = "Selects the clock source\n1 = DIV1 clock\n0 = DIVN clock"]
131    #[inline(always)]
132    pub fn lcd_clk_sel(
133        self,
134    ) -> crate::common::RegisterFieldBool<1, 1, 0, ClkSysReg_SPEC, crate::common::RW> {
135        crate::common::RegisterFieldBool::<1,1,0,ClkSysReg_SPEC,crate::common::RW>::from_register(self,0)
136    }
137
138    #[doc = "Enables the clock"]
139    #[inline(always)]
140    pub fn lcd_enable(
141        self,
142    ) -> crate::common::RegisterFieldBool<0, 1, 0, ClkSysReg_SPEC, crate::common::RW> {
143        crate::common::RegisterFieldBool::<0,1,0,ClkSysReg_SPEC,crate::common::RW>::from_register(self,0)
144    }
145}
146impl ::core::default::Default for ClkSysReg {
147    #[inline(always)]
148    fn default() -> ClkSysReg {
149        <crate::RegValueT<ClkSysReg_SPEC> as RegisterValue<_>>::new(0)
150    }
151}
da14697_pac/crg_sys.rs

da14697_pac/
crg_sys.rs
