da14697_pac/
sdadc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:38 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SDADC registers"]
28unsafe impl ::core::marker::Send for super::Sdadc {}
29unsafe impl ::core::marker::Sync for super::Sdadc {}
30impl super::Sdadc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Sigma Delta ADC Clear Interrupt Register"]
38    #[inline(always)]
39    pub const fn sdadc_clear_int_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::SdadcClearIntReg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::SdadcClearIntReg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(20usize),
45            )
46        }
47    }
48
49    #[doc = "Sigma Delta ADC Control Register"]
50    #[inline(always)]
51    pub const fn sdadc_ctrl_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::SdadcCtrlReg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::SdadcCtrlReg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(0usize),
57            )
58        }
59    }
60
61    #[doc = "Sigma Delta ADC Gain Correction Register"]
62    #[inline(always)]
63    pub const fn sdadc_gain_corr_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::SdadcGainCorrReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::SdadcGainCorrReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(12usize),
69            )
70        }
71    }
72
73    #[doc = "Sigma Delta ADC Offset Correction Register"]
74    #[inline(always)]
75    pub const fn sdadc_offs_corr_reg(
76        &self,
77    ) -> &'static crate::common::Reg<self::SdadcOffsCorrReg_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::SdadcOffsCorrReg_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(16usize),
81            )
82        }
83    }
84
85    #[doc = "Sigma Delta ADC Result Register"]
86    #[inline(always)]
87    pub const fn sdadc_result_reg(
88        &self,
89    ) -> &'static crate::common::Reg<self::SdadcResultReg_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::SdadcResultReg_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(24usize),
93            )
94        }
95    }
96}
97#[doc(hidden)]
98#[derive(Copy, Clone, Eq, PartialEq)]
99pub struct SdadcClearIntReg_SPEC;
100impl crate::sealed::RegSpec for SdadcClearIntReg_SPEC {
101    type DataType = u32;
102}
103
104#[doc = "Sigma Delta ADC Clear Interrupt Register"]
105pub type SdadcClearIntReg = crate::RegValueT<SdadcClearIntReg_SPEC>;
106
107impl SdadcClearIntReg {
108    #[doc = "Writing any value to this register will clear the ADC_INT interrupt. Reading returns 0."]
109    #[inline(always)]
110    pub fn sdadc_clr_int(
111        self,
112    ) -> crate::common::RegisterField<
113        0,
114        0xffff,
115        1,
116        0,
117        u16,
118        u16,
119        SdadcClearIntReg_SPEC,
120        crate::common::W,
121    > {
122        crate::common::RegisterField::<
123            0,
124            0xffff,
125            1,
126            0,
127            u16,
128            u16,
129            SdadcClearIntReg_SPEC,
130            crate::common::W,
131        >::from_register(self, 0)
132    }
133}
134impl ::core::default::Default for SdadcClearIntReg {
135    #[inline(always)]
136    fn default() -> SdadcClearIntReg {
137        <crate::RegValueT<SdadcClearIntReg_SPEC> as RegisterValue<_>>::new(0)
138    }
139}
140
141#[doc(hidden)]
142#[derive(Copy, Clone, Eq, PartialEq)]
143pub struct SdadcCtrlReg_SPEC;
144impl crate::sealed::RegSpec for SdadcCtrlReg_SPEC {
145    type DataType = u32;
146}
147
148#[doc = "Sigma Delta ADC Control Register"]
149pub type SdadcCtrlReg = crate::RegValueT<SdadcCtrlReg_SPEC>;
150
151impl SdadcCtrlReg {
152    #[doc = "0: DMA functionality disabled\n1: DMA functionality enabled"]
153    #[inline(always)]
154    pub fn sdadc_dma_en(
155        self,
156    ) -> crate::common::RegisterFieldBool<17, 1, 0, SdadcCtrlReg_SPEC, crate::common::RW> {
157        crate::common::RegisterFieldBool::<17,1,0,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
158    }
159
160    #[doc = "0: Disable (mask) SDADC_ADC_INT.\n1: Enable SDADC_ADC_INT to ICU."]
161    #[inline(always)]
162    pub fn sdadc_mint(
163        self,
164    ) -> crate::common::RegisterFieldBool<16, 1, 0, SdadcCtrlReg_SPEC, crate::common::RW> {
165        crate::common::RegisterFieldBool::<16,1,0,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
166    }
167
168    #[doc = "1: AD conversion ready and has generated an interrupt. Must be cleared by writing any value to SDADC_CLEAR_INT_REG."]
169    #[inline(always)]
170    pub fn sdadc_int(
171        self,
172    ) -> crate::common::RegisterFieldBool<15, 1, 0, SdadcCtrlReg_SPEC, crate::common::R> {
173        crate::common::RegisterFieldBool::<15,1,0,SdadcCtrlReg_SPEC,crate::common::R>::from_register(self,0)
174    }
175
176    #[doc = "1: Internal LDO is ready for use"]
177    #[inline(always)]
178    pub fn sdadc_ldo_ok(
179        self,
180    ) -> crate::common::RegisterFieldBool<14, 1, 0, SdadcCtrlReg_SPEC, crate::common::R> {
181        crate::common::RegisterFieldBool::<14,1,0,SdadcCtrlReg_SPEC,crate::common::R>::from_register(self,0)
182    }
183
184    #[doc = "0: Internal bandgap reference.\n1: External reference."]
185    #[inline(always)]
186    pub fn sdadc_vref_sel(
187        self,
188    ) -> crate::common::RegisterFieldBool<13, 1, 0, SdadcCtrlReg_SPEC, crate::common::RW> {
189        crate::common::RegisterFieldBool::<13,1,0,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
190    }
191
192    #[doc = "0: Manual ADC mode, a single result will be generated after setting the SDADC_START bit.\n1: Continuous ADC mode, new ADC results will be constantly stored in SDADC_RESULT_REG. Still SDADC_START has to be set to start the execution. Wait for SDADC_START to become zero after clearing the SDADC_CONT bit to stop the continuous mode."]
193    #[inline(always)]
194    pub fn sdadc_cont(
195        self,
196    ) -> crate::common::RegisterFieldBool<12, 1, 0, SdadcCtrlReg_SPEC, crate::common::RW> {
197        crate::common::RegisterFieldBool::<12,1,0,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
198    }
199
200    #[doc = "Oversample Rate\n0: 128x\n1: 256x\n2: 512x\n3: 1024x"]
201    #[inline(always)]
202    pub fn sdadc_osr(
203        self,
204    ) -> crate::common::RegisterField<10, 0x3, 1, 0, u8, u8, SdadcCtrlReg_SPEC, crate::common::RW>
205    {
206        crate::common::RegisterField::<10,0x3,1,0,u8,u8,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
207    }
208
209    #[doc = "0: Differential mode\n1: Single ended mode (Input selection negative side is ignored)"]
210    #[inline(always)]
211    pub fn sdadc_se(
212        self,
213    ) -> crate::common::RegisterFieldBool<9, 1, 0, SdadcCtrlReg_SPEC, crate::common::RW> {
214        crate::common::RegisterFieldBool::<9,1,0,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
215    }
216
217    #[doc = "Input selection of negative side.\n0: ADC0 / P1\\[09\\]\n1: ADC1 / P0\\[25\\]\n2: ADC2 / P0\\[08\\]\n3: ADC3 / P0\\[09\\]\n4: ADC4 / P1\\[14\\]\n5: ADC5 / P1\\[20\\]\n6: ADC6 / P1\\[21\\]\n7: ADC7 / P1\\[22\\]"]
218    #[inline(always)]
219    pub fn sdadc_inn_sel(
220        self,
221    ) -> crate::common::RegisterField<6, 0x7, 1, 0, u8, u8, SdadcCtrlReg_SPEC, crate::common::RW>
222    {
223        crate::common::RegisterField::<6,0x7,1,0,u8,u8,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
224    }
225
226    #[doc = "Input selection of positive side.\n0: ADC0 / P1\\[09\\]\n1: ADC1 / P0\\[25\\]\n2: ADC2 / P0\\[08\\]\n3: ADC3 / P0\\[09\\]\n4: ADC4 / P1\\[14\\]\n5: ADC5 / P1\\[20\\]\n6: ADC6 / P1\\[21\\]\n7: ADC7 / P1\\[22\\]\n8: VBAT (via 4x attenuator, INN connected to ground)"]
227    #[inline(always)]
228    pub fn sdadc_inp_sel(
229        self,
230    ) -> crate::common::RegisterField<2, 0xf, 1, 0, u8, u8, SdadcCtrlReg_SPEC, crate::common::RW>
231    {
232        crate::common::RegisterField::<2,0xf,1,0,u8,u8,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
233    }
234
235    #[doc = "0: ADC conversion ready.\n1: If a 1 is written, the ADC starts a conversion. After the conversion this bit will be set to 0 and the SDADC_INT bit will be set. It is not allowed to write this bit while it is not (yet) zero."]
236    #[inline(always)]
237    pub fn sdadc_start(
238        self,
239    ) -> crate::common::RegisterFieldBool<1, 1, 0, SdadcCtrlReg_SPEC, crate::common::RW> {
240        crate::common::RegisterFieldBool::<1,1,0,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
241    }
242
243    #[doc = "0: LDO is off and ADC is disabled.\n1: LDO, bias currents and modulator are enabled."]
244    #[inline(always)]
245    pub fn sdadc_en(
246        self,
247    ) -> crate::common::RegisterFieldBool<0, 1, 0, SdadcCtrlReg_SPEC, crate::common::RW> {
248        crate::common::RegisterFieldBool::<0,1,0,SdadcCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
249    }
250}
251impl ::core::default::Default for SdadcCtrlReg {
252    #[inline(always)]
253    fn default() -> SdadcCtrlReg {
254        <crate::RegValueT<SdadcCtrlReg_SPEC> as RegisterValue<_>>::new(0)
255    }
256}
257
258#[doc(hidden)]
259#[derive(Copy, Clone, Eq, PartialEq)]
260pub struct SdadcGainCorrReg_SPEC;
261impl crate::sealed::RegSpec for SdadcGainCorrReg_SPEC {
262    type DataType = u32;
263}
264
265#[doc = "Sigma Delta ADC Gain Correction Register"]
266pub type SdadcGainCorrReg = crate::RegValueT<SdadcGainCorrReg_SPEC>;
267
268impl SdadcGainCorrReg {
269    #[doc = "Gain adjust"]
270    #[inline(always)]
271    pub fn sdadc_gain_corr(
272        self,
273    ) -> crate::common::RegisterField<
274        0,
275        0x3ff,
276        1,
277        0,
278        u16,
279        u16,
280        SdadcGainCorrReg_SPEC,
281        crate::common::RW,
282    > {
283        crate::common::RegisterField::<
284            0,
285            0x3ff,
286            1,
287            0,
288            u16,
289            u16,
290            SdadcGainCorrReg_SPEC,
291            crate::common::RW,
292        >::from_register(self, 0)
293    }
294}
295impl ::core::default::Default for SdadcGainCorrReg {
296    #[inline(always)]
297    fn default() -> SdadcGainCorrReg {
298        <crate::RegValueT<SdadcGainCorrReg_SPEC> as RegisterValue<_>>::new(0)
299    }
300}
301
302#[doc(hidden)]
303#[derive(Copy, Clone, Eq, PartialEq)]
304pub struct SdadcOffsCorrReg_SPEC;
305impl crate::sealed::RegSpec for SdadcOffsCorrReg_SPEC {
306    type DataType = u32;
307}
308
309#[doc = "Sigma Delta ADC Offset Correction Register"]
310pub type SdadcOffsCorrReg = crate::RegValueT<SdadcOffsCorrReg_SPEC>;
311
312impl SdadcOffsCorrReg {
313    #[doc = "Offset adjust"]
314    #[inline(always)]
315    pub fn sdadc_offs_corr(
316        self,
317    ) -> crate::common::RegisterField<
318        0,
319        0x3ff,
320        1,
321        0,
322        u16,
323        u16,
324        SdadcOffsCorrReg_SPEC,
325        crate::common::RW,
326    > {
327        crate::common::RegisterField::<
328            0,
329            0x3ff,
330            1,
331            0,
332            u16,
333            u16,
334            SdadcOffsCorrReg_SPEC,
335            crate::common::RW,
336        >::from_register(self, 0)
337    }
338}
339impl ::core::default::Default for SdadcOffsCorrReg {
340    #[inline(always)]
341    fn default() -> SdadcOffsCorrReg {
342        <crate::RegValueT<SdadcOffsCorrReg_SPEC> as RegisterValue<_>>::new(0)
343    }
344}
345
346#[doc(hidden)]
347#[derive(Copy, Clone, Eq, PartialEq)]
348pub struct SdadcResultReg_SPEC;
349impl crate::sealed::RegSpec for SdadcResultReg_SPEC {
350    type DataType = u32;
351}
352
353#[doc = "Sigma Delta ADC Result Register"]
354pub type SdadcResultReg = crate::RegValueT<SdadcResultReg_SPEC>;
355
356impl SdadcResultReg {
357    #[doc = "Returns up to 16 bits linear value of the last AD conversion. The effective resolution depends on the OSR used."]
358    #[inline(always)]
359    pub fn sdadc_val(
360        self,
361    ) -> crate::common::RegisterField<
362        0,
363        0xffff,
364        1,
365        0,
366        u16,
367        u16,
368        SdadcResultReg_SPEC,
369        crate::common::R,
370    > {
371        crate::common::RegisterField::<
372            0,
373            0xffff,
374            1,
375            0,
376            u16,
377            u16,
378            SdadcResultReg_SPEC,
379            crate::common::R,
380        >::from_register(self, 0)
381    }
382}
383impl ::core::default::Default for SdadcResultReg {
384    #[inline(always)]
385    fn default() -> SdadcResultReg {
386        <crate::RegValueT<SdadcResultReg_SPEC> as RegisterValue<_>>::new(0)
387    }
388}
da14697_pac/sdadc.rs

da14697_pac/
sdadc.rs
