da14697_pac/
snc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:38 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"SNC registers"]
28unsafe impl ::core::marker::Send for super::Snc {}
29unsafe impl ::core::marker::Sync for super::Snc {}
30impl super::Snc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Sensor Node Control Register"]
38    #[inline(always)]
39    pub const fn snc_ctrl_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::SncCtrlReg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::SncCtrlReg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(0usize),
45            )
46        }
47    }
48
49    #[doc = "Sensor Node Low-Power Timer Register"]
50    #[inline(always)]
51    pub const fn snc_lp_timer_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::SncLpTimerReg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::SncLpTimerReg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(8usize),
57            )
58        }
59    }
60
61    #[doc = "Sensor Node Program Counter"]
62    #[inline(always)]
63    pub const fn snc_pc_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::SncPcReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::SncPcReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(12usize),
69            )
70        }
71    }
72
73    #[doc = "Sensor Node core - Operand 1 Register"]
74    #[inline(always)]
75    pub const fn snc_r1_reg(
76        &self,
77    ) -> &'static crate::common::Reg<self::SncR1Reg_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::SncR1Reg_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(16usize),
81            )
82        }
83    }
84
85    #[doc = "Sensor Node core - Operand 2 Register"]
86    #[inline(always)]
87    pub const fn snc_r2_reg(
88        &self,
89    ) -> &'static crate::common::Reg<self::SncR2Reg_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::SncR2Reg_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(20usize),
93            )
94        }
95    }
96
97    #[doc = "Sensor Node Status Register"]
98    #[inline(always)]
99    pub const fn snc_status_reg(
100        &self,
101    ) -> &'static crate::common::Reg<self::SncStatusReg_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::SncStatusReg_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(4usize),
105            )
106        }
107    }
108
109    #[doc = "Sensor Node core - Temporary Register 1"]
110    #[inline(always)]
111    pub const fn snc_tmp1_reg(
112        &self,
113    ) -> &'static crate::common::Reg<self::SncTmp1Reg_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::SncTmp1Reg_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(24usize),
117            )
118        }
119    }
120
121    #[doc = "Sensor Node core - Temporary Register 2"]
122    #[inline(always)]
123    pub const fn snc_tmp2_reg(
124        &self,
125    ) -> &'static crate::common::Reg<self::SncTmp2Reg_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::SncTmp2Reg_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(28usize),
129            )
130        }
131    }
132}
133#[doc(hidden)]
134#[derive(Copy, Clone, Eq, PartialEq)]
135pub struct SncCtrlReg_SPEC;
136impl crate::sealed::RegSpec for SncCtrlReg_SPEC {
137    type DataType = u32;
138}
139
140#[doc = "Sensor Node Control Register"]
141pub type SncCtrlReg = crate::RegValueT<SncCtrlReg_SPEC>;
142
143impl SncCtrlReg {
144    #[doc = "When set, the specific bit-field auto-clears the SNC_IRQ_EN field, if the latter is already set. By this way, the IRQ line towards either the CM33 and/or the PDC is cleared. Hence, the CM33 should set this bit-field as soon as it captures the interrupt from the Sensor Node.\nNote: Any SW writes to this bit-field will be discarded if the SNC_IRQ_EN bit-field is not set. It is finally noted that the SNC_IRQ_ACK bit-field is also auto-clear and it is de-asserted together with SNC_IRQ_EN."]
145    #[inline(always)]
146    pub fn snc_irq_ack(
147        self,
148    ) -> crate::common::RegisterFieldBool<8, 1, 0, SncCtrlReg_SPEC, crate::common::RW> {
149        crate::common::RegisterFieldBool::<8,1,0,SncCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
150    }
151
152    #[doc = "The specific bit-field determines if the IRQ line of the Sensor Node will be routed towards either the host processor (CM33) or the Power Domains Controller (PDC), or to both of them, according to the following configuration:\n0x0 = Neither the CM33 nor the PDC are triggered, both IRQ lines are low regardless of the value of SNC_IRQ_EN bit-field.\n0x1 = CM33 should be triggered, provided that SNC_IRQ_EN is set\n0x2 = PDC should be triggered, provided that SNC_IRQ_EN is set\n0x3 = Both CM33 and PDC should be triggered, provided that SNC_IRQ_EN is set\nNote: It must be noted that the specific bit-field is locked after set the SNC_IRQ_EN field of the same register. Hence, the SNC IRQ configuration cannot be changed after the IRQ bit-field is set and before the IRQ is acknowledged (by CM33). It is also noted that after having set SNC_IRQ_EN via SW, the specific bit-field can be de-asserted only by setting the SNC_IRQ_ACK bit-field (see also the description of this bit-field, also residing in SNC_CTRL_REG)."]
153    #[inline(always)]
154    pub fn snc_irq_config(
155        self,
156    ) -> crate::common::RegisterField<6, 0x3, 1, 0, u8, u8, SncCtrlReg_SPEC, crate::common::RW>
157    {
158        crate::common::RegisterField::<6,0x3,1,0,u8,u8,SncCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
159    }
160
161    #[doc = "When set, the specific bit-field may generate a (level-sensitive) IRQ to trigger either the host processor (CM33) or the Power Domains Controller (PDC) or both, depending on the configuration set in the SNC_IRQ_CONFIG bit-field of SNC_CTRL_REG. As soon as the SNC_IRQ_EN is set, it can be cleared only by setting the SNC_IRQ_ACK bit-field."]
162    #[inline(always)]
163    pub fn snc_irq_en(
164        self,
165    ) -> crate::common::RegisterFieldBool<5, 1, 0, SncCtrlReg_SPEC, crate::common::RW> {
166        crate::common::RegisterFieldBool::<5,1,0,SncCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
167    }
168
169    #[doc = "When set, it clears the value of the counter used in the Sensor Node\'s branch command (COBR), when performing an iterative branch of up to 128 times. This bit-field is auto-cleared with the next SNC clock."]
170    #[inline(always)]
171    pub fn snc_branch_loop_init(
172        self,
173    ) -> crate::common::RegisterFieldBool<4, 1, 0, SncCtrlReg_SPEC, crate::common::RW> {
174        crate::common::RegisterFieldBool::<4,1,0,SncCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
175    }
176
177    #[doc = "This is the Sensor Node Controller\'s synchronous clear bit-field. When set, it resets the state of the Sensor Node Controller and sets back its program counter (SNC_PC_REG) to the programmed base address, as determined by SNC_BASE_REG register (located in memory controller). This bit-field is auto-cleared with the next SNC clock.\nNote: Setting this bit-field may interrupt the Sensor Node\'s regular execution and any command currently being exeucuted may be abnormally terminated."]
178    #[inline(always)]
179    pub fn snc_reset(
180        self,
181    ) -> crate::common::RegisterFieldBool<3, 1, 0, SncCtrlReg_SPEC, crate::common::RW> {
182        crate::common::RegisterFieldBool::<3,1,0,SncCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
183    }
184
185    #[doc = "When set, it enables the detection of system bus errors that may occur in case a non-mapped address is used by the Sensor Node controller, when performing a register access.\nNote: In case of a bus error detection, the Sensor Node will set to \'1\' the BUS_ERROR_STATUS bit-field of SNC_STATUS_REG and will continue normally to the next command."]
186    #[inline(always)]
187    pub fn bus_error_detect_en(
188        self,
189    ) -> crate::common::RegisterFieldBool<2, 1, 0, SncCtrlReg_SPEC, crate::common::RW> {
190        crate::common::RegisterFieldBool::<2,1,0,SncCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
191    }
192
193    #[doc = "When set, this bit-field bypasses the enable of Sensor Node that comes from the PDC. In this mode, the Sensor Node can be started and stopped via the SNC_EN bit-field of SNC_CTRL_REG.\nNote: This mode is suggested to be used for debugging purposes. Älso, the base address of the Sensor Node should have been programmed to the target value, before this bit-field is set."]
194    #[inline(always)]
195    pub fn snc_sw_ctrl(
196        self,
197    ) -> crate::common::RegisterFieldBool<1, 1, 0, SncCtrlReg_SPEC, crate::common::RW> {
198        crate::common::RegisterFieldBool::<1,1,0,SncCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
199    }
200
201    #[doc = "Sensor Node Controller\'s enable bit-field. When set, it may activate the Sensor Node, provided that the SNC_SW_CTRL bit-field is also set. If not, then the specific bit-field is not effective and Sensor Node\'s actual enable is controller by the Power Domains Controller (PDC).\nNote: When SNC_SW_CTRL bit-field is set, the Sensor Node is controlled by the user. Thus, in that mode, it can be started and stopped by setting and resetting the SNC_EN field. When SNC_EN is reset, the Sensor Node will first complete the last on-going command before being halted."]
202    #[inline(always)]
203    pub fn snc_en(
204        self,
205    ) -> crate::common::RegisterFieldBool<0, 1, 0, SncCtrlReg_SPEC, crate::common::RW> {
206        crate::common::RegisterFieldBool::<0,1,0,SncCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
207    }
208}
209impl ::core::default::Default for SncCtrlReg {
210    #[inline(always)]
211    fn default() -> SncCtrlReg {
212        <crate::RegValueT<SncCtrlReg_SPEC> as RegisterValue<_>>::new(0)
213    }
214}
215
216#[doc(hidden)]
217#[derive(Copy, Clone, Eq, PartialEq)]
218pub struct SncLpTimerReg_SPEC;
219impl crate::sealed::RegSpec for SncLpTimerReg_SPEC {
220    type DataType = u32;
221}
222
223#[doc = "Sensor Node Low-Power Timer Register"]
224pub type SncLpTimerReg = crate::RegValueT<SncLpTimerReg_SPEC>;
225
226impl SncLpTimerReg {
227    #[doc = "This bit-field returns the current value of the Sensor Node\'s 8-bit timer, running with the low-power clock and may be used for debugging purposes. The specific timer is used to implement a delay of up to 256 ticks of the low-power clock."]
228    #[inline(always)]
229    pub fn lp_timer(
230        self,
231    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, SncLpTimerReg_SPEC, crate::common::R>
232    {
233        crate::common::RegisterField::<0,0xff,1,0,u8,u8,SncLpTimerReg_SPEC,crate::common::R>::from_register(self,0)
234    }
235}
236impl ::core::default::Default for SncLpTimerReg {
237    #[inline(always)]
238    fn default() -> SncLpTimerReg {
239        <crate::RegValueT<SncLpTimerReg_SPEC> as RegisterValue<_>>::new(0)
240    }
241}
242
243#[doc(hidden)]
244#[derive(Copy, Clone, Eq, PartialEq)]
245pub struct SncPcReg_SPEC;
246impl crate::sealed::RegSpec for SncPcReg_SPEC {
247    type DataType = u32;
248}
249
250#[doc = "Sensor Node Program Counter"]
251pub type SncPcReg = crate::RegValueT<SncPcReg_SPEC>;
252
253impl SncPcReg {
254    #[doc = "This bit-field returns the Sensor Node\'s program counter bits \\[18:2\\], which at the same time is the program counter\'s offset from the starting address of SYSRAM (0x20.000.000), and it is can be set by the user, as soon as Sensor Node has been stopped.\nThe 13 MSBs of the program counter are tied to \'0x400\', since the Sensor Node always executes from SYSRAM, while its 2 LSBs are always tied to \'0\', since memory accesses are always of 32-bit.\nNOTE: The Sensor Node can be stopped by clearing the SNC_EN bit-field of SNC_CTRL_REG and provided that the Power Domains Controller (PDC) is bypassed. The latter can be done by setting to \'1\' the SNC_SW_CTRL bit-field of SNC_CTRL_REG."]
255    #[inline(always)]
256    pub fn pc_reg(
257        self,
258    ) -> crate::common::RegisterField<2, 0x1ffff, 1, 0, u32, u32, SncPcReg_SPEC, crate::common::RW>
259    {
260        crate::common::RegisterField::<2,0x1ffff,1,0,u32,u32,SncPcReg_SPEC,crate::common::RW>::from_register(self,0)
261    }
262}
263impl ::core::default::Default for SncPcReg {
264    #[inline(always)]
265    fn default() -> SncPcReg {
266        <crate::RegValueT<SncPcReg_SPEC> as RegisterValue<_>>::new(536870912)
267    }
268}
269
270#[doc(hidden)]
271#[derive(Copy, Clone, Eq, PartialEq)]
272pub struct SncR1Reg_SPEC;
273impl crate::sealed::RegSpec for SncR1Reg_SPEC {
274    type DataType = u32;
275}
276
277#[doc = "Sensor Node core - Operand 1 Register"]
278pub type SncR1Reg = crate::RegValueT<SncR1Reg_SPEC>;
279
280impl SncR1Reg {
281    #[doc = "Returns the current value of the first 32-bit of the last SNC command executed."]
282    #[inline(always)]
283    pub fn r1_reg(
284        self,
285    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, SncR1Reg_SPEC, crate::common::R>
286    {
287        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,SncR1Reg_SPEC,crate::common::R>::from_register(self,0)
288    }
289}
290impl ::core::default::Default for SncR1Reg {
291    #[inline(always)]
292    fn default() -> SncR1Reg {
293        <crate::RegValueT<SncR1Reg_SPEC> as RegisterValue<_>>::new(0)
294    }
295}
296
297#[doc(hidden)]
298#[derive(Copy, Clone, Eq, PartialEq)]
299pub struct SncR2Reg_SPEC;
300impl crate::sealed::RegSpec for SncR2Reg_SPEC {
301    type DataType = u32;
302}
303
304#[doc = "Sensor Node core - Operand 2 Register"]
305pub type SncR2Reg = crate::RegValueT<SncR2Reg_SPEC>;
306
307impl SncR2Reg {
308    #[doc = "Returns the current value of the second 32-bit word of the last SNC command executed. This is useful for the SNC commands composed by two 32-bit words."]
309    #[inline(always)]
310    pub fn r2_reg(
311        self,
312    ) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, SncR2Reg_SPEC, crate::common::R>
313    {
314        crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,SncR2Reg_SPEC,crate::common::R>::from_register(self,0)
315    }
316}
317impl ::core::default::Default for SncR2Reg {
318    #[inline(always)]
319    fn default() -> SncR2Reg {
320        <crate::RegValueT<SncR2Reg_SPEC> as RegisterValue<_>>::new(0)
321    }
322}
323
324#[doc(hidden)]
325#[derive(Copy, Clone, Eq, PartialEq)]
326pub struct SncStatusReg_SPEC;
327impl crate::sealed::RegSpec for SncStatusReg_SPEC {
328    type DataType = u32;
329}
330
331#[doc = "Sensor Node Status Register"]
332pub type SncStatusReg = crate::RegValueT<SncStatusReg_SPEC>;
333
334impl SncStatusReg {
335    #[doc = "0 : Sensor node\'s program counter is controlled by the Sensor Node\'s FSM, incemented by 4 after the fetching of each 32-bit command word.\n1 : Sensor node\'s program counter is loaded with a new value. The assertion of this signal requires the Sensor Node to have been first stopped, so the user must first check that the SNC_IS_STOPPED bit-field of this register is asserted, before writing the program counter. The SNC_PC_LOADED bit-field is auto-clear and it is reset to \'0\' as soon as the user has re-started the Sensor Node.\nNote: To start and stop the Sensor Node manually, the SNC_SW_CTRL and SNC_EN bit-fields of SNC_CTRL_REG must have been set by the user. This mode of operation is bypassing the Power Domains Controller and it is to be used for debugging purposes."]
336    #[inline(always)]
337    pub fn snc_pc_loaded(
338        self,
339    ) -> crate::common::RegisterFieldBool<6, 1, 0, SncStatusReg_SPEC, crate::common::R> {
340        crate::common::RegisterFieldBool::<6,1,0,SncStatusReg_SPEC,crate::common::R>::from_register(self,0)
341    }
342
343    #[doc = "0 : Sensor Node is operational and its FSM is running.\n1 : Sensor Node is stopped and its FSM is halted.To leave this state, the SNC_EN bit-field of SNC_CTRL_REG must be set, provided that the SNC_SW_CTRL bit-field of the same register is also set. This mode is used for debugging purposes, bypassing the enable of SNC coming from the Power Domains Controller.\nNote: The SNC_PC_REG register can be modified by SW if and only if the SNC_IS_STOPPED bit is set. Otherwise, the writes to SNC_PC_REG are discarded."]
344    #[inline(always)]
345    pub fn snc_is_stopped(
346        self,
347    ) -> crate::common::RegisterFieldBool<5, 1, 0, SncStatusReg_SPEC, crate::common::R> {
348        crate::common::RegisterFieldBool::<5,1,0,SncStatusReg_SPEC,crate::common::R>::from_register(self,0)
349    }
350
351    #[doc = "0 : No opcode error has occurred, Sensor Node continues normally.\n1 : An opcode error has occurred. Sensor Node will continue its execution, but will set also the specific bit-field to \'1\', for debugging purposes.\nNote: After being set, this bit-field will be cleared only when the Sensor Node is re-initialized, by starting again from its base address. The latter can happen either by activating the SNC_RESET bit-field of SNC_CTRL_REG or by stopping and starting again the Sensor Node. This is possible only when the PDC is bypassed, so when the Sensor Node is controlled by SNC_EN and SNC_SW_CTRL bit-fields of SNC_CTRL_REG."]
352    #[inline(always)]
353    pub fn hard_fault_status(
354        self,
355    ) -> crate::common::RegisterFieldBool<4, 1, 0, SncStatusReg_SPEC, crate::common::R> {
356        crate::common::RegisterFieldBool::<4,1,0,SncStatusReg_SPEC,crate::common::R>::from_register(self,0)
357    }
358
359    #[doc = "0 : No system bus error detected, Sensor Node continues normally\n1 : Bus error occurred. Sensor Node will continue, but it will also set the specific flag, which can be used for debugging purposes.\nNote: This bit-field will be reset to \'0\' only when the Sensor Node is re-initialized, by starting again from its base address."]
360    #[inline(always)]
361    pub fn bus_error_status(
362        self,
363    ) -> crate::common::RegisterFieldBool<3, 1, 0, SncStatusReg_SPEC, crate::common::R> {
364        crate::common::RegisterFieldBool::<3,1,0,SncStatusReg_SPEC,crate::common::R>::from_register(self,0)
365    }
366
367    #[doc = "0 : Sensor Node has not yet completed the target program\'s execution.\n1 : Sensor Node has completed the targer program\'s execution. Together with the update of the status bit, a pulse is also generated to notify the PDC that the Sensor Node is done.\nNote: This bit-field is set only when the \"SLP\" (sleep) command is executed, which should be issued after the completion of all pending tasks of the Sensor Node. It will be reset to \'0\' only when the Sensor Node re-starts, by executing from the base address.\nThis can be done by either toggling (de-asserting and re-asserting again) the SNC_EN bit-field of SNC_CTRL_REG, if the SNC is controlled by SW, or by just re-setting the SNC state via the SNC_RESET bit-field of the same register."]
368    #[inline(always)]
369    pub fn snc_done_status(
370        self,
371    ) -> crate::common::RegisterFieldBool<2, 1, 0, SncStatusReg_SPEC, crate::common::R> {
372        crate::common::RegisterFieldBool::<2,1,0,SncStatusReg_SPEC,crate::common::R>::from_register(self,0)
373    }
374
375    #[doc = "Sensor Node\'s \'GR\' (greater) flag. It can be modified either by the Sensor Node\'s core (by executing an \"RDCGR\" command) or by the Sensor Node\'s microcode, when the latter directly modifies the specific bit-field of SNC_STATUS_REG.\nWhen the Sensor Node\'s FSM is in its initial state (which may happen either by switching-on the PD_COM power domain or by resetting the Sensor Node via SNC_CTRL_REG.SNC_RESET), the specific bit-field is kept to \'0\', for initialization purposes.\nWhen the Sensor Node is stopped and then reset, the Sensor Node\'s FSM is not in its initial state and in that case, the GR_FLAG bit-field should be reset by the user (if the application needs this to be initialized to \'0\'). Otherwise, it can be left as it is, until being updated by the Sensor Node itself (upon executing an \"RDCGR\" command).\nIn general, however, this bit-field should not be modified by either the host processor (CM33) or the CMAC processor (CM0+), and especially when the Sensor Node is enabled and operational."]
376    #[inline(always)]
377    pub fn gr_flag(
378        self,
379    ) -> crate::common::RegisterFieldBool<1, 1, 0, SncStatusReg_SPEC, crate::common::RW> {
380        crate::common::RegisterFieldBool::<1,1,0,SncStatusReg_SPEC,crate::common::RW>::from_register(self,0)
381    }
382
383    #[doc = "Sensor Node\'s \'EQ\' (equalhigh) flag. It can be modified either by the Sensor Node\'s core (by executing an \"RDCBI\" command) or by the Sensor Node\'s microcode, when the latter directly modifies the specific bit-field of SNC_STATUS_REG.\nWhen the Sensor Node\'s FSM is in its initial state (which may happen either by switching-on the PD_COM power domain or by resetting the Sensor Node via SNC_CTRL_REG.SNC_RESET), the specific bit-field is kept to \'0\', for initialization purposes.\nWhen the Sensor Node is stopped and then reset, the Sensor Node\'s FSM is not in its initial state and in that case, the EQ_FLAG bit-field should be reset by the user (if the application needs this to be initialized to \'0\'). Otherwise, it can be left as it is, until being updated by the Sensor Node itself (upon executing an \"RDCBI\" command).\nIn general, however, this bit-field should not be modified by either the host processor (CM33) or the CMAC processor (CM0+), and especially when the Sensor Node is enabled and operational."]
384    #[inline(always)]
385    pub fn eq_flag(
386        self,
387    ) -> crate::common::RegisterFieldBool<0, 1, 0, SncStatusReg_SPEC, crate::common::RW> {
388        crate::common::RegisterFieldBool::<0,1,0,SncStatusReg_SPEC,crate::common::RW>::from_register(self,0)
389    }
390}
391impl ::core::default::Default for SncStatusReg {
392    #[inline(always)]
393    fn default() -> SncStatusReg {
394        <crate::RegValueT<SncStatusReg_SPEC> as RegisterValue<_>>::new(32)
395    }
396}
397
398#[doc(hidden)]
399#[derive(Copy, Clone, Eq, PartialEq)]
400pub struct SncTmp1Reg_SPEC;
401impl crate::sealed::RegSpec for SncTmp1Reg_SPEC {
402    type DataType = u32;
403}
404
405#[doc = "Sensor Node core - Temporary Register 1"]
406pub type SncTmp1Reg = crate::RegValueT<SncTmp1Reg_SPEC>;
407
408impl SncTmp1Reg {
409    #[doc = "Returns the current value of the Sensor Node\'s first temporary register. To be used for debugging purposes."]
410    #[inline(always)]
411    pub fn tmp1_reg(
412        self,
413    ) -> crate::common::RegisterField<
414        0,
415        0xffffffff,
416        1,
417        0,
418        u32,
419        u32,
420        SncTmp1Reg_SPEC,
421        crate::common::R,
422    > {
423        crate::common::RegisterField::<
424            0,
425            0xffffffff,
426            1,
427            0,
428            u32,
429            u32,
430            SncTmp1Reg_SPEC,
431            crate::common::R,
432        >::from_register(self, 0)
433    }
434}
435impl ::core::default::Default for SncTmp1Reg {
436    #[inline(always)]
437    fn default() -> SncTmp1Reg {
438        <crate::RegValueT<SncTmp1Reg_SPEC> as RegisterValue<_>>::new(0)
439    }
440}
441
442#[doc(hidden)]
443#[derive(Copy, Clone, Eq, PartialEq)]
444pub struct SncTmp2Reg_SPEC;
445impl crate::sealed::RegSpec for SncTmp2Reg_SPEC {
446    type DataType = u32;
447}
448
449#[doc = "Sensor Node core - Temporary Register 2"]
450pub type SncTmp2Reg = crate::RegValueT<SncTmp2Reg_SPEC>;
451
452impl SncTmp2Reg {
453    #[doc = "Returns the current value of the Sensor Node\'s second temporary register. To be used for debugging purposes."]
454    #[inline(always)]
455    pub fn tmp2_reg(
456        self,
457    ) -> crate::common::RegisterField<
458        0,
459        0xffffffff,
460        1,
461        0,
462        u32,
463        u32,
464        SncTmp2Reg_SPEC,
465        crate::common::R,
466    > {
467        crate::common::RegisterField::<
468            0,
469            0xffffffff,
470            1,
471            0,
472            u32,
473            u32,
474            SncTmp2Reg_SPEC,
475            crate::common::R,
476        >::from_register(self, 0)
477    }
478}
479impl ::core::default::Default for SncTmp2Reg {
480    #[inline(always)]
481    fn default() -> SncTmp2Reg {
482        <crate::RegValueT<SncTmp2Reg_SPEC> as RegisterValue<_>>::new(0)
483    }
484}
da14697_pac/snc.rs

da14697_pac/
snc.rs
