da14697_pac/
dcdc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:38 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"DCDC registers"]
28unsafe impl ::core::marker::Send for super::Dcdc {}
29unsafe impl ::core::marker::Sync for super::Dcdc {}
30impl super::Dcdc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "DCDC First Control Register"]
38    #[inline(always)]
39    pub const fn dcdc_ctrl1_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::DcdcCtrl1Reg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::DcdcCtrl1Reg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(4usize),
45            )
46        }
47    }
48
49    #[doc = "DCDC Second Control Register"]
50    #[inline(always)]
51    pub const fn dcdc_ctrl2_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::DcdcCtrl2Reg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::DcdcCtrl2Reg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(8usize),
57            )
58        }
59    }
60
61    #[doc = "DCDC Interrupt Clear Register"]
62    #[inline(always)]
63    pub const fn dcdc_irq_clear_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::DcdcIrqClearReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::DcdcIrqClearReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(52usize),
69            )
70        }
71    }
72
73    #[doc = "DCDC Interrupt Mask Register"]
74    #[inline(always)]
75    pub const fn dcdc_irq_mask_reg(
76        &self,
77    ) -> &'static crate::common::Reg<self::DcdcIrqMaskReg_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::DcdcIrqMaskReg_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(56usize),
81            )
82        }
83    }
84
85    #[doc = "DCDC Interrupt Status Register"]
86    #[inline(always)]
87    pub const fn dcdc_irq_status_reg(
88        &self,
89    ) -> &'static crate::common::Reg<self::DcdcIrqStatusReg_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::DcdcIrqStatusReg_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(48usize),
93            )
94        }
95    }
96
97    #[doc = "DCDC First Status Register"]
98    #[inline(always)]
99    pub const fn dcdc_status1_reg(
100        &self,
101    ) -> &'static crate::common::Reg<self::DcdcStatus1Reg_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::DcdcStatus1Reg_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(32usize),
105            )
106        }
107    }
108
109    #[doc = "DCDC Second Status Register"]
110    #[inline(always)]
111    pub const fn dcdc_status2_reg(
112        &self,
113    ) -> &'static crate::common::Reg<self::DcdcStatus2Reg_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::DcdcStatus2Reg_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(36usize),
117            )
118        }
119    }
120
121    #[doc = "DCDC Third Status Register"]
122    #[inline(always)]
123    pub const fn dcdc_status3_reg(
124        &self,
125    ) -> &'static crate::common::Reg<self::DcdcStatus3Reg_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::DcdcStatus3Reg_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(40usize),
129            )
130        }
131    }
132
133    #[doc = "DCDC Fourth Status Register"]
134    #[inline(always)]
135    pub const fn dcdc_status4_reg(
136        &self,
137    ) -> &'static crate::common::Reg<self::DcdcStatus4Reg_SPEC, crate::common::RW> {
138        unsafe {
139            crate::common::Reg::<self::DcdcStatus4Reg_SPEC, crate::common::RW>::from_ptr(
140                self._svd2pac_as_ptr().add(44usize),
141            )
142        }
143    }
144
145    #[doc = "DCDC Test Register"]
146    #[inline(always)]
147    pub const fn dcdc_test_reg(
148        &self,
149    ) -> &'static crate::common::Reg<self::DcdcTestReg_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::DcdcTestReg_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(28usize),
153            )
154        }
155    }
156
157    #[doc = "DCDC V14 Control Register"]
158    #[inline(always)]
159    pub const fn dcdc_v14_reg(
160        &self,
161    ) -> &'static crate::common::Reg<self::DcdcV14Reg_SPEC, crate::common::RW> {
162        unsafe {
163            crate::common::Reg::<self::DcdcV14Reg_SPEC, crate::common::RW>::from_ptr(
164                self._svd2pac_as_ptr().add(12usize),
165            )
166        }
167    }
168
169    #[doc = "DCDC V18P Control Register"]
170    #[inline(always)]
171    pub const fn dcdc_v18p_reg(
172        &self,
173    ) -> &'static crate::common::Reg<self::DcdcV18PReg_SPEC, crate::common::RW> {
174        unsafe {
175            crate::common::Reg::<self::DcdcV18PReg_SPEC, crate::common::RW>::from_ptr(
176                self._svd2pac_as_ptr().add(24usize),
177            )
178        }
179    }
180
181    #[doc = "DCDC V18 Control Register"]
182    #[inline(always)]
183    pub const fn dcdc_v18_reg(
184        &self,
185    ) -> &'static crate::common::Reg<self::DcdcV18Reg_SPEC, crate::common::RW> {
186        unsafe {
187            crate::common::Reg::<self::DcdcV18Reg_SPEC, crate::common::RW>::from_ptr(
188                self._svd2pac_as_ptr().add(20usize),
189            )
190        }
191    }
192
193    #[doc = "DCDC VDD Control Register"]
194    #[inline(always)]
195    pub const fn dcdc_vdd_reg(
196        &self,
197    ) -> &'static crate::common::Reg<self::DcdcVddReg_SPEC, crate::common::RW> {
198        unsafe {
199            crate::common::Reg::<self::DcdcVddReg_SPEC, crate::common::RW>::from_ptr(
200                self._svd2pac_as_ptr().add(16usize),
201            )
202        }
203    }
204}
205#[doc(hidden)]
206#[derive(Copy, Clone, Eq, PartialEq)]
207pub struct DcdcCtrl1Reg_SPEC;
208impl crate::sealed::RegSpec for DcdcCtrl1Reg_SPEC {
209    type DataType = u32;
210}
211
212#[doc = "DCDC First Control Register"]
213pub type DcdcCtrl1Reg = crate::RegValueT<DcdcCtrl1Reg_SPEC>;
214
215impl DcdcCtrl1Reg {
216    #[doc = "Enables sample and hold circuit in output comparators."]
217    #[inline(always)]
218    pub fn dcdc_sh_enable(
219        self,
220    ) -> crate::common::RegisterFieldBool<31, 1, 0, DcdcCtrl1Reg_SPEC, crate::common::RW> {
221        crate::common::RegisterFieldBool::<31,1,0,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
222    }
223
224    #[doc = "Delay between turning bias on and converter becoming active\n0 - 31 us, 1 us step size"]
225    #[inline(always)]
226    pub fn dcdc_startup_delay(
227        self,
228    ) -> crate::common::RegisterField<26, 0x1f, 1, 0, u8, u8, DcdcCtrl1Reg_SPEC, crate::common::RW>
229    {
230        crate::common::RegisterField::<26,0x1f,1,0,u8,u8,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
231    }
232
233    #[doc = "Maximum output idle time for fast current limit downramping.\n0 - 7875 ns, 125 ns step size"]
234    #[inline(always)]
235    pub fn dcdc_idle_max_fast_downramp(
236        self,
237    ) -> crate::common::RegisterField<20, 0x3f, 1, 0, u8, u8, DcdcCtrl1Reg_SPEC, crate::common::RW>
238    {
239        crate::common::RegisterField::<20,0x3f,1,0,u8,u8,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
240    }
241
242    #[doc = "P and N switch timeout, if switch is closed longer than this a timeout is generated and the FSM is forced to the next state\nWriting 0 disables timeout functionality\n62.5 - 1937.5 ns, 62.5 ns step size"]
243    #[inline(always)]
244    pub fn dcdc_sw_timeout(
245        self,
246    ) -> crate::common::RegisterField<15, 0x1f, 1, 0, u8, u8, DcdcCtrl1Reg_SPEC, crate::common::RW>
247    {
248        crate::common::RegisterField::<15,0x1f,1,0,u8,u8,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
249    }
250
251    #[doc = "Set current limit to maximum during initial startup"]
252    #[inline(always)]
253    pub fn dcdc_fast_startup(
254        self,
255    ) -> crate::common::RegisterFieldBool<14, 1, 0, DcdcCtrl1Reg_SPEC, crate::common::RW> {
256        crate::common::RegisterFieldBool::<14,1,0,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
257    }
258
259    #[doc = "Manually activates low voltage settings"]
260    #[inline(always)]
261    pub fn dcdc_man_lv_mode(
262        self,
263    ) -> crate::common::RegisterFieldBool<13, 1, 0, DcdcCtrl1Reg_SPEC, crate::common::RW> {
264        crate::common::RegisterFieldBool::<13,1,0,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
265    }
266
267    #[doc = "Switches to low voltage settings when battery voltage drops below 2.5 V"]
268    #[inline(always)]
269    pub fn dcdc_auto_lv_mode(
270        self,
271    ) -> crate::common::RegisterFieldBool<12, 1, 0, DcdcCtrl1Reg_SPEC, crate::common::RW> {
272        crate::common::RegisterFieldBool::<12,1,0,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
273    }
274
275    #[doc = "Idle Clock Divider\n00 = 2\n01 = 4\n10 = 8\n11 = 16"]
276    #[inline(always)]
277    pub fn dcdc_idle_clk_div(
278        self,
279    ) -> crate::common::RegisterField<10, 0x3, 1, 0, u8, u8, DcdcCtrl1Reg_SPEC, crate::common::RW>
280    {
281        crate::common::RegisterField::<10,0x3,1,0,u8,u8,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
282    }
283
284    #[doc = "Charge priority register (4x 2 bit ID)\nCharge sequence is \\[1:0\\] > \\[3:2\\] > \\[5:4\\] > \\[7:6\\]\nV14 = 00\nV18 = 01\nVDD = 10\nV18P = 11"]
285    #[inline(always)]
286    pub fn dcdc_priority(
287        self,
288    ) -> crate::common::RegisterField<2, 0xff, 1, 0, u8, u8, DcdcCtrl1Reg_SPEC, crate::common::RW>
289    {
290        crate::common::RegisterField::<2,0xff,1,0,u8,u8,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
291    }
292
293    #[doc = "Freewheel switch enable"]
294    #[inline(always)]
295    pub fn dcdc_fw_enable(
296        self,
297    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcCtrl1Reg_SPEC, crate::common::RW> {
298        crate::common::RegisterFieldBool::<1,1,0,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
299    }
300
301    #[doc = "Enable setting for DCDC converter"]
302    #[inline(always)]
303    pub fn dcdc_enable(
304        self,
305    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcCtrl1Reg_SPEC, crate::common::RW> {
306        crate::common::RegisterFieldBool::<0,1,0,DcdcCtrl1Reg_SPEC,crate::common::RW>::from_register(self,0)
307    }
308}
309impl ::core::default::Default for DcdcCtrl1Reg {
310    #[inline(always)]
311    fn default() -> DcdcCtrl1Reg {
312        <crate::RegValueT<DcdcCtrl1Reg_SPEC> as RegisterValue<_>>::new(2147483647)
313    }
314}
315
316#[doc(hidden)]
317#[derive(Copy, Clone, Eq, PartialEq)]
318pub struct DcdcCtrl2Reg_SPEC;
319impl crate::sealed::RegSpec for DcdcCtrl2Reg_SPEC {
320    type DataType = u32;
321}
322
323#[doc = "DCDC Second Control Register"]
324pub type DcdcCtrl2Reg = crate::RegValueT<DcdcCtrl2Reg_SPEC>;
325
326impl DcdcCtrl2Reg {
327    #[doc = "Maximum number of V_NOK events on an output before V_AVAILABLE is reset"]
328    #[inline(always)]
329    pub fn dcdc_v_nok_cnt_max(
330        self,
331    ) -> crate::common::RegisterField<24, 0xf, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
332    {
333        crate::common::RegisterField::<24,0xf,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
334    }
335
336    #[doc = "Enables manual trimming for N side comparator"]
337    #[inline(always)]
338    pub fn dcdc_n_comp_trim_man(
339        self,
340    ) -> crate::common::RegisterFieldBool<22, 1, 0, DcdcCtrl2Reg_SPEC, crate::common::RW> {
341        crate::common::RegisterFieldBool::<22,1,0,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
342    }
343
344    #[doc = "Manual trim value for N side comparator\nSigned magnitude representation\n011111 = +13 mV\n000000 = 100000 = -22 mV\n111111 = -56 mV"]
345    #[inline(always)]
346    pub fn dcdc_n_comp_trim_val(
347        self,
348    ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
349    {
350        crate::common::RegisterField::<16,0x3f,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
351    }
352
353    #[doc = "Number of timeout events before timeout interrupt is generated"]
354    #[inline(always)]
355    pub fn dcdc_timeout_irq_trig(
356        self,
357    ) -> crate::common::RegisterField<12, 0xf, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
358    {
359        crate::common::RegisterField::<12,0xf,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
360    }
361
362    #[doc = "Number of successive non-timed out charge events required to clear timeout event counter"]
363    #[inline(always)]
364    pub fn dcdc_timeout_irq_res(
365        self,
366    ) -> crate::common::RegisterField<8, 0xf, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
367    {
368        crate::common::RegisterField::<8,0xf,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
369    }
370
371    #[doc = "Sets strength of N and P switch drivers"]
372    #[inline(always)]
373    pub fn dcdc_slope_control(
374        self,
375    ) -> crate::common::RegisterField<6, 0x3, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
376    {
377        crate::common::RegisterField::<6,0x3,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
378    }
379
380    #[doc = "Trim bootstrap voltage\nV = 1.6 V + 100 mV * N"]
381    #[inline(always)]
382    pub fn dcdc_vbtstrp_trim(
383        self,
384    ) -> crate::common::RegisterField<4, 0x3, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
385    {
386        crate::common::RegisterField::<4,0x3,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
387    }
388
389    #[doc = "Trim low side supply voltage\nV = 2 V + 300 mV * N"]
390    #[inline(always)]
391    pub fn dcdc_lssup_trim(
392        self,
393    ) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
394    {
395        crate::common::RegisterField::<2,0x3,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
396    }
397
398    #[doc = "Trim high side ground\nV = VBAT - (2 V + 400 mV * N)"]
399    #[inline(always)]
400    pub fn dcdc_hsgnd_trim(
401        self,
402    ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, DcdcCtrl2Reg_SPEC, crate::common::RW>
403    {
404        crate::common::RegisterField::<0,0x3,1,0,u8,u8,DcdcCtrl2Reg_SPEC,crate::common::RW>::from_register(self,0)
405    }
406}
407impl ::core::default::Default for DcdcCtrl2Reg {
408    #[inline(always)]
409    fn default() -> DcdcCtrl2Reg {
410        <crate::RegValueT<DcdcCtrl2Reg_SPEC> as RegisterValue<_>>::new(134777055)
411    }
412}
413
414#[doc(hidden)]
415#[derive(Copy, Clone, Eq, PartialEq)]
416pub struct DcdcIrqClearReg_SPEC;
417impl crate::sealed::RegSpec for DcdcIrqClearReg_SPEC {
418    type DataType = u32;
419}
420
421#[doc = "DCDC Interrupt Clear Register"]
422pub type DcdcIrqClearReg = crate::RegValueT<DcdcIrqClearReg_SPEC>;
423
424impl DcdcIrqClearReg {
425    #[doc = "Clear low VBAT interrupt"]
426    #[inline(always)]
427    pub fn dcdc_low_vbat_irq_clear(
428        self,
429    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
430        crate::common::RegisterFieldBool::<4,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
431    }
432
433    #[doc = "Clear V18P timeout interrupt"]
434    #[inline(always)]
435    pub fn dcdc_v18p_timeout_irq_clear(
436        self,
437    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
438        crate::common::RegisterFieldBool::<3,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
439    }
440
441    #[doc = "Clear VDD timeout interrupt"]
442    #[inline(always)]
443    pub fn dcdc_vdd_timeout_irq_clear(
444        self,
445    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
446        crate::common::RegisterFieldBool::<2,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
447    }
448
449    #[doc = "Clear V18 timeout interrupt"]
450    #[inline(always)]
451    pub fn dcdc_v18_timeout_irq_clear(
452        self,
453    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
454        crate::common::RegisterFieldBool::<1,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
455    }
456
457    #[doc = "Clear V14 timeout interrupt"]
458    #[inline(always)]
459    pub fn dcdc_v14_timeout_irq_clear(
460        self,
461    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcIrqClearReg_SPEC, crate::common::W> {
462        crate::common::RegisterFieldBool::<0,1,0,DcdcIrqClearReg_SPEC,crate::common::W>::from_register(self,0)
463    }
464}
465impl ::core::default::Default for DcdcIrqClearReg {
466    #[inline(always)]
467    fn default() -> DcdcIrqClearReg {
468        <crate::RegValueT<DcdcIrqClearReg_SPEC> as RegisterValue<_>>::new(0)
469    }
470}
471
472#[doc(hidden)]
473#[derive(Copy, Clone, Eq, PartialEq)]
474pub struct DcdcIrqMaskReg_SPEC;
475impl crate::sealed::RegSpec for DcdcIrqMaskReg_SPEC {
476    type DataType = u32;
477}
478
479#[doc = "DCDC Interrupt Mask Register"]
480pub type DcdcIrqMaskReg = crate::RegValueT<DcdcIrqMaskReg_SPEC>;
481
482impl DcdcIrqMaskReg {
483    #[doc = "Mask low VBAT interrupt"]
484    #[inline(always)]
485    pub fn dcdc_low_vbat_irq_mask(
486        self,
487    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
488        crate::common::RegisterFieldBool::<4,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
489    }
490
491    #[doc = "Mask V18P timeout interrupt"]
492    #[inline(always)]
493    pub fn dcdc_v18p_timeout_irq_mask(
494        self,
495    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
496        crate::common::RegisterFieldBool::<3,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
497    }
498
499    #[doc = "Mask VDD timeout interrupt"]
500    #[inline(always)]
501    pub fn dcdc_vdd_timeout_irq_mask(
502        self,
503    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
504        crate::common::RegisterFieldBool::<2,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
505    }
506
507    #[doc = "Mask V18 timeout interrupt"]
508    #[inline(always)]
509    pub fn dcdc_v18_timeout_irq_mask(
510        self,
511    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
512        crate::common::RegisterFieldBool::<1,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
513    }
514
515    #[doc = "Mask V14 timeout interrupt"]
516    #[inline(always)]
517    pub fn dcdc_v14_timeout_irq_mask(
518        self,
519    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcIrqMaskReg_SPEC, crate::common::RW> {
520        crate::common::RegisterFieldBool::<0,1,0,DcdcIrqMaskReg_SPEC,crate::common::RW>::from_register(self,0)
521    }
522}
523impl ::core::default::Default for DcdcIrqMaskReg {
524    #[inline(always)]
525    fn default() -> DcdcIrqMaskReg {
526        <crate::RegValueT<DcdcIrqMaskReg_SPEC> as RegisterValue<_>>::new(15)
527    }
528}
529
530#[doc(hidden)]
531#[derive(Copy, Clone, Eq, PartialEq)]
532pub struct DcdcIrqStatusReg_SPEC;
533impl crate::sealed::RegSpec for DcdcIrqStatusReg_SPEC {
534    type DataType = u32;
535}
536
537#[doc = "DCDC Interrupt Status Register"]
538pub type DcdcIrqStatusReg = crate::RegValueT<DcdcIrqStatusReg_SPEC>;
539
540impl DcdcIrqStatusReg {
541    #[doc = "Low VBAT detector triggered (battery voltage below 2.5 V)"]
542    #[inline(always)]
543    pub fn dcdc_low_vbat_irq_status(
544        self,
545    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
546        crate::common::RegisterFieldBool::<4,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
547    }
548
549    #[doc = "Timeout occured on V18P output"]
550    #[inline(always)]
551    pub fn dcdc_v18p_timeout_irq_status(
552        self,
553    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
554        crate::common::RegisterFieldBool::<3,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
555    }
556
557    #[doc = "Timeout occured on VDD output"]
558    #[inline(always)]
559    pub fn dcdc_vdd_timeout_irq_status(
560        self,
561    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
562        crate::common::RegisterFieldBool::<2,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
563    }
564
565    #[doc = "Timeout occured on V18 output"]
566    #[inline(always)]
567    pub fn dcdc_v18_timeout_irq_status(
568        self,
569    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
570        crate::common::RegisterFieldBool::<1,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
571    }
572
573    #[doc = "Timeout occured on V14 output"]
574    #[inline(always)]
575    pub fn dcdc_v14_timeout_irq_status(
576        self,
577    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcIrqStatusReg_SPEC, crate::common::R> {
578        crate::common::RegisterFieldBool::<0,1,0,DcdcIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
579    }
580}
581impl ::core::default::Default for DcdcIrqStatusReg {
582    #[inline(always)]
583    fn default() -> DcdcIrqStatusReg {
584        <crate::RegValueT<DcdcIrqStatusReg_SPEC> as RegisterValue<_>>::new(0)
585    }
586}
587
588#[doc(hidden)]
589#[derive(Copy, Clone, Eq, PartialEq)]
590pub struct DcdcStatus1Reg_SPEC;
591impl crate::sealed::RegSpec for DcdcStatus1Reg_SPEC {
592    type DataType = u32;
593}
594
595#[doc = "DCDC First Status Register"]
596pub type DcdcStatus1Reg = crate::RegValueT<DcdcStatus1Reg_SPEC>;
597
598impl DcdcStatus1Reg {
599    #[doc = "Indicates whether V18P is available\nRequires that converter is enabled, output is enabled and V_OK has occured. Reset when too many V_NOK events have occured."]
600    #[inline(always)]
601    pub fn dcdc_v18p_available(
602        self,
603    ) -> crate::common::RegisterFieldBool<27, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
604        crate::common::RegisterFieldBool::<27,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
605    }
606
607    #[doc = "Indicates whether VDD is available\nRequires that converter is enabled, output is enabled and V_OK has occured. Reset when too many V_NOK events have occured."]
608    #[inline(always)]
609    pub fn dcdc_vdd_available(
610        self,
611    ) -> crate::common::RegisterFieldBool<26, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
612        crate::common::RegisterFieldBool::<26,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
613    }
614
615    #[doc = "Indicates whether V18 is available\nRequires that converter is enabled, output is enabled and V_OK has occured. Reset when too many V_NOK events have occured."]
616    #[inline(always)]
617    pub fn dcdc_v18_available(
618        self,
619    ) -> crate::common::RegisterFieldBool<25, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
620        crate::common::RegisterFieldBool::<25,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
621    }
622
623    #[doc = "Indicates whether V14 is available\nRequires that converter is enabled, output is enabled and V_OK has occured. Reset when too many V_NOK events have occured."]
624    #[inline(always)]
625    pub fn dcdc_v14_available(
626        self,
627    ) -> crate::common::RegisterFieldBool<24, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
628        crate::common::RegisterFieldBool::<24,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
629    }
630
631    #[doc = "OK output of V18P comparator"]
632    #[inline(always)]
633    pub fn dcdc_v18p_comp_ok(
634        self,
635    ) -> crate::common::RegisterFieldBool<23, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
636        crate::common::RegisterFieldBool::<23,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
637    }
638
639    #[doc = "OK output of VDD comparator"]
640    #[inline(always)]
641    pub fn dcdc_vdd_comp_ok(
642        self,
643    ) -> crate::common::RegisterFieldBool<22, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
644        crate::common::RegisterFieldBool::<22,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
645    }
646
647    #[doc = "OK output of V18 comparator"]
648    #[inline(always)]
649    pub fn dcdc_v18_comp_ok(
650        self,
651    ) -> crate::common::RegisterFieldBool<21, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
652        crate::common::RegisterFieldBool::<21,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
653    }
654
655    #[doc = "OK output of V14 comparator"]
656    #[inline(always)]
657    pub fn dcdc_v14_comp_ok(
658        self,
659    ) -> crate::common::RegisterFieldBool<20, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
660        crate::common::RegisterFieldBool::<20,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
661    }
662
663    #[doc = "NOK output of V18P comparator"]
664    #[inline(always)]
665    pub fn dcdc_v18p_comp_nok(
666        self,
667    ) -> crate::common::RegisterFieldBool<19, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
668        crate::common::RegisterFieldBool::<19,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
669    }
670
671    #[doc = "NOK output of VDD comparator"]
672    #[inline(always)]
673    pub fn dcdc_vdd_comp_nok(
674        self,
675    ) -> crate::common::RegisterFieldBool<18, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
676        crate::common::RegisterFieldBool::<18,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
677    }
678
679    #[doc = "NOK output of V18 comparator"]
680    #[inline(always)]
681    pub fn dcdc_v18_comp_nok(
682        self,
683    ) -> crate::common::RegisterFieldBool<17, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
684        crate::common::RegisterFieldBool::<17,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
685    }
686
687    #[doc = "NOK output of V14 comparator"]
688    #[inline(always)]
689    pub fn dcdc_v14_comp_nok(
690        self,
691    ) -> crate::common::RegisterFieldBool<16, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
692        crate::common::RegisterFieldBool::<16,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
693    }
694
695    #[doc = "DCDC N side dynamic comparator P output"]
696    #[inline(always)]
697    pub fn dcdc_n_comp_p(
698        self,
699    ) -> crate::common::RegisterFieldBool<11, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
700        crate::common::RegisterFieldBool::<11,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
701    }
702
703    #[doc = "DCDC N side dynamic comparator N output"]
704    #[inline(always)]
705    pub fn dcdc_n_comp_n(
706        self,
707    ) -> crate::common::RegisterFieldBool<10, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
708        crate::common::RegisterFieldBool::<10,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
709    }
710
711    #[doc = "DCDC P side continuous time comparator output"]
712    #[inline(always)]
713    pub fn dcdc_p_comp(
714        self,
715    ) -> crate::common::RegisterFieldBool<9, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
716        crate::common::RegisterFieldBool::<9,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
717    }
718
719    #[doc = "DCDC N side continuous time comparator output"]
720    #[inline(always)]
721    pub fn dcdc_n_comp(
722        self,
723    ) -> crate::common::RegisterFieldBool<8, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
724        crate::common::RegisterFieldBool::<8,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
725    }
726
727    #[doc = "Indicates if the converter is in low battery voltage mode"]
728    #[inline(always)]
729    pub fn dcdc_lv_mode(
730        self,
731    ) -> crate::common::RegisterFieldBool<7, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
732        crate::common::RegisterFieldBool::<7,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
733    }
734
735    #[doc = "DCDC state machine V18P output"]
736    #[inline(always)]
737    pub fn dcdc_v18p_sw_state(
738        self,
739    ) -> crate::common::RegisterFieldBool<6, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
740        crate::common::RegisterFieldBool::<6,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
741    }
742
743    #[doc = "DCDC state machine VDD output"]
744    #[inline(always)]
745    pub fn dcdc_vdd_sw_state(
746        self,
747    ) -> crate::common::RegisterFieldBool<5, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
748        crate::common::RegisterFieldBool::<5,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
749    }
750
751    #[doc = "DCDC state machine V18 output"]
752    #[inline(always)]
753    pub fn dcdc_v18_sw_state(
754        self,
755    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
756        crate::common::RegisterFieldBool::<4,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
757    }
758
759    #[doc = "DCDC state machine V14 output"]
760    #[inline(always)]
761    pub fn dcdc_v14_sw_state(
762        self,
763    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
764        crate::common::RegisterFieldBool::<3,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
765    }
766
767    #[doc = "DCDC state machine NSW output"]
768    #[inline(always)]
769    pub fn dcdc_n_sw_state(
770        self,
771    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
772        crate::common::RegisterFieldBool::<2,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
773    }
774
775    #[doc = "DCDC state machine PSW output"]
776    #[inline(always)]
777    pub fn dcdc_p_sw_state(
778        self,
779    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
780        crate::common::RegisterFieldBool::<1,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
781    }
782
783    #[doc = "Indicates if the converter is enabled and the startup counter has expired (internal biasing settled)"]
784    #[inline(always)]
785    pub fn dcdc_startup_complete(
786        self,
787    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcStatus1Reg_SPEC, crate::common::R> {
788        crate::common::RegisterFieldBool::<0,1,0,DcdcStatus1Reg_SPEC,crate::common::R>::from_register(self,0)
789    }
790}
791impl ::core::default::Default for DcdcStatus1Reg {
792    #[inline(always)]
793    fn default() -> DcdcStatus1Reg {
794        <crate::RegValueT<DcdcStatus1Reg_SPEC> as RegisterValue<_>>::new(0)
795    }
796}
797
798#[doc(hidden)]
799#[derive(Copy, Clone, Eq, PartialEq)]
800pub struct DcdcStatus2Reg_SPEC;
801impl crate::sealed::RegSpec for DcdcStatus2Reg_SPEC {
802    type DataType = u32;
803}
804
805#[doc = "DCDC Second Status Register"]
806pub type DcdcStatus2Reg = crate::RegValueT<DcdcStatus2Reg_SPEC>;
807
808impl DcdcStatus2Reg {
809    #[doc = "Actual V18P current limit"]
810    #[inline(always)]
811    pub fn dcdc_v18p_cur_lim(
812        self,
813    ) -> crate::common::RegisterField<21, 0x1f, 1, 0, u8, u8, DcdcStatus2Reg_SPEC, crate::common::R>
814    {
815        crate::common::RegisterField::<21,0x1f,1,0,u8,u8,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
816    }
817
818    #[doc = "Actual V18 current limit"]
819    #[inline(always)]
820    pub fn dcdc_v18_cur_lim(
821        self,
822    ) -> crate::common::RegisterField<16, 0x1f, 1, 0, u8, u8, DcdcStatus2Reg_SPEC, crate::common::R>
823    {
824        crate::common::RegisterField::<16,0x1f,1,0,u8,u8,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
825    }
826
827    #[doc = "Actual VDD current limit"]
828    #[inline(always)]
829    pub fn dcdc_vdd_cur_lim(
830        self,
831    ) -> crate::common::RegisterField<5, 0x1f, 1, 0, u8, u8, DcdcStatus2Reg_SPEC, crate::common::R>
832    {
833        crate::common::RegisterField::<5,0x1f,1,0,u8,u8,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
834    }
835
836    #[doc = "Actual V14 current limit"]
837    #[inline(always)]
838    pub fn dcdc_v14_cur_lim(
839        self,
840    ) -> crate::common::RegisterField<0, 0x1f, 1, 0, u8, u8, DcdcStatus2Reg_SPEC, crate::common::R>
841    {
842        crate::common::RegisterField::<0,0x1f,1,0,u8,u8,DcdcStatus2Reg_SPEC,crate::common::R>::from_register(self,0)
843    }
844}
845impl ::core::default::Default for DcdcStatus2Reg {
846    #[inline(always)]
847    fn default() -> DcdcStatus2Reg {
848        <crate::RegValueT<DcdcStatus2Reg_SPEC> as RegisterValue<_>>::new(8650884)
849    }
850}
851
852#[doc(hidden)]
853#[derive(Copy, Clone, Eq, PartialEq)]
854pub struct DcdcStatus3Reg_SPEC;
855impl crate::sealed::RegSpec for DcdcStatus3Reg_SPEC {
856    type DataType = u32;
857}
858
859#[doc = "DCDC Third Status Register"]
860pub type DcdcStatus3Reg = crate::RegValueT<DcdcStatus3Reg_SPEC>;
861
862impl DcdcStatus3Reg {
863    #[doc = "Actual V18P N side comparator trim value"]
864    #[inline(always)]
865    pub fn dcdc_v18p_n_comp_trim(
866        self,
867    ) -> crate::common::RegisterField<22, 0x3f, 1, 0, u8, u8, DcdcStatus3Reg_SPEC, crate::common::R>
868    {
869        crate::common::RegisterField::<22,0x3f,1,0,u8,u8,DcdcStatus3Reg_SPEC,crate::common::R>::from_register(self,0)
870    }
871
872    #[doc = "Actual V18 N side comparator trim value"]
873    #[inline(always)]
874    pub fn dcdc_v18_n_comp_trim(
875        self,
876    ) -> crate::common::RegisterField<16, 0x3f, 1, 0, u8, u8, DcdcStatus3Reg_SPEC, crate::common::R>
877    {
878        crate::common::RegisterField::<16,0x3f,1,0,u8,u8,DcdcStatus3Reg_SPEC,crate::common::R>::from_register(self,0)
879    }
880
881    #[doc = "Actual VDD N side comparator trim value"]
882    #[inline(always)]
883    pub fn dcdc_vdd_n_comp_trim(
884        self,
885    ) -> crate::common::RegisterField<6, 0x3f, 1, 0, u8, u8, DcdcStatus3Reg_SPEC, crate::common::R>
886    {
887        crate::common::RegisterField::<6,0x3f,1,0,u8,u8,DcdcStatus3Reg_SPEC,crate::common::R>::from_register(self,0)
888    }
889
890    #[doc = "Actual V14 N side comparator trim value"]
891    #[inline(always)]
892    pub fn dcdc_v14_n_comp_trim(
893        self,
894    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, DcdcStatus3Reg_SPEC, crate::common::R>
895    {
896        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,DcdcStatus3Reg_SPEC,crate::common::R>::from_register(self,0)
897    }
898}
899impl ::core::default::Default for DcdcStatus3Reg {
900    #[inline(always)]
901    fn default() -> DcdcStatus3Reg {
902        <crate::RegValueT<DcdcStatus3Reg_SPEC> as RegisterValue<_>>::new(34079240)
903    }
904}
905
906#[doc(hidden)]
907#[derive(Copy, Clone, Eq, PartialEq)]
908pub struct DcdcStatus4Reg_SPEC;
909impl crate::sealed::RegSpec for DcdcStatus4Reg_SPEC {
910    type DataType = u32;
911}
912
913#[doc = "DCDC Fourth Status Register"]
914pub type DcdcStatus4Reg = crate::RegValueT<DcdcStatus4Reg_SPEC>;
915
916impl DcdcStatus4Reg {
917    #[doc = "Charge register position 3"]
918    #[inline(always)]
919    pub fn dcdc_charge_reg_3(
920        self,
921    ) -> crate::common::RegisterField<9, 0x7, 1, 0, u8, u8, DcdcStatus4Reg_SPEC, crate::common::R>
922    {
923        crate::common::RegisterField::<9,0x7,1,0,u8,u8,DcdcStatus4Reg_SPEC,crate::common::R>::from_register(self,0)
924    }
925
926    #[doc = "Charge register position 2"]
927    #[inline(always)]
928    pub fn dcdc_charge_reg_2(
929        self,
930    ) -> crate::common::RegisterField<6, 0x7, 1, 0, u8, u8, DcdcStatus4Reg_SPEC, crate::common::R>
931    {
932        crate::common::RegisterField::<6,0x7,1,0,u8,u8,DcdcStatus4Reg_SPEC,crate::common::R>::from_register(self,0)
933    }
934
935    #[doc = "Charge register position 1"]
936    #[inline(always)]
937    pub fn dcdc_charge_reg_1(
938        self,
939    ) -> crate::common::RegisterField<3, 0x7, 1, 0, u8, u8, DcdcStatus4Reg_SPEC, crate::common::R>
940    {
941        crate::common::RegisterField::<3,0x7,1,0,u8,u8,DcdcStatus4Reg_SPEC,crate::common::R>::from_register(self,0)
942    }
943
944    #[doc = "Charge register position 0"]
945    #[inline(always)]
946    pub fn dcdc_charge_reg_0(
947        self,
948    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, DcdcStatus4Reg_SPEC, crate::common::R>
949    {
950        crate::common::RegisterField::<0,0x7,1,0,u8,u8,DcdcStatus4Reg_SPEC,crate::common::R>::from_register(self,0)
951    }
952}
953impl ::core::default::Default for DcdcStatus4Reg {
954    #[inline(always)]
955    fn default() -> DcdcStatus4Reg {
956        <crate::RegValueT<DcdcStatus4Reg_SPEC> as RegisterValue<_>>::new(0)
957    }
958}
959
960#[doc(hidden)]
961#[derive(Copy, Clone, Eq, PartialEq)]
962pub struct DcdcTestReg_SPEC;
963impl crate::sealed::RegSpec for DcdcTestReg_SPEC {
964    type DataType = u32;
965}
966
967#[doc = "DCDC Test Register"]
968pub type DcdcTestReg = crate::RegValueT<DcdcTestReg_SPEC>;
969
970impl DcdcTestReg {
971    #[doc = "Selects which register appears on the test mode pins\n0 = None\n1 = DCDC_STATUS_1 High Bits\n2 = DCDC_STATUS_1 Low Bits\n3 = DCDC_STATUS_2 High Bits\n4 = DCDC_STATUS_2 Low Bits\n5 = DCDC_STATUS_3 High Bits\n6 = DCDC_STATUS_3 Low Bits\n7 = DCDC_STATUS_4 Low Bits\n8-F = Reserved"]
972    #[inline(always)]
973    pub fn dcdc_test_out(
974        self,
975    ) -> crate::common::RegisterField<25, 0xf, 1, 0, u8, u8, DcdcTestReg_SPEC, crate::common::RW>
976    {
977        crate::common::RegisterField::<25,0xf,1,0,u8,u8,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
978    }
979
980    #[doc = "Current limit setting when forced"]
981    #[inline(always)]
982    pub fn dcdc_force_cur_lim_val(
983        self,
984    ) -> crate::common::RegisterField<20, 0x1f, 1, 0, u8, u8, DcdcTestReg_SPEC, crate::common::RW>
985    {
986        crate::common::RegisterField::<20,0x1f,1,0,u8,u8,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
987    }
988
989    #[doc = "Sets clock lines for the output comparators"]
990    #[inline(always)]
991    pub fn dcdc_force_comp_clk_val(
992        self,
993    ) -> crate::common::RegisterField<16, 0xf, 1, 0, u8, u8, DcdcTestReg_SPEC, crate::common::RW>
994    {
995        crate::common::RegisterField::<16,0xf,1,0,u8,u8,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
996    }
997
998    #[doc = "Force output current setting"]
999    #[inline(always)]
1000    pub fn dcdc_force_cur_lim(
1001        self,
1002    ) -> crate::common::RegisterFieldBool<15, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1003        crate::common::RegisterFieldBool::<15,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1004    }
1005
1006    #[doc = "Disables automatic comparator clock, clock lines values based on FORCE_COMP_CLK_VAL"]
1007    #[inline(always)]
1008    pub fn dcdc_force_comp_clk(
1009        self,
1010    ) -> crate::common::RegisterFieldBool<14, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1011        crate::common::RegisterFieldBool::<14,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1012    }
1013
1014    #[doc = "Output monitor switch (connect to ADC)\n000 = None\n001 = VDD\n010 = V18\n011 = V14\n100 = V18P\n101 = V18F\n110 = None\n111 = None"]
1015    #[inline(always)]
1016    pub fn dcdc_output_mon(
1017        self,
1018    ) -> crate::common::RegisterField<11, 0x7, 1, 0, u8, u8, DcdcTestReg_SPEC, crate::common::RW>
1019    {
1020        crate::common::RegisterField::<11,0x7,1,0,u8,u8,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1021    }
1022
1023    #[doc = "Analog test bus\n000 = None\n001 = High side ground\n010 = Low side supply\n011 = Bootstrap voltage\n100 = 1.0 V buffer output\n101 = None\n110 = None\n111 = None"]
1024    #[inline(always)]
1025    pub fn dcdc_ana_test(
1026        self,
1027    ) -> crate::common::RegisterField<8, 0x7, 1, 0, u8, u8, DcdcTestReg_SPEC, crate::common::RW>
1028    {
1029        crate::common::RegisterField::<8,0x7,1,0,u8,u8,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1030    }
1031
1032    #[doc = "Force idle mode"]
1033    #[inline(always)]
1034    pub fn dcdc_force_idle(
1035        self,
1036    ) -> crate::common::RegisterFieldBool<7, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1037        crate::common::RegisterFieldBool::<7,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1038    }
1039
1040    #[doc = "Force V18P switch on"]
1041    #[inline(always)]
1042    pub fn dcdc_force_v18p_sw(
1043        self,
1044    ) -> crate::common::RegisterFieldBool<6, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1045        crate::common::RegisterFieldBool::<6,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1046    }
1047
1048    #[doc = "Force VDD switch on"]
1049    #[inline(always)]
1050    pub fn dcdc_force_vdd_sw(
1051        self,
1052    ) -> crate::common::RegisterFieldBool<5, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1053        crate::common::RegisterFieldBool::<5,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1054    }
1055
1056    #[doc = "Force V18 switch on"]
1057    #[inline(always)]
1058    pub fn dcdc_force_v18_sw(
1059        self,
1060    ) -> crate::common::RegisterFieldBool<4, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1061        crate::common::RegisterFieldBool::<4,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1062    }
1063
1064    #[doc = "Force V14 switch on"]
1065    #[inline(always)]
1066    pub fn dcdc_force_v14_sw(
1067        self,
1068    ) -> crate::common::RegisterFieldBool<3, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1069        crate::common::RegisterFieldBool::<3,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1070    }
1071
1072    #[doc = "Force FW switch on"]
1073    #[inline(always)]
1074    pub fn dcdc_force_fw_sw(
1075        self,
1076    ) -> crate::common::RegisterFieldBool<2, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1077        crate::common::RegisterFieldBool::<2,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1078    }
1079
1080    #[doc = "Force N switch on"]
1081    #[inline(always)]
1082    pub fn dcdc_force_n_sw(
1083        self,
1084    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1085        crate::common::RegisterFieldBool::<1,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1086    }
1087
1088    #[doc = "Force P switch on"]
1089    #[inline(always)]
1090    pub fn dcdc_force_p_sw(
1091        self,
1092    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcTestReg_SPEC, crate::common::RW> {
1093        crate::common::RegisterFieldBool::<0,1,0,DcdcTestReg_SPEC,crate::common::RW>::from_register(self,0)
1094    }
1095}
1096impl ::core::default::Default for DcdcTestReg {
1097    #[inline(always)]
1098    fn default() -> DcdcTestReg {
1099        <crate::RegValueT<DcdcTestReg_SPEC> as RegisterValue<_>>::new(0)
1100    }
1101}
1102
1103#[doc(hidden)]
1104#[derive(Copy, Clone, Eq, PartialEq)]
1105pub struct DcdcV14Reg_SPEC;
1106impl crate::sealed::RegSpec for DcdcV14Reg_SPEC {
1107    type DataType = u32;
1108}
1109
1110#[doc = "DCDC V14 Control Register"]
1111pub type DcdcV14Reg = crate::RegValueT<DcdcV14Reg_SPEC>;
1112
1113impl DcdcV14Reg {
1114    #[doc = "Fast current ramping (improves response time at the cost of more ripple)"]
1115    #[inline(always)]
1116    pub fn dcdc_v14_fast_ramping(
1117        self,
1118    ) -> crate::common::RegisterFieldBool<31, 1, 0, DcdcV14Reg_SPEC, crate::common::RW> {
1119        crate::common::RegisterFieldBool::<31,1,0,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1120    }
1121
1122    #[doc = "Output voltage trim\nSteps of 25 mV"]
1123    #[inline(always)]
1124    pub fn dcdc_v14_trim(
1125        self,
1126    ) -> crate::common::RegisterFieldBool<27, 1, 0, DcdcV14Reg_SPEC, crate::common::RW> {
1127        crate::common::RegisterFieldBool::<27,1,0,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1128    }
1129
1130    #[doc = "Mximum current limit (high battery voltage mode)\nI = 30 mA * (1 + N)"]
1131    #[inline(always)]
1132    pub fn dcdc_v14_cur_lim_max_hv(
1133        self,
1134    ) -> crate::common::RegisterField<22, 0x1f, 1, 0, u8, u8, DcdcV14Reg_SPEC, crate::common::RW>
1135    {
1136        crate::common::RegisterField::<22,0x1f,1,0,u8,u8,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1137    }
1138
1139    #[doc = "Maximum current limit (low battery voltage mode)\nI = 30 mA * (1 + N)"]
1140    #[inline(always)]
1141    pub fn dcdc_v14_cur_lim_max_lv(
1142        self,
1143    ) -> crate::common::RegisterField<17, 0x1f, 1, 0, u8, u8, DcdcV14Reg_SPEC, crate::common::RW>
1144    {
1145        crate::common::RegisterField::<17,0x1f,1,0,u8,u8,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1146    }
1147
1148    #[doc = "Minimum current limit\nI = 30 mA * (1 + N)"]
1149    #[inline(always)]
1150    pub fn dcdc_v14_cur_lim_min(
1151        self,
1152    ) -> crate::common::RegisterField<12, 0x1f, 1, 0, u8, u8, DcdcV14Reg_SPEC, crate::common::RW>
1153    {
1154        crate::common::RegisterField::<12,0x1f,1,0,u8,u8,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1155    }
1156
1157    #[doc = "Idle time hysteresis\n0 - 3875 ns, 125 ns step size\nIDLE_MAX = IDLE_MIN + IDLE_HYST\nMaximum idle time before decreasing CUR_LIM"]
1158    #[inline(always)]
1159    pub fn dcdc_v14_idle_hyst(
1160        self,
1161    ) -> crate::common::RegisterField<7, 0x1f, 1, 0, u8, u8, DcdcV14Reg_SPEC, crate::common::RW>
1162    {
1163        crate::common::RegisterField::<7,0x1f,1,0,u8,u8,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1164    }
1165
1166    #[doc = "Minimum idle time\n0 - 3875 ns, 125 ns step size\nMinimum idle time, CUR_LIM is increased if this limit is not reached"]
1167    #[inline(always)]
1168    pub fn dcdc_v14_idle_min(
1169        self,
1170    ) -> crate::common::RegisterField<2, 0x1f, 1, 0, u8, u8, DcdcV14Reg_SPEC, crate::common::RW>
1171    {
1172        crate::common::RegisterField::<2,0x1f,1,0,u8,u8,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1173    }
1174
1175    #[doc = "Output enable (high battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1176    #[inline(always)]
1177    pub fn dcdc_v14_enable_hv(
1178        self,
1179    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcV14Reg_SPEC, crate::common::RW> {
1180        crate::common::RegisterFieldBool::<1,1,0,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1181    }
1182
1183    #[doc = "Output enable (low battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1184    #[inline(always)]
1185    pub fn dcdc_v14_enable_lv(
1186        self,
1187    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcV14Reg_SPEC, crate::common::RW> {
1188        crate::common::RegisterFieldBool::<0,1,0,DcdcV14Reg_SPEC,crate::common::RW>::from_register(self,0)
1189    }
1190}
1191impl ::core::default::Default for DcdcV14Reg {
1192    #[inline(always)]
1193    fn default() -> DcdcV14Reg {
1194        <crate::RegValueT<DcdcV14Reg_SPEC> as RegisterValue<_>>::new(55329347)
1195    }
1196}
1197
1198#[doc(hidden)]
1199#[derive(Copy, Clone, Eq, PartialEq)]
1200pub struct DcdcV18PReg_SPEC;
1201impl crate::sealed::RegSpec for DcdcV18PReg_SPEC {
1202    type DataType = u32;
1203}
1204
1205#[doc = "DCDC V18P Control Register"]
1206pub type DcdcV18PReg = crate::RegValueT<DcdcV18PReg_SPEC>;
1207
1208impl DcdcV18PReg {
1209    #[doc = "Fast current ramping (improves response time at the cost of more ripple)"]
1210    #[inline(always)]
1211    pub fn dcdc_v18p_fast_ramping(
1212        self,
1213    ) -> crate::common::RegisterFieldBool<31, 1, 0, DcdcV18PReg_SPEC, crate::common::RW> {
1214        crate::common::RegisterFieldBool::<31,1,0,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1215    }
1216
1217    #[doc = "Output voltage trim\nSteps of 25 mV"]
1218    #[inline(always)]
1219    pub fn dcdc_v18p_trim(
1220        self,
1221    ) -> crate::common::RegisterField<27, 0xf, 1, 0, u8, u8, DcdcV18PReg_SPEC, crate::common::RW>
1222    {
1223        crate::common::RegisterField::<27,0xf,1,0,u8,u8,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1224    }
1225
1226    #[doc = "Maximum current limit (high battery voltage mode)\nI = 30 mA * (1 + N)"]
1227    #[inline(always)]
1228    pub fn dcdc_v18p_cur_lim_max_hv(
1229        self,
1230    ) -> crate::common::RegisterField<22, 0x1f, 1, 0, u8, u8, DcdcV18PReg_SPEC, crate::common::RW>
1231    {
1232        crate::common::RegisterField::<22,0x1f,1,0,u8,u8,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1233    }
1234
1235    #[doc = "Maximum current limit (low battery voltage mode)\nI = 30 mA * (1 + N)"]
1236    #[inline(always)]
1237    pub fn dcdc_v18p_cur_lim_max_lv(
1238        self,
1239    ) -> crate::common::RegisterField<17, 0x1f, 1, 0, u8, u8, DcdcV18PReg_SPEC, crate::common::RW>
1240    {
1241        crate::common::RegisterField::<17,0x1f,1,0,u8,u8,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1242    }
1243
1244    #[doc = "Minimum current limit\nI = 30 mA * (1 + N)"]
1245    #[inline(always)]
1246    pub fn dcdc_v18p_cur_lim_min(
1247        self,
1248    ) -> crate::common::RegisterField<12, 0x1f, 1, 0, u8, u8, DcdcV18PReg_SPEC, crate::common::RW>
1249    {
1250        crate::common::RegisterField::<12,0x1f,1,0,u8,u8,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1251    }
1252
1253    #[doc = "Idle time hysteresis\n0 - 3875 ns, 125 ns step size\nIDLE_MAX = IDLE_MIN + IDLE_HYST\nMaximum idle time before decreasing CUR_LIM"]
1254    #[inline(always)]
1255    pub fn dcdc_v18p_idle_hyst(
1256        self,
1257    ) -> crate::common::RegisterField<7, 0x1f, 1, 0, u8, u8, DcdcV18PReg_SPEC, crate::common::RW>
1258    {
1259        crate::common::RegisterField::<7,0x1f,1,0,u8,u8,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1260    }
1261
1262    #[doc = "Minimum idle time\n0 - 3875 ns, 125 ns step size\nMinimum idle time, CUR_LIM is increased if this limit is not reached"]
1263    #[inline(always)]
1264    pub fn dcdc_v18p_idle_min(
1265        self,
1266    ) -> crate::common::RegisterField<2, 0x1f, 1, 0, u8, u8, DcdcV18PReg_SPEC, crate::common::RW>
1267    {
1268        crate::common::RegisterField::<2,0x1f,1,0,u8,u8,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1269    }
1270
1271    #[doc = "Output enable (high battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1272    #[inline(always)]
1273    pub fn dcdc_v18p_enable_hv(
1274        self,
1275    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcV18PReg_SPEC, crate::common::RW> {
1276        crate::common::RegisterFieldBool::<1,1,0,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1277    }
1278
1279    #[doc = "Output enable (low battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1280    #[inline(always)]
1281    pub fn dcdc_v18p_enable_lv(
1282        self,
1283    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcV18PReg_SPEC, crate::common::RW> {
1284        crate::common::RegisterFieldBool::<0,1,0,DcdcV18PReg_SPEC,crate::common::RW>::from_register(self,0)
1285    }
1286}
1287impl ::core::default::Default for DcdcV18PReg {
1288    #[inline(always)]
1289    fn default() -> DcdcV18PReg {
1290        <crate::RegValueT<DcdcV18PReg_SPEC> as RegisterValue<_>>::new(1207845442)
1291    }
1292}
1293
1294#[doc(hidden)]
1295#[derive(Copy, Clone, Eq, PartialEq)]
1296pub struct DcdcV18Reg_SPEC;
1297impl crate::sealed::RegSpec for DcdcV18Reg_SPEC {
1298    type DataType = u32;
1299}
1300
1301#[doc = "DCDC V18 Control Register"]
1302pub type DcdcV18Reg = crate::RegValueT<DcdcV18Reg_SPEC>;
1303
1304impl DcdcV18Reg {
1305    #[doc = "Fast current ramping (improves response time at the cost of more ripple)"]
1306    #[inline(always)]
1307    pub fn dcdc_v18_fast_ramping(
1308        self,
1309    ) -> crate::common::RegisterFieldBool<31, 1, 0, DcdcV18Reg_SPEC, crate::common::RW> {
1310        crate::common::RegisterFieldBool::<31,1,0,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1311    }
1312
1313    #[doc = "Output voltage trim\nSteps of 25 mV"]
1314    #[inline(always)]
1315    pub fn dcdc_v18_trim(
1316        self,
1317    ) -> crate::common::RegisterField<27, 0xf, 1, 0, u8, u8, DcdcV18Reg_SPEC, crate::common::RW>
1318    {
1319        crate::common::RegisterField::<27,0xf,1,0,u8,u8,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1320    }
1321
1322    #[doc = "Maximum current limit (high battery voltage mode)\nI = 30 mA * (1 + N)"]
1323    #[inline(always)]
1324    pub fn dcdc_v18_cur_lim_max_hv(
1325        self,
1326    ) -> crate::common::RegisterField<22, 0x1f, 1, 0, u8, u8, DcdcV18Reg_SPEC, crate::common::RW>
1327    {
1328        crate::common::RegisterField::<22,0x1f,1,0,u8,u8,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1329    }
1330
1331    #[doc = "Maximum current limit (low battery voltage mode)\nI = 30 mA * (1 + N)"]
1332    #[inline(always)]
1333    pub fn dcdc_v18_cur_lim_max_lv(
1334        self,
1335    ) -> crate::common::RegisterField<17, 0x1f, 1, 0, u8, u8, DcdcV18Reg_SPEC, crate::common::RW>
1336    {
1337        crate::common::RegisterField::<17,0x1f,1,0,u8,u8,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1338    }
1339
1340    #[doc = "Minimum current limit\nI = 30 mA * (1 + N)"]
1341    #[inline(always)]
1342    pub fn dcdc_v18_cur_lim_min(
1343        self,
1344    ) -> crate::common::RegisterField<12, 0x1f, 1, 0, u8, u8, DcdcV18Reg_SPEC, crate::common::RW>
1345    {
1346        crate::common::RegisterField::<12,0x1f,1,0,u8,u8,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1347    }
1348
1349    #[doc = "Idle time hysteresis\n0 - 3875 ns, 125 ns step size\nIDLE_MAX = IDLE_MIN + IDLE_HYST\nMaximum idle time before decreasing CUR_LIM"]
1350    #[inline(always)]
1351    pub fn dcdc_v18_idle_hyst(
1352        self,
1353    ) -> crate::common::RegisterField<7, 0x1f, 1, 0, u8, u8, DcdcV18Reg_SPEC, crate::common::RW>
1354    {
1355        crate::common::RegisterField::<7,0x1f,1,0,u8,u8,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1356    }
1357
1358    #[doc = "Minimum idle time\n0 - 3875 ns, 125 ns step size\nMinimum idle time, CUR_LIM is increased if this limit is not reached"]
1359    #[inline(always)]
1360    pub fn dcdc_v18_idle_min(
1361        self,
1362    ) -> crate::common::RegisterField<2, 0x1f, 1, 0, u8, u8, DcdcV18Reg_SPEC, crate::common::RW>
1363    {
1364        crate::common::RegisterField::<2,0x1f,1,0,u8,u8,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1365    }
1366
1367    #[doc = "Output enable (high battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1368    #[inline(always)]
1369    pub fn dcdc_v18_enable_hv(
1370        self,
1371    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcV18Reg_SPEC, crate::common::RW> {
1372        crate::common::RegisterFieldBool::<1,1,0,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1373    }
1374
1375    #[doc = "Output enable (low battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1376    #[inline(always)]
1377    pub fn dcdc_v18_enable_lv(
1378        self,
1379    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcV18Reg_SPEC, crate::common::RW> {
1380        crate::common::RegisterFieldBool::<0,1,0,DcdcV18Reg_SPEC,crate::common::RW>::from_register(self,0)
1381    }
1382}
1383impl ::core::default::Default for DcdcV18Reg {
1384    #[inline(always)]
1385    fn default() -> DcdcV18Reg {
1386        <crate::RegValueT<DcdcV18Reg_SPEC> as RegisterValue<_>>::new(1207845442)
1387    }
1388}
1389
1390#[doc(hidden)]
1391#[derive(Copy, Clone, Eq, PartialEq)]
1392pub struct DcdcVddReg_SPEC;
1393impl crate::sealed::RegSpec for DcdcVddReg_SPEC {
1394    type DataType = u32;
1395}
1396
1397#[doc = "DCDC VDD Control Register"]
1398pub type DcdcVddReg = crate::RegValueT<DcdcVddReg_SPEC>;
1399
1400impl DcdcVddReg {
1401    #[doc = "Fast current ramping (improves response time at the cost of more ripple)"]
1402    #[inline(always)]
1403    pub fn dcdc_vdd_fast_ramping(
1404        self,
1405    ) -> crate::common::RegisterFieldBool<31, 1, 0, DcdcVddReg_SPEC, crate::common::RW> {
1406        crate::common::RegisterFieldBool::<31,1,0,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1407    }
1408
1409    #[doc = "Output voltage trim\nSteps of 25 mV"]
1410    #[inline(always)]
1411    pub fn dcdc_vdd_trim(
1412        self,
1413    ) -> crate::common::RegisterField<27, 0x7, 1, 0, u8, u8, DcdcVddReg_SPEC, crate::common::RW>
1414    {
1415        crate::common::RegisterField::<27,0x7,1,0,u8,u8,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1416    }
1417
1418    #[doc = "Maximum current limit (high battery voltage mode)\nI = 30 mA * (1 + N)"]
1419    #[inline(always)]
1420    pub fn dcdc_vdd_cur_lim_max_hv(
1421        self,
1422    ) -> crate::common::RegisterField<22, 0x1f, 1, 0, u8, u8, DcdcVddReg_SPEC, crate::common::RW>
1423    {
1424        crate::common::RegisterField::<22,0x1f,1,0,u8,u8,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1425    }
1426
1427    #[doc = "Maximum current limit (low battery voltage mode)\nI = 30 mA * (1 + N)"]
1428    #[inline(always)]
1429    pub fn dcdc_vdd_cur_lim_max_lv(
1430        self,
1431    ) -> crate::common::RegisterField<17, 0x1f, 1, 0, u8, u8, DcdcVddReg_SPEC, crate::common::RW>
1432    {
1433        crate::common::RegisterField::<17,0x1f,1,0,u8,u8,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1434    }
1435
1436    #[doc = "Minimum current limit\nI = 30 mA * (1 + N)"]
1437    #[inline(always)]
1438    pub fn dcdc_vdd_cur_lim_min(
1439        self,
1440    ) -> crate::common::RegisterField<12, 0x1f, 1, 0, u8, u8, DcdcVddReg_SPEC, crate::common::RW>
1441    {
1442        crate::common::RegisterField::<12,0x1f,1,0,u8,u8,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1443    }
1444
1445    #[doc = "Idle time hysteresis\n0 - 3875 ns, 125 ns step size\nIDLE_MAX = IDLE_MIN + IDLE_HYST\nMaximum idle time before decreasing CUR_LIM"]
1446    #[inline(always)]
1447    pub fn dcdc_vdd_idle_hyst(
1448        self,
1449    ) -> crate::common::RegisterField<7, 0x1f, 1, 0, u8, u8, DcdcVddReg_SPEC, crate::common::RW>
1450    {
1451        crate::common::RegisterField::<7,0x1f,1,0,u8,u8,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1452    }
1453
1454    #[doc = "Minimum idle time\n0 - 3875 ns, 125 ns step size\nMinimum idle time, CUR_LIM is increased if this limit is not reached"]
1455    #[inline(always)]
1456    pub fn dcdc_vdd_idle_min(
1457        self,
1458    ) -> crate::common::RegisterField<2, 0x1f, 1, 0, u8, u8, DcdcVddReg_SPEC, crate::common::RW>
1459    {
1460        crate::common::RegisterField::<2,0x1f,1,0,u8,u8,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1461    }
1462
1463    #[doc = "Output enable (high battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1464    #[inline(always)]
1465    pub fn dcdc_vdd_enable_hv(
1466        self,
1467    ) -> crate::common::RegisterFieldBool<1, 1, 0, DcdcVddReg_SPEC, crate::common::RW> {
1468        crate::common::RegisterFieldBool::<1,1,0,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1469    }
1470
1471    #[doc = "Output enable (low battery voltage mode)\n0 = Disabled\n1 = Enabled"]
1472    #[inline(always)]
1473    pub fn dcdc_vdd_enable_lv(
1474        self,
1475    ) -> crate::common::RegisterFieldBool<0, 1, 0, DcdcVddReg_SPEC, crate::common::RW> {
1476        crate::common::RegisterFieldBool::<0,1,0,DcdcVddReg_SPEC,crate::common::RW>::from_register(self,0)
1477    }
1478}
1479impl ::core::default::Default for DcdcVddReg {
1480    #[inline(always)]
1481    fn default() -> DcdcVddReg {
1482        <crate::RegValueT<DcdcVddReg_SPEC> as RegisterValue<_>>::new(639255107)
1483    }
1484}
da14697_pac/dcdc.rs

da14697_pac/
dcdc.rs
