da14697_pac/
cmac.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:38 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"CMAC registers"]
28unsafe impl ::core::marker::Send for super::Cmac {}
29unsafe impl ::core::marker::Sync for super::Cmac {}
30impl super::Cmac {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "CMAC and System Control Register"]
38    #[inline(always)]
39    pub const fn cm_ctrl_sys_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::CmCtrlSysReg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::CmCtrlSysReg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(8192usize),
45            )
46        }
47    }
48
49    #[doc = "Diagnostic IRQ on Word1 - Edge Register"]
50    #[inline(always)]
51    pub const fn cm_diag_irq1_edge_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::CmDiagIrq1EdgeReg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(8452usize),
57            )
58        }
59    }
60
61    #[doc = "Diagnostic IRQ on Word1 - Mask Register"]
62    #[inline(always)]
63    pub const fn cm_diag_irq1_mask_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::CmDiagIrq1MaskReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(8460usize),
69            )
70        }
71    }
72
73    #[doc = "Diagnostic IRQ on Word1 - Status Register"]
74    #[inline(always)]
75    pub const fn cm_diag_irq1_stat_reg(
76        &self,
77    ) -> &'static crate::common::Reg<self::CmDiagIrq1StatReg_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::CmDiagIrq1StatReg_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(8456usize),
81            )
82        }
83    }
84
85    #[doc = "Diagnostic IRQ on Word1 - Word1 Register"]
86    #[inline(always)]
87    pub const fn cm_diag_irq1_word_reg(
88        &self,
89    ) -> &'static crate::common::Reg<self::CmDiagIrq1WordReg_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::CmDiagIrq1WordReg_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(8448usize),
93            )
94        }
95    }
96
97    #[doc = "CMAC Watch Dog Control Register"]
98    #[inline(always)]
99    pub const fn cm_wdog_reg(
100        &self,
101    ) -> &'static crate::common::Reg<self::CmWdogReg_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::CmWdogReg_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(8196usize),
105            )
106        }
107    }
108}
109#[doc(hidden)]
110#[derive(Copy, Clone, Eq, PartialEq)]
111pub struct CmCtrlSysReg_SPEC;
112impl crate::sealed::RegSpec for CmCtrlSysReg_SPEC {
113    type DataType = u32;
114}
115
116#[doc = "CMAC and System Control Register"]
117pub type CmCtrlSysReg = crate::RegValueT<CmCtrlSysReg_SPEC>;
118
119impl CmCtrlSysReg {
120    #[doc = "Always read as \"1\".\nNote: Creating an always non-zero register value, making easier a visual check of register when power domain is off."]
121    #[inline(always)]
122    pub fn cmac_const_1(
123        self,
124    ) -> crate::common::RegisterFieldBool<31, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
125        crate::common::RegisterFieldBool::<31,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
126    }
127
128    #[inline(always)]
129    pub fn cmac_lockup_state(
130        self,
131    ) -> crate::common::RegisterFieldBool<15, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
132        crate::common::RegisterFieldBool::<15,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
133    }
134
135    #[inline(always)]
136    pub fn cmac_wdog_expire_state(
137        self,
138    ) -> crate::common::RegisterFieldBool<14, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
139        crate::common::RegisterFieldBool::<14,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
140    }
141
142    #[inline(always)]
143    pub fn cmac_sysmemctrl_error_state(
144        self,
145    ) -> crate::common::RegisterFieldBool<13, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
146        crate::common::RegisterFieldBool::<13,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
147    }
148
149    #[inline(always)]
150    pub fn cmac_cpu_error_state(
151        self,
152    ) -> crate::common::RegisterFieldBool<12, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
153        crate::common::RegisterFieldBool::<12,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
154    }
155
156    #[inline(always)]
157    pub fn cmac_bs_error_state(
158        self,
159    ) -> crate::common::RegisterFieldBool<11, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
160        crate::common::RegisterFieldBool::<11,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
161    }
162
163    #[inline(always)]
164    pub fn cmac_fw_error_state(
165        self,
166    ) -> crate::common::RegisterFieldBool<10, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
167        crate::common::RegisterFieldBool::<10,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
168    }
169
170    #[inline(always)]
171    pub fn mcpu_sleeping_state(
172        self,
173    ) -> crate::common::RegisterFieldBool<9, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
174        crate::common::RegisterFieldBool::<9,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
175    }
176
177    #[doc = "The state of the CMAC M0+ reset signal.\nNote that this reset is driven also by CLK_RADIO_REG->CMAC_SYNCH_RESET."]
178    #[inline(always)]
179    pub fn cmac_rst_mcpu_state(
180        self,
181    ) -> crate::common::RegisterFieldBool<8, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
182        crate::common::RegisterFieldBool::<8,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
183    }
184
185    #[inline(always)]
186    pub fn cmac_rst_bs_state(
187        self,
188    ) -> crate::common::RegisterFieldBool<7, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
189        crate::common::RegisterFieldBool::<7,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
190    }
191
192    #[doc = "Writing \"0\" will have no effect.\nWriting \"1\" will clear the CMAC2SYS_IRQ, a process that depends on the state of CMAC and the relationship of the PCLK and CMAC clocks.\nReading will return \"1\" as long as the clearing process is pending, otherwise it will return \"0\"."]
193    #[inline(always)]
194    pub fn cmac2sys_irq_clr(
195        self,
196    ) -> crate::common::RegisterFieldBool<1, 1, 0, CmCtrlSysReg_SPEC, crate::common::RW> {
197        crate::common::RegisterFieldBool::<1,1,0,CmCtrlSysReg_SPEC,crate::common::RW>::from_register(self,0)
198    }
199
200    #[doc = "The current state of the CMAC2SYS_IRQ signal."]
201    #[inline(always)]
202    pub fn cmac2sys_irq_state(
203        self,
204    ) -> crate::common::RegisterFieldBool<0, 1, 0, CmCtrlSysReg_SPEC, crate::common::R> {
205        crate::common::RegisterFieldBool::<0,1,0,CmCtrlSysReg_SPEC,crate::common::R>::from_register(self,0)
206    }
207}
208impl ::core::default::Default for CmCtrlSysReg {
209    #[inline(always)]
210    fn default() -> CmCtrlSysReg {
211        <crate::RegValueT<CmCtrlSysReg_SPEC> as RegisterValue<_>>::new(2147483647)
212    }
213}
214
215#[doc(hidden)]
216#[derive(Copy, Clone, Eq, PartialEq)]
217pub struct CmDiagIrq1EdgeReg_SPEC;
218impl crate::sealed::RegSpec for CmDiagIrq1EdgeReg_SPEC {
219    type DataType = u32;
220}
221
222#[doc = "Diagnostic IRQ on Word1 - Edge Register"]
223pub type CmDiagIrq1EdgeReg = crate::RegValueT<CmDiagIrq1EdgeReg_SPEC>;
224
225impl CmDiagIrq1EdgeReg {
226    #[doc = "Refer to bit 0."]
227    #[inline(always)]
228    pub fn diag1_phy_tx_en_rfcu(
229        self,
230    ) -> crate::common::RegisterFieldBool<7, 1, 0, CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
231        crate::common::RegisterFieldBool::<7,1,0,CmDiagIrq1EdgeReg_SPEC,crate::common::RW>::from_register(self,0)
232    }
233
234    #[doc = "Refer to bit 0."]
235    #[inline(always)]
236    pub fn diag1_phy_rx_en_rfcu(
237        self,
238    ) -> crate::common::RegisterFieldBool<6, 1, 0, CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
239        crate::common::RegisterFieldBool::<6,1,0,CmDiagIrq1EdgeReg_SPEC,crate::common::RW>::from_register(self,0)
240    }
241
242    #[doc = "Refer to bit 0."]
243    #[inline(always)]
244    pub fn diag1_dcf_26(
245        self,
246    ) -> crate::common::RegisterFieldBool<5, 1, 0, CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
247        crate::common::RegisterFieldBool::<5,1,0,CmDiagIrq1EdgeReg_SPEC,crate::common::RW>::from_register(self,0)
248    }
249
250    #[doc = "Refer to bit 0."]
251    #[inline(always)]
252    pub fn diag1_dcf_25(
253        self,
254    ) -> crate::common::RegisterFieldBool<4, 1, 0, CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
255        crate::common::RegisterFieldBool::<4,1,0,CmDiagIrq1EdgeReg_SPEC,crate::common::RW>::from_register(self,0)
256    }
257
258    #[doc = "Refer to bit 0."]
259    #[inline(always)]
260    pub fn diag1_dcf_24(
261        self,
262    ) -> crate::common::RegisterFieldBool<3, 1, 0, CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
263        crate::common::RegisterFieldBool::<3,1,0,CmDiagIrq1EdgeReg_SPEC,crate::common::RW>::from_register(self,0)
264    }
265
266    #[doc = "Refer to bit 0."]
267    #[inline(always)]
268    pub fn diag1_dcf_23(
269        self,
270    ) -> crate::common::RegisterFieldBool<2, 1, 0, CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
271        crate::common::RegisterFieldBool::<2,1,0,CmDiagIrq1EdgeReg_SPEC,crate::common::RW>::from_register(self,0)
272    }
273
274    #[doc = "Refer to bit 0."]
275    #[inline(always)]
276    pub fn diag1_dcf_22(
277        self,
278    ) -> crate::common::RegisterFieldBool<1, 1, 0, CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
279        crate::common::RegisterFieldBool::<1,1,0,CmDiagIrq1EdgeReg_SPEC,crate::common::RW>::from_register(self,0)
280    }
281
282    #[doc = "0: The positive edge is selected to set the corresponding bit of CM_DIAG_IRQ1_STAT_REG.\n1: The negative edge is selected."]
283    #[inline(always)]
284    pub fn diag1_dcf_21(
285        self,
286    ) -> crate::common::RegisterFieldBool<0, 1, 0, CmDiagIrq1EdgeReg_SPEC, crate::common::RW> {
287        crate::common::RegisterFieldBool::<0,1,0,CmDiagIrq1EdgeReg_SPEC,crate::common::RW>::from_register(self,0)
288    }
289}
290impl ::core::default::Default for CmDiagIrq1EdgeReg {
291    #[inline(always)]
292    fn default() -> CmDiagIrq1EdgeReg {
293        <crate::RegValueT<CmDiagIrq1EdgeReg_SPEC> as RegisterValue<_>>::new(0)
294    }
295}
296
297#[doc(hidden)]
298#[derive(Copy, Clone, Eq, PartialEq)]
299pub struct CmDiagIrq1MaskReg_SPEC;
300impl crate::sealed::RegSpec for CmDiagIrq1MaskReg_SPEC {
301    type DataType = u32;
302}
303
304#[doc = "Diagnostic IRQ on Word1 - Mask Register"]
305pub type CmDiagIrq1MaskReg = crate::RegValueT<CmDiagIrq1MaskReg_SPEC>;
306
307impl CmDiagIrq1MaskReg {
308    #[doc = "Refer to bit 0."]
309    #[inline(always)]
310    pub fn diag1_signal_detected(
311        self,
312    ) -> crate::common::RegisterFieldBool<10, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
313        crate::common::RegisterFieldBool::<10,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
314    }
315
316    #[doc = "Refer to bit 0."]
317    #[inline(always)]
318    pub fn diag1_match0101(
319        self,
320    ) -> crate::common::RegisterFieldBool<9, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
321        crate::common::RegisterFieldBool::<9,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
322    }
323
324    #[doc = "Refer to bit 0."]
325    #[inline(always)]
326    pub fn diag1_sync_found(
327        self,
328    ) -> crate::common::RegisterFieldBool<8, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
329        crate::common::RegisterFieldBool::<8,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
330    }
331
332    #[doc = "Refer to bit 0."]
333    #[inline(always)]
334    pub fn diag1_phy_tx_en_rfcu(
335        self,
336    ) -> crate::common::RegisterFieldBool<7, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
337        crate::common::RegisterFieldBool::<7,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
338    }
339
340    #[doc = "Refer to bit 0."]
341    #[inline(always)]
342    pub fn diag1_phy_rx_en_rfcu(
343        self,
344    ) -> crate::common::RegisterFieldBool<6, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
345        crate::common::RegisterFieldBool::<6,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
346    }
347
348    #[doc = "Refer to bit 0."]
349    #[inline(always)]
350    pub fn diag1_dcf_26(
351        self,
352    ) -> crate::common::RegisterFieldBool<5, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
353        crate::common::RegisterFieldBool::<5,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
354    }
355
356    #[doc = "Refer to bit 0."]
357    #[inline(always)]
358    pub fn diag1_dcf_25(
359        self,
360    ) -> crate::common::RegisterFieldBool<4, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
361        crate::common::RegisterFieldBool::<4,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
362    }
363
364    #[doc = "Refer to bit 0."]
365    #[inline(always)]
366    pub fn diag1_dcf_24(
367        self,
368    ) -> crate::common::RegisterFieldBool<3, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
369        crate::common::RegisterFieldBool::<3,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
370    }
371
372    #[doc = "Refer to bit 0."]
373    #[inline(always)]
374    pub fn diag1_dcf_23(
375        self,
376    ) -> crate::common::RegisterFieldBool<2, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
377        crate::common::RegisterFieldBool::<2,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
378    }
379
380    #[doc = "Refer to bit 0."]
381    #[inline(always)]
382    pub fn diag1_dcf_22(
383        self,
384    ) -> crate::common::RegisterFieldBool<1, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
385        crate::common::RegisterFieldBool::<1,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
386    }
387
388    #[doc = "1: Raise an DIAG_IRQ when the corresponding bit of CM_DIAG_IRQ1_STAT_REG is also \"1\".\n0: Mask the state of the corresponding bit of CM_DIAG_IRQ1_STAT_REG in order to not trigger DIAG_IRQ."]
389    #[inline(always)]
390    pub fn diag1_dcf_21(
391        self,
392    ) -> crate::common::RegisterFieldBool<0, 1, 0, CmDiagIrq1MaskReg_SPEC, crate::common::RW> {
393        crate::common::RegisterFieldBool::<0,1,0,CmDiagIrq1MaskReg_SPEC,crate::common::RW>::from_register(self,0)
394    }
395}
396impl ::core::default::Default for CmDiagIrq1MaskReg {
397    #[inline(always)]
398    fn default() -> CmDiagIrq1MaskReg {
399        <crate::RegValueT<CmDiagIrq1MaskReg_SPEC> as RegisterValue<_>>::new(0)
400    }
401}
402
403#[doc(hidden)]
404#[derive(Copy, Clone, Eq, PartialEq)]
405pub struct CmDiagIrq1StatReg_SPEC;
406impl crate::sealed::RegSpec for CmDiagIrq1StatReg_SPEC {
407    type DataType = u32;
408}
409
410#[doc = "Diagnostic IRQ on Word1 - Status Register"]
411pub type CmDiagIrq1StatReg = crate::RegValueT<CmDiagIrq1StatReg_SPEC>;
412
413impl CmDiagIrq1StatReg {
414    #[doc = "Refer to bit 0."]
415    #[inline(always)]
416    pub fn diag1_signal_detected(
417        self,
418    ) -> crate::common::RegisterFieldBool<10, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
419        crate::common::RegisterFieldBool::<10,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
420    }
421
422    #[doc = "Refer to bit 0."]
423    #[inline(always)]
424    pub fn diag1_match0101(
425        self,
426    ) -> crate::common::RegisterFieldBool<9, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
427        crate::common::RegisterFieldBool::<9,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
428    }
429
430    #[doc = "Refer to bit 0."]
431    #[inline(always)]
432    pub fn diag1_sync_found(
433        self,
434    ) -> crate::common::RegisterFieldBool<8, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
435        crate::common::RegisterFieldBool::<8,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
436    }
437
438    #[doc = "Refer to bit 0."]
439    #[inline(always)]
440    pub fn diag1_phy_tx_en_rfcu(
441        self,
442    ) -> crate::common::RegisterFieldBool<7, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
443        crate::common::RegisterFieldBool::<7,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
444    }
445
446    #[doc = "Refer to bit 0."]
447    #[inline(always)]
448    pub fn diag1_phy_rx_en_rfcu(
449        self,
450    ) -> crate::common::RegisterFieldBool<6, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
451        crate::common::RegisterFieldBool::<6,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
452    }
453
454    #[doc = "Refer to bit 0."]
455    #[inline(always)]
456    pub fn diag1_dcf_26(
457        self,
458    ) -> crate::common::RegisterFieldBool<5, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
459        crate::common::RegisterFieldBool::<5,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
460    }
461
462    #[doc = "Refer to bit 0."]
463    #[inline(always)]
464    pub fn diag1_dcf_25(
465        self,
466    ) -> crate::common::RegisterFieldBool<4, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
467        crate::common::RegisterFieldBool::<4,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
468    }
469
470    #[doc = "Refer to bit 0."]
471    #[inline(always)]
472    pub fn diag1_dcf_24(
473        self,
474    ) -> crate::common::RegisterFieldBool<3, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
475        crate::common::RegisterFieldBool::<3,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
476    }
477
478    #[doc = "Refer to bit 0."]
479    #[inline(always)]
480    pub fn diag1_dcf_23(
481        self,
482    ) -> crate::common::RegisterFieldBool<2, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
483        crate::common::RegisterFieldBool::<2,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
484    }
485
486    #[doc = "Refer to bit 0."]
487    #[inline(always)]
488    pub fn diag1_dcf_22(
489        self,
490    ) -> crate::common::RegisterFieldBool<1, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
491        crate::common::RegisterFieldBool::<1,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
492    }
493
494    #[doc = "1: the corresponding event is pending.\n0: the corresponding event is not pending.\nWriting a \'1\' will clear the corresponding bit.\nWriting a \'0\' into a bit will have no effect.\nUse this register to detect and acknowledge the source that triggers the DIAG_IRQ."]
495    #[inline(always)]
496    pub fn diag1_dcf_21(
497        self,
498    ) -> crate::common::RegisterFieldBool<0, 1, 0, CmDiagIrq1StatReg_SPEC, crate::common::RW> {
499        crate::common::RegisterFieldBool::<0,1,0,CmDiagIrq1StatReg_SPEC,crate::common::RW>::from_register(self,0)
500    }
501}
502impl ::core::default::Default for CmDiagIrq1StatReg {
503    #[inline(always)]
504    fn default() -> CmDiagIrq1StatReg {
505        <crate::RegValueT<CmDiagIrq1StatReg_SPEC> as RegisterValue<_>>::new(0)
506    }
507}
508
509#[doc(hidden)]
510#[derive(Copy, Clone, Eq, PartialEq)]
511pub struct CmDiagIrq1WordReg_SPEC;
512impl crate::sealed::RegSpec for CmDiagIrq1WordReg_SPEC {
513    type DataType = u32;
514}
515
516#[doc = "Diagnostic IRQ on Word1 - Word1 Register"]
517pub type CmDiagIrq1WordReg = crate::RegValueT<CmDiagIrq1WordReg_SPEC>;
518
519impl CmDiagIrq1WordReg {
520    #[doc = "Refer to bit 0."]
521    #[inline(always)]
522    pub fn diag1_signal_detected(
523        self,
524    ) -> crate::common::RegisterFieldBool<10, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
525        crate::common::RegisterFieldBool::<10,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
526    }
527
528    #[doc = "Refer to bit 0."]
529    #[inline(always)]
530    pub fn diag1_match0101(
531        self,
532    ) -> crate::common::RegisterFieldBool<9, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
533        crate::common::RegisterFieldBool::<9,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
534    }
535
536    #[doc = "Refer to bit 0."]
537    #[inline(always)]
538    pub fn diag1_sync_found(
539        self,
540    ) -> crate::common::RegisterFieldBool<8, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
541        crate::common::RegisterFieldBool::<8,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
542    }
543
544    #[doc = "Refer to bit 0."]
545    #[inline(always)]
546    pub fn diag1_phy_tx_en_rfcu(
547        self,
548    ) -> crate::common::RegisterFieldBool<7, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
549        crate::common::RegisterFieldBool::<7,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
550    }
551
552    #[doc = "Refer to bit 0."]
553    #[inline(always)]
554    pub fn diag1_phy_rx_en_rfcu(
555        self,
556    ) -> crate::common::RegisterFieldBool<6, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
557        crate::common::RegisterFieldBool::<6,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
558    }
559
560    #[doc = "Refer to bit 0."]
561    #[inline(always)]
562    pub fn diag1_dcf_26(
563        self,
564    ) -> crate::common::RegisterFieldBool<5, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
565        crate::common::RegisterFieldBool::<5,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
566    }
567
568    #[doc = "Refer to bit 0."]
569    #[inline(always)]
570    pub fn diag1_dcf_25(
571        self,
572    ) -> crate::common::RegisterFieldBool<4, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
573        crate::common::RegisterFieldBool::<4,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
574    }
575
576    #[doc = "Refer to bit 0."]
577    #[inline(always)]
578    pub fn diag1_dcf_24(
579        self,
580    ) -> crate::common::RegisterFieldBool<3, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
581        crate::common::RegisterFieldBool::<3,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
582    }
583
584    #[doc = "Refer to bit 0."]
585    #[inline(always)]
586    pub fn diag1_dcf_23(
587        self,
588    ) -> crate::common::RegisterFieldBool<2, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
589        crate::common::RegisterFieldBool::<2,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
590    }
591
592    #[doc = "Refer to bit 0."]
593    #[inline(always)]
594    pub fn diag1_dcf_22(
595        self,
596    ) -> crate::common::RegisterFieldBool<1, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
597        crate::common::RegisterFieldBool::<1,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
598    }
599
600    #[doc = "Same signal as the one in CM_DIAG_WORD1_REG.\nRefer to CM_DIAG_WORD1_REG for signal description."]
601    #[inline(always)]
602    pub fn diag1_dcf_21(
603        self,
604    ) -> crate::common::RegisterFieldBool<0, 1, 0, CmDiagIrq1WordReg_SPEC, crate::common::R> {
605        crate::common::RegisterFieldBool::<0,1,0,CmDiagIrq1WordReg_SPEC,crate::common::R>::from_register(self,0)
606    }
607}
608impl ::core::default::Default for CmDiagIrq1WordReg {
609    #[inline(always)]
610    fn default() -> CmDiagIrq1WordReg {
611        <crate::RegValueT<CmDiagIrq1WordReg_SPEC> as RegisterValue<_>>::new(0)
612    }
613}
614
615#[doc(hidden)]
616#[derive(Copy, Clone, Eq, PartialEq)]
617pub struct CmWdogReg_SPEC;
618impl crate::sealed::RegSpec for CmWdogReg_SPEC {
619    type DataType = u32;
620}
621
622#[doc = "CMAC Watch Dog Control Register"]
623pub type CmWdogReg = crate::RegValueT<CmWdogReg_SPEC>;
624
625impl CmWdogReg {
626    #[doc = "A read-only copy of SET_FREEZE_REG->FRZ_CMAC_WDOG value."]
627    #[inline(always)]
628    pub fn sys2cmac_wdog_freeze(
629        self,
630    ) -> crate::common::RegisterFieldBool<31, 1, 0, CmWdogReg_SPEC, crate::common::R> {
631        crate::common::RegisterFieldBool::<31,1,0,CmWdogReg_SPEC,crate::common::R>::from_register(self,0)
632    }
633
634    #[doc = "Setting to \'1\' will mask the SYS2CMAC_WDOG_FREEZE, which is provided by SET_FREEZE_REG->FRZ_CMAC_WDOG.\nSetting to \"1\" can be done only by writing at the same time CM_WDOG_WRITE_VALID with ones.\nThe field can be only set to \'1\', so it can be set during the initilization and it will not change during the reloadings.\nIt can be reseted either via power cycling the Power Domain or via the CLK_RADIO_REG->CMAC_SYNCH_RESET."]
635    #[inline(always)]
636    pub fn sys2cmac_wdog_freeze_dis(
637        self,
638    ) -> crate::common::RegisterFieldBool<30, 1, 0, CmWdogReg_SPEC, crate::common::RW> {
639        crate::common::RegisterFieldBool::<30,1,0,CmWdogReg_SPEC,crate::common::RW>::from_register(self,0)
640    }
641
642    #[doc = "This bit automatically is set to \"1\" as soon as CM_WDOG_CNT=0, causing CM_WDOG_CNT to start counting again from the value of \"16\" and also asserting CM_ERROR_REG->CM_WDOG_EXPIRE_ERR.\nIf the SW will write CM_WDOG_EXPIRE = 0 and CM_WDOG_CNT=0, then at the next WDOG clock cycle the CM_WDOG_EXPIRE will automatically be set to to \"1\".\nIf the SW will write CM_WDOG_EXPIRE = 1 and CM_WDOG_CNT=0, then at the next WDOG clock cycle the CM_WDOG_SYS_RST_REQ will automatically be set to \"1\".\nThe CM_WDOG_SYS_RST_REQ will reset the system and will update the RESET_STAT_REG->CMAC_WDOGRESET_STAT.\nRefer also to CM_EXC_STAT_REG->EXC_WDOG_EARLY."]
643    #[inline(always)]
644    pub fn cm_wdog_expire(
645        self,
646    ) -> crate::common::RegisterFieldBool<29, 1, 0, CmWdogReg_SPEC, crate::common::RW> {
647        crate::common::RegisterFieldBool::<29,1,0,CmWdogReg_SPEC,crate::common::RW>::from_register(self,0)
648    }
649
650    #[doc = "Refer to CM_WDOG_EXPIRE."]
651    #[inline(always)]
652    pub fn cm_wdog_sys_rst_req(
653        self,
654    ) -> crate::common::RegisterFieldBool<28, 1, 0, CmWdogReg_SPEC, crate::common::R> {
655        crate::common::RegisterFieldBool::<28,1,0,CmWdogReg_SPEC,crate::common::R>::from_register(self,0)
656    }
657
658    #[doc = "In order to allow a write of any of the remaining fields, this value must be also written simultaneously with the value \"3\".\nReading this field will return always \'0\'."]
659    #[inline(always)]
660    pub fn cm_wdog_write_valid(
661        self,
662    ) -> crate::common::RegisterField<17, 0x3, 1, 0, u8, u8, CmWdogReg_SPEC, crate::common::W> {
663        crate::common::RegisterField::<17,0x3,1,0,u8,u8,CmWdogReg_SPEC,crate::common::W>::from_register(self,0)
664    }
665
666    #[doc = "Provides access to the counter, which counts down every 10.24 msec.\nFW should reload the WDOG counter by writing to CM_WDOG_REG the value (CM_WDOG_CNT | CM_WDOG_WRITE_VALID), i.e. write can be done only by writing at the same time CM_WDOG_WRITE_VALID with ones.\nThe counter will start counting immediately after the power up of the Power Domain."]
667    #[inline(always)]
668    pub fn cm_wdog_cnt(
669        self,
670    ) -> crate::common::RegisterField<0, 0x1fff, 1, 0, u16, u16, CmWdogReg_SPEC, crate::common::RW>
671    {
672        crate::common::RegisterField::<0,0x1fff,1,0,u16,u16,CmWdogReg_SPEC,crate::common::RW>::from_register(self,0)
673    }
674}
675impl ::core::default::Default for CmWdogReg {
676    #[inline(always)]
677    fn default() -> CmWdogReg {
678        <crate::RegValueT<CmWdogReg_SPEC> as RegisterValue<_>>::new(8191)
679    }
680}
da14697_pac/cmac.rs

da14697_pac/
cmac.rs
