da14697_pac/
anamisc.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:38 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"ANAMISC registers"]
28unsafe impl ::core::marker::Send for super::Anamisc {}
29unsafe impl ::core::marker::Sync for super::Anamisc {}
30impl super::Anamisc {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Count value for oscillator calibration"]
38    #[inline(always)]
39    pub const fn clk_ref_cnt_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::ClkRefCntReg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::ClkRefCntReg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(20usize),
45            )
46        }
47    }
48
49    #[doc = "Select clock for oscillator calibration"]
50    #[inline(always)]
51    pub const fn clk_ref_sel_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::ClkRefSelReg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::ClkRefSelReg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(16usize),
57            )
58        }
59    }
60
61    #[doc = "DIVN reference cycles, lower 16 bits"]
62    #[inline(always)]
63    pub const fn clk_ref_val_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::ClkRefValReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::ClkRefValReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(24usize),
69            )
70        }
71    }
72}
73#[doc(hidden)]
74#[derive(Copy, Clone, Eq, PartialEq)]
75pub struct ClkRefCntReg_SPEC;
76impl crate::sealed::RegSpec for ClkRefCntReg_SPEC {
77    type DataType = u32;
78}
79
80#[doc = "Count value for oscillator calibration"]
81pub type ClkRefCntReg = crate::RegValueT<ClkRefCntReg_SPEC>;
82
83impl ClkRefCntReg {
84    #[doc = "Indicates the calibration time, with a decrement counter to 1."]
85    #[inline(always)]
86    pub fn ref_cnt_val(
87        self,
88    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, ClkRefCntReg_SPEC, crate::common::RW>
89    {
90        crate::common::RegisterField::<
91            0,
92            0xffff,
93            1,
94            0,
95            u16,
96            u16,
97            ClkRefCntReg_SPEC,
98            crate::common::RW,
99        >::from_register(self, 0)
100    }
101}
102impl ::core::default::Default for ClkRefCntReg {
103    #[inline(always)]
104    fn default() -> ClkRefCntReg {
105        <crate::RegValueT<ClkRefCntReg_SPEC> as RegisterValue<_>>::new(0)
106    }
107}
108
109#[doc(hidden)]
110#[derive(Copy, Clone, Eq, PartialEq)]
111pub struct ClkRefSelReg_SPEC;
112impl crate::sealed::RegSpec for ClkRefSelReg_SPEC {
113    type DataType = u32;
114}
115
116#[doc = "Select clock for oscillator calibration"]
117pub type ClkRefSelReg = crate::RegValueT<ClkRefSelReg_SPEC>;
118
119impl ClkRefSelReg {
120    #[doc = "Select reference clock input to be used in calibration:\n0x0 : DIVN clock\n0x1 : RC32K\n0x2 : RC32M\n0x3 : XTAL32K\n0x4 : RCOSC\n0x5, 0x6, 0x7: Reserved"]
121    #[inline(always)]
122    pub fn cal_clk_sel(
123        self,
124    ) -> crate::common::RegisterField<5, 0x7, 1, 0, u8, u8, ClkRefSelReg_SPEC, crate::common::RW>
125    {
126        crate::common::RegisterField::<5,0x7,1,0,u8,u8,ClkRefSelReg_SPEC,crate::common::RW>::from_register(self,0)
127    }
128
129    #[doc = "0 : Enable XTAL_CNT counter by the REF_CLK selected by REF_CLK_SEL.\n1 : Enable XTAL_CNT counter from an external input."]
130    #[inline(always)]
131    pub fn ext_cnt_en_sel(
132        self,
133    ) -> crate::common::RegisterFieldBool<4, 1, 0, ClkRefSelReg_SPEC, crate::common::RW> {
134        crate::common::RegisterFieldBool::<4,1,0,ClkRefSelReg_SPEC,crate::common::RW>::from_register(self,0)
135    }
136
137    #[doc = "Writing a \'1\' starts a calibration. This bit is cleared when calibration is finished, and CLK_REF_VAL is ready."]
138    #[inline(always)]
139    pub fn ref_cal_start(
140        self,
141    ) -> crate::common::RegisterFieldBool<3, 1, 0, ClkRefSelReg_SPEC, crate::common::RW> {
142        crate::common::RegisterFieldBool::<3,1,0,ClkRefSelReg_SPEC,crate::common::RW>::from_register(self,0)
143    }
144
145    #[doc = "Select clock input for calibration:\n0x0 : RC32K\n0x1 : RC32M\n0x2 : XTAL32K\n0x3 : RCX\n0x4 : RCOSC"]
146    #[inline(always)]
147    pub fn ref_clk_sel(
148        self,
149    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, ClkRefSelReg_SPEC, crate::common::RW>
150    {
151        crate::common::RegisterField::<0,0x7,1,0,u8,u8,ClkRefSelReg_SPEC,crate::common::RW>::from_register(self,0)
152    }
153}
154impl ::core::default::Default for ClkRefSelReg {
155    #[inline(always)]
156    fn default() -> ClkRefSelReg {
157        <crate::RegValueT<ClkRefSelReg_SPEC> as RegisterValue<_>>::new(0)
158    }
159}
160
161#[doc(hidden)]
162#[derive(Copy, Clone, Eq, PartialEq)]
163pub struct ClkRefValReg_SPEC;
164impl crate::sealed::RegSpec for ClkRefValReg_SPEC {
165    type DataType = u32;
166}
167
168#[doc = "DIVN reference cycles, lower 16 bits"]
169pub type ClkRefValReg = crate::RegValueT<ClkRefValReg_SPEC>;
170
171impl ClkRefValReg {
172    #[doc = "Returns the number of DIVN clock cycles counted during the calibration time, defined with REF_CNT_VAL"]
173    #[inline(always)]
174    pub fn xtal_cnt_val(
175        self,
176    ) -> crate::common::RegisterField<
177        0,
178        0xffffffff,
179        1,
180        0,
181        u32,
182        u32,
183        ClkRefValReg_SPEC,
184        crate::common::R,
185    > {
186        crate::common::RegisterField::<
187            0,
188            0xffffffff,
189            1,
190            0,
191            u32,
192            u32,
193            ClkRefValReg_SPEC,
194            crate::common::R,
195        >::from_register(self, 0)
196    }
197}
198impl ::core::default::Default for ClkRefValReg {
199    #[inline(always)]
200    fn default() -> ClkRefValReg {
201        <crate::RegValueT<ClkRefValReg_SPEC> as RegisterValue<_>>::new(0)
202    }
203}
da14697_pac/anamisc.rs

da14697_pac/
anamisc.rs
