1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"WDOG registers"]
28unsafe impl ::core::marker::Send for super::Wdog {}
29unsafe impl ::core::marker::Sync for super::Wdog {}
30impl super::Wdog {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Watchdog control register."]
38 #[inline(always)]
39 pub const fn watchdog_ctrl_reg(
40 &self,
41 ) -> &'static crate::common::Reg<self::WatchdogCtrlReg_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::WatchdogCtrlReg_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(2usize),
45 )
46 }
47 }
48
49 #[doc = "Watchdog timer register."]
50 #[inline(always)]
51 pub const fn watchdog_reg(
52 &self,
53 ) -> &'static crate::common::Reg<self::WatchdogReg_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::WatchdogReg_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(0usize),
57 )
58 }
59 }
60}
61#[doc(hidden)]
62#[derive(Copy, Clone, Eq, PartialEq)]
63pub struct WatchdogCtrlReg_SPEC;
64impl crate::sealed::RegSpec for WatchdogCtrlReg_SPEC {
65 type DataType = u16;
66}
67
68#[doc = "Watchdog control register."]
69pub type WatchdogCtrlReg = crate::RegValueT<WatchdogCtrlReg_SPEC>;
70
71impl WatchdogCtrlReg {
72 #[doc = "0 = Watchdog timer generates NMI at value 0, and WDOG (SYS) reset at <=-16. Timer can be frozen /resumed using\nSET_FREEZE_REG\\[FRZ_WDOG\\]/\nRESET_FREEZE_REG\\[FRZ_WDOG\\].\n1 = Watchdog timer generates a WDOG (SYS) reset at value 0 and can not be frozen by Software.\nNote that this bit can only be set to 1 by SW and only be reset with a WDOG (SYS) reset or SW reset.\nThe watchdog is always frozen when the Cortex-M0 is halted in DEBUG State."]
73 #[inline(always)]
74 pub fn nmi_rst(
75 self,
76 ) -> crate::common::RegisterFieldBool<0, 1, 0, WatchdogCtrlReg_SPEC, crate::common::RW> {
77 crate::common::RegisterFieldBool::<0,1,0,WatchdogCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
78 }
79}
80impl ::core::default::Default for WatchdogCtrlReg {
81 #[inline(always)]
82 fn default() -> WatchdogCtrlReg {
83 <crate::RegValueT<WatchdogCtrlReg_SPEC> as RegisterValue<_>>::new(0)
84 }
85}
86
87#[doc(hidden)]
88#[derive(Copy, Clone, Eq, PartialEq)]
89pub struct WatchdogReg_SPEC;
90impl crate::sealed::RegSpec for WatchdogReg_SPEC {
91 type DataType = u16;
92}
93
94#[doc = "Watchdog timer register."]
95pub type WatchdogReg = crate::RegValueT<WatchdogReg_SPEC>;
96
97impl WatchdogReg {
98 #[doc = "0000.000 = Write enable for Watchdog timer\nelse Write disable. This filter prevents unintentional presetting the watchdog with a SW run-away."]
99 #[inline(always)]
100 pub fn wdog_wen(
101 self,
102 ) -> crate::common::RegisterField<9, 0x7f, 1, 0, u8, u8, WatchdogReg_SPEC, crate::common::W>
103 {
104 crate::common::RegisterField::<9,0x7f,1,0,u8,u8,WatchdogReg_SPEC,crate::common::W>::from_register(self,0)
105 }
106
107 #[doc = "0 = Watchdog timer value is positive.\n1 = Watchdog timer value is negative."]
108 #[inline(always)]
109 pub fn wdog_val_neg(
110 self,
111 ) -> crate::common::RegisterFieldBool<8, 1, 0, WatchdogReg_SPEC, crate::common::RW> {
112 crate::common::RegisterFieldBool::<8,1,0,WatchdogReg_SPEC,crate::common::RW>::from_register(self,0)
113 }
114
115 #[doc = "Write: Watchdog timer reload value. Note that all bits 15-9 must be 0 to reload this register.\nRead: Actual Watchdog timer value. Decremented by 1 every 10.24 msec. Bit 8 indicates a negative counter value. 2, 1, 0, 1FF16, 1FE16 etc. An NMI or WDOG (SYS) reset is generated under the following conditions:\nIf WATCHDOG_CTRL_REG\\[NMI_RST\\] = 0 then\n If WDOG_VAL = 0 -> NMI (Non Maskable Interrupt)\n if WDOG_VAL = 1F016 -> WDOG reset -> reload FF16\nIf WATCHDOG_CTRL_REG\\[NMI_RST\\] = 1 then\n if WDOG_VAL <= 0 -> WDOG reset -> reload FF16"]
116 #[inline(always)]
117 pub fn wdog_val(
118 self,
119 ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, WatchdogReg_SPEC, crate::common::RW>
120 {
121 crate::common::RegisterField::<0,0xff,1,0,u8,u8,WatchdogReg_SPEC,crate::common::RW>::from_register(self,0)
122 }
123}
124impl ::core::default::Default for WatchdogReg {
125 #[inline(always)]
126 fn default() -> WatchdogReg {
127 <crate::RegValueT<WatchdogReg_SPEC> as RegisterValue<_>>::new(255)
128 }
129}