da14682_pac/
ir.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
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10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:45:10 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"IR registers"]
28unsafe impl ::core::marker::Send for super::Ir {}
29unsafe impl ::core::marker::Sync for super::Ir {}
30impl super::Ir {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "IR control register"]
38    #[inline(always)]
39    pub const fn ir_ctrl_reg(
40        &self,
41    ) -> &'static crate::common::Reg<self::IrCtrlReg_SPEC, crate::common::RW> {
42        unsafe {
43            crate::common::Reg::<self::IrCtrlReg_SPEC, crate::common::RW>::from_ptr(
44                self._svd2pac_as_ptr().add(8usize),
45            )
46        }
47    }
48
49    #[doc = "Defnes the carrier signal low duration"]
50    #[inline(always)]
51    pub const fn ir_freq_carrier_off_reg(
52        &self,
53    ) -> &'static crate::common::Reg<self::IrFreqCarrierOffReg_SPEC, crate::common::RW> {
54        unsafe {
55            crate::common::Reg::<self::IrFreqCarrierOffReg_SPEC, crate::common::RW>::from_ptr(
56                self._svd2pac_as_ptr().add(2usize),
57            )
58        }
59    }
60
61    #[doc = "Defines the carrier signal  high duration"]
62    #[inline(always)]
63    pub const fn ir_freq_carrier_on_reg(
64        &self,
65    ) -> &'static crate::common::Reg<self::IrFreqCarrierOnReg_SPEC, crate::common::RW> {
66        unsafe {
67            crate::common::Reg::<self::IrFreqCarrierOnReg_SPEC, crate::common::RW>::from_ptr(
68                self._svd2pac_as_ptr().add(0usize),
69            )
70        }
71    }
72
73    #[doc = "IR interrupt status register"]
74    #[inline(always)]
75    pub const fn ir_irq_status_reg(
76        &self,
77    ) -> &'static crate::common::Reg<self::IrIrqStatusReg_SPEC, crate::common::RW> {
78        unsafe {
79            crate::common::Reg::<self::IrIrqStatusReg_SPEC, crate::common::RW>::from_ptr(
80                self._svd2pac_as_ptr().add(18usize),
81            )
82        }
83    }
84
85    #[doc = "Defines the logic one waveform"]
86    #[inline(always)]
87    pub const fn ir_logic_one_time_reg(
88        &self,
89    ) -> &'static crate::common::Reg<self::IrLogicOneTimeReg_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::IrLogicOneTimeReg_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(4usize),
93            )
94        }
95    }
96
97    #[doc = "Defines the logic zero wavefrom"]
98    #[inline(always)]
99    pub const fn ir_logic_zero_time_reg(
100        &self,
101    ) -> &'static crate::common::Reg<self::IrLogicZeroTimeReg_SPEC, crate::common::RW> {
102        unsafe {
103            crate::common::Reg::<self::IrLogicZeroTimeReg_SPEC, crate::common::RW>::from_ptr(
104                self._svd2pac_as_ptr().add(6usize),
105            )
106        }
107    }
108
109    #[doc = "Main fifo write register"]
110    #[inline(always)]
111    pub const fn ir_main_fifo_reg(
112        &self,
113    ) -> &'static crate::common::Reg<self::IrMainFifoReg_SPEC, crate::common::RW> {
114        unsafe {
115            crate::common::Reg::<self::IrMainFifoReg_SPEC, crate::common::RW>::from_ptr(
116                self._svd2pac_as_ptr().add(14usize),
117            )
118        }
119    }
120
121    #[doc = "Repeat fifo write register"]
122    #[inline(always)]
123    pub const fn ir_repeat_fifo_reg(
124        &self,
125    ) -> &'static crate::common::Reg<self::IrRepeatFifoReg_SPEC, crate::common::RW> {
126        unsafe {
127            crate::common::Reg::<self::IrRepeatFifoReg_SPEC, crate::common::RW>::from_ptr(
128                self._svd2pac_as_ptr().add(16usize),
129            )
130        }
131    }
132
133    #[doc = "Defines the repeat time"]
134    #[inline(always)]
135    pub const fn ir_repeat_time_reg(
136        &self,
137    ) -> &'static crate::common::Reg<self::IrRepeatTimeReg_SPEC, crate::common::RW> {
138        unsafe {
139            crate::common::Reg::<self::IrRepeatTimeReg_SPEC, crate::common::RW>::from_ptr(
140                self._svd2pac_as_ptr().add(12usize),
141            )
142        }
143    }
144
145    #[doc = "IR status register"]
146    #[inline(always)]
147    pub const fn ir_status_reg(
148        &self,
149    ) -> &'static crate::common::Reg<self::IrStatusReg_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::IrStatusReg_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(10usize),
153            )
154        }
155    }
156}
157#[doc(hidden)]
158#[derive(Copy, Clone, Eq, PartialEq)]
159pub struct IrCtrlReg_SPEC;
160impl crate::sealed::RegSpec for IrCtrlReg_SPEC {
161    type DataType = u16;
162}
163
164#[doc = "IR control register"]
165pub type IrCtrlReg = crate::RegValueT<IrCtrlReg_SPEC>;
166
167impl IrCtrlReg {
168    #[doc = "1 = Enables the interrupt generation upon TX completion\n0 = masks out the interrupt generation upon TX completion"]
169    #[inline(always)]
170    pub fn ir_irq_en(
171        self,
172    ) -> crate::common::RegisterFieldBool<8, 1, 0, IrCtrlReg_SPEC, crate::common::RW> {
173        crate::common::RegisterFieldBool::<8,1,0,IrCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
174    }
175
176    #[doc = "1 = Logic one starts with a Space followed by a Mark\n0 = Logic one starts with a Mark followed by a Space"]
177    #[inline(always)]
178    pub fn ir_logic_one_format(
179        self,
180    ) -> crate::common::RegisterFieldBool<7, 1, 0, IrCtrlReg_SPEC, crate::common::RW> {
181        crate::common::RegisterFieldBool::<7,1,0,IrCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
182    }
183
184    #[doc = "1 = Logic zero starts with a Space followed by a Mark\n0 = Logic zero starts with a Mark followed by a Space"]
185    #[inline(always)]
186    pub fn ir_logic_zero_format(
187        self,
188    ) -> crate::common::RegisterFieldBool<6, 1, 0, IrCtrlReg_SPEC, crate::common::RW> {
189        crate::common::RegisterFieldBool::<6,1,0,IrCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
190    }
191
192    #[doc = "1 = IR output is inverted\n0 = IR output is not inverted"]
193    #[inline(always)]
194    pub fn ir_invert_output(
195        self,
196    ) -> crate::common::RegisterFieldBool<5, 1, 0, IrCtrlReg_SPEC, crate::common::RW> {
197        crate::common::RegisterFieldBool::<5,1,0,IrCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
198    }
199
200    #[doc = "1 = repeat command is defined at Repeat FIFO\n0 = repeat command is defined at Code FIFO"]
201    #[inline(always)]
202    pub fn ir_repeat_type(
203        self,
204    ) -> crate::common::RegisterFieldBool<4, 1, 0, IrCtrlReg_SPEC, crate::common::RW> {
205        crate::common::RegisterFieldBool::<4,1,0,IrCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
206    }
207
208    #[doc = "1 = IR transmits a command\n0 = IR is stopped\nWhile this bit is 1 and SW programs it to 0, the code FIFO will be flushed automatically."]
209    #[inline(always)]
210    pub fn ir_tx_start(
211        self,
212    ) -> crate::common::RegisterFieldBool<3, 1, 0, IrCtrlReg_SPEC, crate::common::RW> {
213        crate::common::RegisterFieldBool::<3,1,0,IrCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
214    }
215
216    #[doc = "1 = IR block is enabled\n0 = IR block is disabled and at reset state. This also resets the pointers at the FIFOs"]
217    #[inline(always)]
218    pub fn ir_enable(
219        self,
220    ) -> crate::common::RegisterFieldBool<2, 1, 0, IrCtrlReg_SPEC, crate::common::RW> {
221        crate::common::RegisterFieldBool::<2,1,0,IrCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
222    }
223
224    #[doc = "1 = Flush Repeat FIFO (auto clear)"]
225    #[inline(always)]
226    pub fn ir_rep_fifo_reset(
227        self,
228    ) -> crate::common::RegisterFieldBool<1, 1, 0, IrCtrlReg_SPEC, crate::common::W> {
229        crate::common::RegisterFieldBool::<1, 1, 0, IrCtrlReg_SPEC, crate::common::W>::from_register(
230            self, 0,
231        )
232    }
233
234    #[doc = "1 = Flush Code FIFO (auto clear)"]
235    #[inline(always)]
236    pub fn ir_code_fifo_reset(
237        self,
238    ) -> crate::common::RegisterFieldBool<0, 1, 0, IrCtrlReg_SPEC, crate::common::W> {
239        crate::common::RegisterFieldBool::<0, 1, 0, IrCtrlReg_SPEC, crate::common::W>::from_register(
240            self, 0,
241        )
242    }
243}
244impl ::core::default::Default for IrCtrlReg {
245    #[inline(always)]
246    fn default() -> IrCtrlReg {
247        <crate::RegValueT<IrCtrlReg_SPEC> as RegisterValue<_>>::new(0)
248    }
249}
250
251#[doc(hidden)]
252#[derive(Copy, Clone, Eq, PartialEq)]
253pub struct IrFreqCarrierOffReg_SPEC;
254impl crate::sealed::RegSpec for IrFreqCarrierOffReg_SPEC {
255    type DataType = u16;
256}
257
258#[doc = "Defnes the carrier signal low duration"]
259pub type IrFreqCarrierOffReg = crate::RegValueT<IrFreqCarrierOffReg_SPEC>;
260
261impl IrFreqCarrierOffReg {
262    #[doc = "Defines the carrier signal low duration in IR_clk cycles"]
263    #[inline(always)]
264    pub fn ir_freq_carrier_off(
265        self,
266    ) -> crate::common::RegisterField<
267        0,
268        0x3ff,
269        1,
270        0,
271        u16,
272        u16,
273        IrFreqCarrierOffReg_SPEC,
274        crate::common::RW,
275    > {
276        crate::common::RegisterField::<
277            0,
278            0x3ff,
279            1,
280            0,
281            u16,
282            u16,
283            IrFreqCarrierOffReg_SPEC,
284            crate::common::RW,
285        >::from_register(self, 0)
286    }
287}
288impl ::core::default::Default for IrFreqCarrierOffReg {
289    #[inline(always)]
290    fn default() -> IrFreqCarrierOffReg {
291        <crate::RegValueT<IrFreqCarrierOffReg_SPEC> as RegisterValue<_>>::new(1)
292    }
293}
294
295#[doc(hidden)]
296#[derive(Copy, Clone, Eq, PartialEq)]
297pub struct IrFreqCarrierOnReg_SPEC;
298impl crate::sealed::RegSpec for IrFreqCarrierOnReg_SPEC {
299    type DataType = u16;
300}
301
302#[doc = "Defines the carrier signal  high duration"]
303pub type IrFreqCarrierOnReg = crate::RegValueT<IrFreqCarrierOnReg_SPEC>;
304
305impl IrFreqCarrierOnReg {
306    #[doc = "Defines the carrier signal high duration in IR_clk cycles. 0x0 is not allowed as a value."]
307    #[inline(always)]
308    pub fn ir_freq_carrier_on(
309        self,
310    ) -> crate::common::RegisterField<
311        0,
312        0x3ff,
313        1,
314        0,
315        u16,
316        u16,
317        IrFreqCarrierOnReg_SPEC,
318        crate::common::RW,
319    > {
320        crate::common::RegisterField::<
321            0,
322            0x3ff,
323            1,
324            0,
325            u16,
326            u16,
327            IrFreqCarrierOnReg_SPEC,
328            crate::common::RW,
329        >::from_register(self, 0)
330    }
331}
332impl ::core::default::Default for IrFreqCarrierOnReg {
333    #[inline(always)]
334    fn default() -> IrFreqCarrierOnReg {
335        <crate::RegValueT<IrFreqCarrierOnReg_SPEC> as RegisterValue<_>>::new(1)
336    }
337}
338
339#[doc(hidden)]
340#[derive(Copy, Clone, Eq, PartialEq)]
341pub struct IrIrqStatusReg_SPEC;
342impl crate::sealed::RegSpec for IrIrqStatusReg_SPEC {
343    type DataType = u16;
344}
345
346#[doc = "IR interrupt status register"]
347pub type IrIrqStatusReg = crate::RegValueT<IrIrqStatusReg_SPEC>;
348
349impl IrIrqStatusReg {
350    #[doc = "When read Interrupt line is cleared"]
351    #[inline(always)]
352    pub fn ir_irq_ack(
353        self,
354    ) -> crate::common::RegisterFieldBool<0, 1, 0, IrIrqStatusReg_SPEC, crate::common::R> {
355        crate::common::RegisterFieldBool::<0,1,0,IrIrqStatusReg_SPEC,crate::common::R>::from_register(self,0)
356    }
357}
358impl ::core::default::Default for IrIrqStatusReg {
359    #[inline(always)]
360    fn default() -> IrIrqStatusReg {
361        <crate::RegValueT<IrIrqStatusReg_SPEC> as RegisterValue<_>>::new(0)
362    }
363}
364
365#[doc(hidden)]
366#[derive(Copy, Clone, Eq, PartialEq)]
367pub struct IrLogicOneTimeReg_SPEC;
368impl crate::sealed::RegSpec for IrLogicOneTimeReg_SPEC {
369    type DataType = u16;
370}
371
372#[doc = "Defines the logic one waveform"]
373pub type IrLogicOneTimeReg = crate::RegValueT<IrLogicOneTimeReg_SPEC>;
374
375impl IrLogicOneTimeReg {
376    #[doc = "Defines the mark duration in carrier clock cycles. Must be >0"]
377    #[inline(always)]
378    pub fn ir_logic_one_mark(
379        self,
380    ) -> crate::common::RegisterField<
381        8,
382        0xff,
383        1,
384        0,
385        u8,
386        u8,
387        IrLogicOneTimeReg_SPEC,
388        crate::common::RW,
389    > {
390        crate::common::RegisterField::<
391            8,
392            0xff,
393            1,
394            0,
395            u8,
396            u8,
397            IrLogicOneTimeReg_SPEC,
398            crate::common::RW,
399        >::from_register(self, 0)
400    }
401
402    #[doc = "Defines the space duration in carrier clock cycles. Must be >0"]
403    #[inline(always)]
404    pub fn ir_logic_one_space(
405        self,
406    ) -> crate::common::RegisterField<
407        0,
408        0xff,
409        1,
410        0,
411        u8,
412        u8,
413        IrLogicOneTimeReg_SPEC,
414        crate::common::RW,
415    > {
416        crate::common::RegisterField::<
417            0,
418            0xff,
419            1,
420            0,
421            u8,
422            u8,
423            IrLogicOneTimeReg_SPEC,
424            crate::common::RW,
425        >::from_register(self, 0)
426    }
427}
428impl ::core::default::Default for IrLogicOneTimeReg {
429    #[inline(always)]
430    fn default() -> IrLogicOneTimeReg {
431        <crate::RegValueT<IrLogicOneTimeReg_SPEC> as RegisterValue<_>>::new(257)
432    }
433}
434
435#[doc(hidden)]
436#[derive(Copy, Clone, Eq, PartialEq)]
437pub struct IrLogicZeroTimeReg_SPEC;
438impl crate::sealed::RegSpec for IrLogicZeroTimeReg_SPEC {
439    type DataType = u16;
440}
441
442#[doc = "Defines the logic zero wavefrom"]
443pub type IrLogicZeroTimeReg = crate::RegValueT<IrLogicZeroTimeReg_SPEC>;
444
445impl IrLogicZeroTimeReg {
446    #[doc = "Defines the mark duration in carrier clock cycles. Must be >0"]
447    #[inline(always)]
448    pub fn ir_logic_zero_mark(
449        self,
450    ) -> crate::common::RegisterField<
451        8,
452        0xff,
453        1,
454        0,
455        u8,
456        u8,
457        IrLogicZeroTimeReg_SPEC,
458        crate::common::RW,
459    > {
460        crate::common::RegisterField::<
461            8,
462            0xff,
463            1,
464            0,
465            u8,
466            u8,
467            IrLogicZeroTimeReg_SPEC,
468            crate::common::RW,
469        >::from_register(self, 0)
470    }
471
472    #[doc = "Defines the space duration in carrier clock cycles. Must be >0"]
473    #[inline(always)]
474    pub fn ir_logic_zero_space(
475        self,
476    ) -> crate::common::RegisterField<
477        0,
478        0xff,
479        1,
480        0,
481        u8,
482        u8,
483        IrLogicZeroTimeReg_SPEC,
484        crate::common::RW,
485    > {
486        crate::common::RegisterField::<
487            0,
488            0xff,
489            1,
490            0,
491            u8,
492            u8,
493            IrLogicZeroTimeReg_SPEC,
494            crate::common::RW,
495        >::from_register(self, 0)
496    }
497}
498impl ::core::default::Default for IrLogicZeroTimeReg {
499    #[inline(always)]
500    fn default() -> IrLogicZeroTimeReg {
501        <crate::RegValueT<IrLogicZeroTimeReg_SPEC> as RegisterValue<_>>::new(257)
502    }
503}
504
505#[doc(hidden)]
506#[derive(Copy, Clone, Eq, PartialEq)]
507pub struct IrMainFifoReg_SPEC;
508impl crate::sealed::RegSpec for IrMainFifoReg_SPEC {
509    type DataType = u16;
510}
511
512#[doc = "Main fifo write register"]
513pub type IrMainFifoReg = crate::RegValueT<IrMainFifoReg_SPEC>;
514
515impl IrMainFifoReg {
516    #[doc = "Code FIFO data write port"]
517    #[inline(always)]
518    pub fn ir_code_fifo_data(
519        self,
520    ) -> crate::common::RegisterField<0, 0xffff, 1, 0, u16, u16, IrMainFifoReg_SPEC, crate::common::W>
521    {
522        crate::common::RegisterField::<
523            0,
524            0xffff,
525            1,
526            0,
527            u16,
528            u16,
529            IrMainFifoReg_SPEC,
530            crate::common::W,
531        >::from_register(self, 0)
532    }
533}
534impl ::core::default::Default for IrMainFifoReg {
535    #[inline(always)]
536    fn default() -> IrMainFifoReg {
537        <crate::RegValueT<IrMainFifoReg_SPEC> as RegisterValue<_>>::new(0)
538    }
539}
540
541#[doc(hidden)]
542#[derive(Copy, Clone, Eq, PartialEq)]
543pub struct IrRepeatFifoReg_SPEC;
544impl crate::sealed::RegSpec for IrRepeatFifoReg_SPEC {
545    type DataType = u16;
546}
547
548#[doc = "Repeat fifo write register"]
549pub type IrRepeatFifoReg = crate::RegValueT<IrRepeatFifoReg_SPEC>;
550
551impl IrRepeatFifoReg {
552    #[doc = "Repeat FIFO data write port"]
553    #[inline(always)]
554    pub fn ir_repeat_fifo_data(
555        self,
556    ) -> crate::common::RegisterField<
557        0,
558        0xffff,
559        1,
560        0,
561        u16,
562        u16,
563        IrRepeatFifoReg_SPEC,
564        crate::common::W,
565    > {
566        crate::common::RegisterField::<
567            0,
568            0xffff,
569            1,
570            0,
571            u16,
572            u16,
573            IrRepeatFifoReg_SPEC,
574            crate::common::W,
575        >::from_register(self, 0)
576    }
577}
578impl ::core::default::Default for IrRepeatFifoReg {
579    #[inline(always)]
580    fn default() -> IrRepeatFifoReg {
581        <crate::RegValueT<IrRepeatFifoReg_SPEC> as RegisterValue<_>>::new(0)
582    }
583}
584
585#[doc(hidden)]
586#[derive(Copy, Clone, Eq, PartialEq)]
587pub struct IrRepeatTimeReg_SPEC;
588impl crate::sealed::RegSpec for IrRepeatTimeReg_SPEC {
589    type DataType = u16;
590}
591
592#[doc = "Defines the repeat time"]
593pub type IrRepeatTimeReg = crate::RegValueT<IrRepeatTimeReg_SPEC>;
594
595impl IrRepeatTimeReg {
596    #[doc = "Defines the repeat time in carrier clock cycles. The repeat timer will start counting from the start of the command and will trigger the output of the same command residing in the Code FIFO or the special command residing in the Repeat FIFO as soon as it expires."]
597    #[inline(always)]
598    pub fn ir_repeat_time(
599        self,
600    ) -> crate::common::RegisterField<
601        0,
602        0xffff,
603        1,
604        0,
605        u16,
606        u16,
607        IrRepeatTimeReg_SPEC,
608        crate::common::RW,
609    > {
610        crate::common::RegisterField::<
611            0,
612            0xffff,
613            1,
614            0,
615            u16,
616            u16,
617            IrRepeatTimeReg_SPEC,
618            crate::common::RW,
619        >::from_register(self, 0)
620    }
621}
622impl ::core::default::Default for IrRepeatTimeReg {
623    #[inline(always)]
624    fn default() -> IrRepeatTimeReg {
625        <crate::RegValueT<IrRepeatTimeReg_SPEC> as RegisterValue<_>>::new(0)
626    }
627}
628
629#[doc(hidden)]
630#[derive(Copy, Clone, Eq, PartialEq)]
631pub struct IrStatusReg_SPEC;
632impl crate::sealed::RegSpec for IrStatusReg_SPEC {
633    type DataType = u16;
634}
635
636#[doc = "IR status register"]
637pub type IrStatusReg = crate::RegValueT<IrStatusReg_SPEC>;
638
639impl IrStatusReg {
640    #[doc = "1 = IR generator is busy sending a message\n0 = IR generator is idle"]
641    #[inline(always)]
642    pub fn ir_busy(
643        self,
644    ) -> crate::common::RegisterFieldBool<10, 1, 0, IrStatusReg_SPEC, crate::common::R> {
645        crate::common::RegisterFieldBool::<10,1,0,IrStatusReg_SPEC,crate::common::R>::from_register(self,0)
646    }
647
648    #[doc = "Contains the amount of words in Repeat FIFO (updated only on write)"]
649    #[inline(always)]
650    pub fn ir_rep_fifo_wrds(
651        self,
652    ) -> crate::common::RegisterField<6, 0xf, 1, 0, u8, u8, IrStatusReg_SPEC, crate::common::R>
653    {
654        crate::common::RegisterField::<6,0xf,1,0,u8,u8,IrStatusReg_SPEC,crate::common::R>::from_register(self,0)
655    }
656
657    #[doc = "Contains the amount of words in Code FIFO (updated only on write)"]
658    #[inline(always)]
659    pub fn ir_code_fifo_wrds(
660        self,
661    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, IrStatusReg_SPEC, crate::common::R>
662    {
663        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,IrStatusReg_SPEC,crate::common::R>::from_register(self,0)
664    }
665}
666impl ::core::default::Default for IrStatusReg {
667    #[inline(always)]
668    fn default() -> IrStatusReg {
669        <crate::RegValueT<IrStatusReg_SPEC> as RegisterValue<_>>::new(0)
670    }
671}
da14682_pac/ir.rs

da14682_pac/
ir.rs
