1#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"AES_HASH registers"]
28unsafe impl ::core::marker::Send for super::AesHash {}
29unsafe impl ::core::marker::Sync for super::AesHash {}
30impl super::AesHash {
31 #[allow(unused)]
32 #[inline(always)]
33 pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34 self.ptr
35 }
36
37 #[doc = "Crypto Clear interrupt request"]
38 #[inline(always)]
39 pub const fn crypto_clrirq_reg(
40 &self,
41 ) -> &'static crate::common::Reg<self::CryptoClrirqReg_SPEC, crate::common::RW> {
42 unsafe {
43 crate::common::Reg::<self::CryptoClrirqReg_SPEC, crate::common::RW>::from_ptr(
44 self._svd2pac_as_ptr().add(24usize),
45 )
46 }
47 }
48
49 #[doc = "Crypto Control register"]
50 #[inline(always)]
51 pub const fn crypto_ctrl_reg(
52 &self,
53 ) -> &'static crate::common::Reg<self::CryptoCtrlReg_SPEC, crate::common::RW> {
54 unsafe {
55 crate::common::Reg::<self::CryptoCtrlReg_SPEC, crate::common::RW>::from_ptr(
56 self._svd2pac_as_ptr().add(0usize),
57 )
58 }
59 }
60
61 #[doc = "Crypto DMA destination memory"]
62 #[inline(always)]
63 pub const fn crypto_dest_addr_reg(
64 &self,
65 ) -> &'static crate::common::Reg<self::CryptoDestAddrReg_SPEC, crate::common::RW> {
66 unsafe {
67 crate::common::Reg::<self::CryptoDestAddrReg_SPEC, crate::common::RW>::from_ptr(
68 self._svd2pac_as_ptr().add(16usize),
69 )
70 }
71 }
72
73 #[doc = "Crypto DMA fetch register"]
74 #[inline(always)]
75 pub const fn crypto_fetch_addr_reg(
76 &self,
77 ) -> &'static crate::common::Reg<self::CryptoFetchAddrReg_SPEC, crate::common::RW> {
78 unsafe {
79 crate::common::Reg::<self::CryptoFetchAddrReg_SPEC, crate::common::RW>::from_ptr(
80 self._svd2pac_as_ptr().add(8usize),
81 )
82 }
83 }
84
85 #[doc = "Crypto First position of the AES keys storage memory"]
86 #[inline(always)]
87 pub const fn crypto_keys_start(
88 &self,
89 ) -> &'static crate::common::Reg<self::CryptoKeysStart_SPEC, crate::common::RW> {
90 unsafe {
91 crate::common::Reg::<self::CryptoKeysStart_SPEC, crate::common::RW>::from_ptr(
92 self._svd2pac_as_ptr().add(256usize),
93 )
94 }
95 }
96
97 #[doc = "Crypto Length of the input block in bytes"]
98 #[inline(always)]
99 pub const fn crypto_len_reg(
100 &self,
101 ) -> &'static crate::common::Reg<self::CryptoLenReg_SPEC, crate::common::RW> {
102 unsafe {
103 crate::common::Reg::<self::CryptoLenReg_SPEC, crate::common::RW>::from_ptr(
104 self._svd2pac_as_ptr().add(12usize),
105 )
106 }
107 }
108
109 #[doc = "Crypto Mode depended register 0"]
110 #[inline(always)]
111 pub const fn crypto_mreg0_reg(
112 &self,
113 ) -> &'static crate::common::Reg<self::CryptoMreg0Reg_SPEC, crate::common::RW> {
114 unsafe {
115 crate::common::Reg::<self::CryptoMreg0Reg_SPEC, crate::common::RW>::from_ptr(
116 self._svd2pac_as_ptr().add(28usize),
117 )
118 }
119 }
120
121 #[doc = "Crypto Mode depended register 1"]
122 #[inline(always)]
123 pub const fn crypto_mreg1_reg(
124 &self,
125 ) -> &'static crate::common::Reg<self::CryptoMreg1Reg_SPEC, crate::common::RW> {
126 unsafe {
127 crate::common::Reg::<self::CryptoMreg1Reg_SPEC, crate::common::RW>::from_ptr(
128 self._svd2pac_as_ptr().add(32usize),
129 )
130 }
131 }
132
133 #[doc = "Crypto Mode depended register 2"]
134 #[inline(always)]
135 pub const fn crypto_mreg2_reg(
136 &self,
137 ) -> &'static crate::common::Reg<self::CryptoMreg2Reg_SPEC, crate::common::RW> {
138 unsafe {
139 crate::common::Reg::<self::CryptoMreg2Reg_SPEC, crate::common::RW>::from_ptr(
140 self._svd2pac_as_ptr().add(36usize),
141 )
142 }
143 }
144
145 #[doc = "Crypto Mode depended register 3"]
146 #[inline(always)]
147 pub const fn crypto_mreg3_reg(
148 &self,
149 ) -> &'static crate::common::Reg<self::CryptoMreg3Reg_SPEC, crate::common::RW> {
150 unsafe {
151 crate::common::Reg::<self::CryptoMreg3Reg_SPEC, crate::common::RW>::from_ptr(
152 self._svd2pac_as_ptr().add(40usize),
153 )
154 }
155 }
156
157 #[doc = "Crypto Start calculation"]
158 #[inline(always)]
159 pub const fn crypto_start_reg(
160 &self,
161 ) -> &'static crate::common::Reg<self::CryptoStartReg_SPEC, crate::common::RW> {
162 unsafe {
163 crate::common::Reg::<self::CryptoStartReg_SPEC, crate::common::RW>::from_ptr(
164 self._svd2pac_as_ptr().add(4usize),
165 )
166 }
167 }
168
169 #[doc = "Crypto Status register"]
170 #[inline(always)]
171 pub const fn crypto_status_reg(
172 &self,
173 ) -> &'static crate::common::Reg<self::CryptoStatusReg_SPEC, crate::common::RW> {
174 unsafe {
175 crate::common::Reg::<self::CryptoStatusReg_SPEC, crate::common::RW>::from_ptr(
176 self._svd2pac_as_ptr().add(20usize),
177 )
178 }
179 }
180}
181#[doc(hidden)]
182#[derive(Copy, Clone, Eq, PartialEq)]
183pub struct CryptoClrirqReg_SPEC;
184impl crate::sealed::RegSpec for CryptoClrirqReg_SPEC {
185 type DataType = u32;
186}
187
188#[doc = "Crypto Clear interrupt request"]
189pub type CryptoClrirqReg = crate::RegValueT<CryptoClrirqReg_SPEC>;
190
191impl CryptoClrirqReg {
192 #[doc = "Write 1 to clear a pending interrupt request."]
193 #[inline(always)]
194 pub fn crypto_clrirq(
195 self,
196 ) -> crate::common::RegisterFieldBool<0, 1, 0, CryptoClrirqReg_SPEC, crate::common::W> {
197 crate::common::RegisterFieldBool::<0,1,0,CryptoClrirqReg_SPEC,crate::common::W>::from_register(self,0)
198 }
199}
200impl ::core::default::Default for CryptoClrirqReg {
201 #[inline(always)]
202 fn default() -> CryptoClrirqReg {
203 <crate::RegValueT<CryptoClrirqReg_SPEC> as RegisterValue<_>>::new(0)
204 }
205}
206
207#[doc(hidden)]
208#[derive(Copy, Clone, Eq, PartialEq)]
209pub struct CryptoCtrlReg_SPEC;
210impl crate::sealed::RegSpec for CryptoCtrlReg_SPEC {
211 type DataType = u32;
212}
213
214#[doc = "Crypto Control register"]
215pub type CryptoCtrlReg = crate::RegValueT<CryptoCtrlReg_SPEC>;
216
217impl CryptoCtrlReg {
218 #[doc = "It forces (active high) the execution of the key expansion process with the starting of the AES encryption/decryption process. The bit will be cleared automatically by the hardware, after the completion of the AES key expansion process."]
219 #[inline(always)]
220 pub fn crypto_aes_kexp(
221 self,
222 ) -> crate::common::RegisterFieldBool<17, 1, 0, CryptoCtrlReg_SPEC, crate::common::RW> {
223 crate::common::RegisterFieldBool::<17,1,0,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
224 }
225
226 #[doc = "0 - Define that this is the last input block. When the current input is consumed by the crypto engine and the output data is written to the memory, the calculation ends (CRYPTO_INACTIVE goes to one).\n1 - The current input data block is not the last. More input data will follow. When the current input is consumed, the engine stops and waits for more data (CRYPTO_WAIT_FOR_IN goes to one)."]
227 #[inline(always)]
228 pub fn crypto_more_in(
229 self,
230 ) -> crate::common::RegisterFieldBool<16, 1, 0, CryptoCtrlReg_SPEC, crate::common::RW> {
231 crate::common::RegisterFieldBool::<16,1,0,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
232 }
233
234 #[doc = "The number of bytes minus one of the hash result which will be saved at the memory by the DMA. In relation with the selected hash algorithm the accepted values are:\nMD5: 0..15 -> 1-16 bytes\nSHA-1: 0..19 -> 1-20 bytes\nSHA-256: 0..31 -> 1 - 32 bytes\nSHA-256/224: 0..27 -> 1- 28 bytes\nSHA-384: 0..47 -> 1 - 48 bytes\nSHA-512: 0..63 -> 1 - 64 bytes\nSHA-512/224: 0..27 -> 1- 28 bytes\nSHA-512/256: 0..31 -> 1 - 32 bytes"]
235 #[inline(always)]
236 pub fn crypto_hash_out_len(
237 self,
238 ) -> crate::common::RegisterField<10, 0x3f, 1, 0, u8, u8, CryptoCtrlReg_SPEC, crate::common::RW>
239 {
240 crate::common::RegisterField::<10,0x3f,1,0,u8,u8,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
241 }
242
243 #[doc = "Selects the type of the algorithm\n0 - The encryption algorithm (AES)\n1 - A hash algorithm.\nThe exact algorithm is defined by the fileds CRYPTO_ALG and CRYPTO_ALG_MD."]
244 #[inline(always)]
245 pub fn crypto_hash_sel(
246 self,
247 ) -> crate::common::RegisterFieldBool<9, 1, 0, CryptoCtrlReg_SPEC, crate::common::RW> {
248 crate::common::RegisterFieldBool::<9,1,0,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
249 }
250
251 #[doc = "Interrupt Request Enable\n0 - The interrupt generation ability is disabled.\n1 - The interrupt generation ability is enabled. Generates an interrupt request at the end of operation."]
252 #[inline(always)]
253 pub fn crypto_irq_en(
254 self,
255 ) -> crate::common::RegisterFieldBool<8, 1, 0, CryptoCtrlReg_SPEC, crate::common::RW> {
256 crate::common::RegisterFieldBool::<8,1,0,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
257 }
258
259 #[doc = "Encryption/Decryption\n0 - Decryption\n1 - Encryption"]
260 #[inline(always)]
261 pub fn crypto_encdec(
262 self,
263 ) -> crate::common::RegisterFieldBool<7, 1, 0, CryptoCtrlReg_SPEC, crate::common::RW> {
264 crate::common::RegisterFieldBool::<7,1,0,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
265 }
266
267 #[doc = "The size of AES Key\n00 - 128 bits AES Key\n01 - 192 bits AES Key\n10 - 256 bits AES Key\n11 - 256 bits AES Key"]
268 #[inline(always)]
269 pub fn crypto_aes_key_sz(
270 self,
271 ) -> crate::common::RegisterField<5, 0x3, 1, 0, u8, u8, CryptoCtrlReg_SPEC, crate::common::RW>
272 {
273 crate::common::RegisterField::<5,0x3,1,0,u8,u8,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
274 }
275
276 #[doc = "Output Mode. This field makes sense only when the AES algorithm is selected (CRYPTO_HASH_SEL =0)\n0 - Write back to memory all the resulting data\n1 - Write back to memory only the final block of the resulting data"]
277 #[inline(always)]
278 pub fn crypto_out_md(
279 self,
280 ) -> crate::common::RegisterFieldBool<4, 1, 0, CryptoCtrlReg_SPEC, crate::common::RW> {
281 crate::common::RegisterFieldBool::<4,1,0,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
282 }
283
284 #[doc = "It defines the mode of operation of the AES algorithm when the controller is configured for an encryption/decryption processing (CRYPTO_HASH_SEL = 0).\n00 - ECB\n01 - ECB\n10 - CTR\n11 - CBC\n\nWhen the controller is configured to applies a HASH function, this field selects the desired HASH algorithm with the help of the CRYPTO_ALG.\n\n00 - HASH algorithms that are based on 32 bits operations\n01 - HASH algorithms that are based on 64 bits operations\n10 - Reserved\n11 - Reserved\n\nSee also the CRYPTO_ALG field."]
285 #[inline(always)]
286 pub fn crypto_alg_md(
287 self,
288 ) -> crate::common::RegisterField<2, 0x3, 1, 0, u8, u8, CryptoCtrlReg_SPEC, crate::common::RW>
289 {
290 crate::common::RegisterField::<2,0x3,1,0,u8,u8,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
291 }
292
293 #[doc = "Algorithm selection. When CRYPTO_HASH_SEL = 0 the only available choice is the AES algorithm.\n00 - AES\n01 - Reserved\n10 - Reserved\n11 - Reserved\n\nWhen CRYPTO_HASH_SEL = 1, this field selects the desired hash algorithms, with the help of the CRYPTO_ALG_MD field.\n\nIf CRYPTO_ALG_MD = 00\n00 - MD5\n01 - SHA-1\n10 - SHA-256/224\n11 - SHA-256\n\nIf CRYPTO_ALG_MD = 01\n00 - SHA-384\n01 - SHA-512\n10 - SHA-512/224\n11 - SHA-512/256"]
294 #[inline(always)]
295 pub fn crypto_alg(
296 self,
297 ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, CryptoCtrlReg_SPEC, crate::common::RW>
298 {
299 crate::common::RegisterField::<0,0x3,1,0,u8,u8,CryptoCtrlReg_SPEC,crate::common::RW>::from_register(self,0)
300 }
301}
302impl ::core::default::Default for CryptoCtrlReg {
303 #[inline(always)]
304 fn default() -> CryptoCtrlReg {
305 <crate::RegValueT<CryptoCtrlReg_SPEC> as RegisterValue<_>>::new(0)
306 }
307}
308
309#[doc(hidden)]
310#[derive(Copy, Clone, Eq, PartialEq)]
311pub struct CryptoDestAddrReg_SPEC;
312impl crate::sealed::RegSpec for CryptoDestAddrReg_SPEC {
313 type DataType = u32;
314}
315
316#[doc = "Crypto DMA destination memory"]
317pub type CryptoDestAddrReg = crate::RegValueT<CryptoDestAddrReg_SPEC>;
318
319impl CryptoDestAddrReg {
320 #[doc = "Destination address at where the result of the processing is stored. The value of this register is updated as the calculation proceeds and the output data are written to the memory."]
321 #[inline(always)]
322 pub fn crypto_dest_addr(
323 self,
324 ) -> crate::common::RegisterField<
325 0,
326 0xffffffff,
327 1,
328 0,
329 u32,
330 u32,
331 CryptoDestAddrReg_SPEC,
332 crate::common::RW,
333 > {
334 crate::common::RegisterField::<
335 0,
336 0xffffffff,
337 1,
338 0,
339 u32,
340 u32,
341 CryptoDestAddrReg_SPEC,
342 crate::common::RW,
343 >::from_register(self, 0)
344 }
345}
346impl ::core::default::Default for CryptoDestAddrReg {
347 #[inline(always)]
348 fn default() -> CryptoDestAddrReg {
349 <crate::RegValueT<CryptoDestAddrReg_SPEC> as RegisterValue<_>>::new(0)
350 }
351}
352
353#[doc(hidden)]
354#[derive(Copy, Clone, Eq, PartialEq)]
355pub struct CryptoFetchAddrReg_SPEC;
356impl crate::sealed::RegSpec for CryptoFetchAddrReg_SPEC {
357 type DataType = u32;
358}
359
360#[doc = "Crypto DMA fetch register"]
361pub type CryptoFetchAddrReg = crate::RegValueT<CryptoFetchAddrReg_SPEC>;
362
363impl CryptoFetchAddrReg {
364 #[doc = "The memory address from where will be retrieved the data that will be processed. The value of this register is updated as the calculation proceeds and the output data are written to the memory."]
365 #[inline(always)]
366 pub fn crypto_fetch_addr(
367 self,
368 ) -> crate::common::RegisterField<
369 0,
370 0xffffffff,
371 1,
372 0,
373 u32,
374 u32,
375 CryptoFetchAddrReg_SPEC,
376 crate::common::RW,
377 > {
378 crate::common::RegisterField::<
379 0,
380 0xffffffff,
381 1,
382 0,
383 u32,
384 u32,
385 CryptoFetchAddrReg_SPEC,
386 crate::common::RW,
387 >::from_register(self, 0)
388 }
389}
390impl ::core::default::Default for CryptoFetchAddrReg {
391 #[inline(always)]
392 fn default() -> CryptoFetchAddrReg {
393 <crate::RegValueT<CryptoFetchAddrReg_SPEC> as RegisterValue<_>>::new(0)
394 }
395}
396
397#[doc(hidden)]
398#[derive(Copy, Clone, Eq, PartialEq)]
399pub struct CryptoKeysStart_SPEC;
400impl crate::sealed::RegSpec for CryptoKeysStart_SPEC {
401 type DataType = u32;
402}
403
404#[doc = "Crypto First position of the AES keys storage memory"]
405pub type CryptoKeysStart = crate::RegValueT<CryptoKeysStart_SPEC>;
406
407impl CryptoKeysStart {
408 #[doc = "CRYPTO_KEY_(0-63)\nThis is the AES keys storage memory. This memory is accessible via AHB slave interface, only when the CRYPTO is inactive (CRYPTO_INACTIVE = 1)."]
409 #[inline(always)]
410 pub fn crypto_key_x(
411 self,
412 ) -> crate::common::RegisterField<
413 0,
414 0xffffffff,
415 1,
416 0,
417 u32,
418 u32,
419 CryptoKeysStart_SPEC,
420 crate::common::W,
421 > {
422 crate::common::RegisterField::<
423 0,
424 0xffffffff,
425 1,
426 0,
427 u32,
428 u32,
429 CryptoKeysStart_SPEC,
430 crate::common::W,
431 >::from_register(self, 0)
432 }
433}
434impl ::core::default::Default for CryptoKeysStart {
435 #[inline(always)]
436 fn default() -> CryptoKeysStart {
437 <crate::RegValueT<CryptoKeysStart_SPEC> as RegisterValue<_>>::new(0)
438 }
439}
440
441#[doc(hidden)]
442#[derive(Copy, Clone, Eq, PartialEq)]
443pub struct CryptoLenReg_SPEC;
444impl crate::sealed::RegSpec for CryptoLenReg_SPEC {
445 type DataType = u32;
446}
447
448#[doc = "Crypto Length of the input block in bytes"]
449pub type CryptoLenReg = crate::RegValueT<CryptoLenReg_SPEC>;
450
451impl CryptoLenReg {
452 #[doc = "It contains the number of bytes of input data. If this number is not a multiple of a block size, the data is automatically extended with zeros. The value of this register is updated as the calculation proceeds and the output data are written to the memory."]
453 #[inline(always)]
454 pub fn crypto_len(
455 self,
456 ) -> crate::common::RegisterField<
457 0,
458 0xffffff,
459 1,
460 0,
461 u32,
462 u32,
463 CryptoLenReg_SPEC,
464 crate::common::RW,
465 > {
466 crate::common::RegisterField::<
467 0,
468 0xffffff,
469 1,
470 0,
471 u32,
472 u32,
473 CryptoLenReg_SPEC,
474 crate::common::RW,
475 >::from_register(self, 0)
476 }
477}
478impl ::core::default::Default for CryptoLenReg {
479 #[inline(always)]
480 fn default() -> CryptoLenReg {
481 <crate::RegValueT<CryptoLenReg_SPEC> as RegisterValue<_>>::new(0)
482 }
483}
484
485#[doc(hidden)]
486#[derive(Copy, Clone, Eq, PartialEq)]
487pub struct CryptoMreg0Reg_SPEC;
488impl crate::sealed::RegSpec for CryptoMreg0Reg_SPEC {
489 type DataType = u32;
490}
491
492#[doc = "Crypto Mode depended register 0"]
493pub type CryptoMreg0Reg = crate::RegValueT<CryptoMreg0Reg_SPEC>;
494
495impl CryptoMreg0Reg {
496 #[doc = "It contains information that are depended by the mode of operation, when is used the AES algorithm:\nCBC - IV\\[31:0\\]\nCTR - CTRBLK\\[31:0\\]. It is the initial value of the 32 bits counter.\nAt any other mode, the contents of this register has no meaning."]
497 #[inline(always)]
498 pub fn crypto_mreg0(
499 self,
500 ) -> crate::common::RegisterField<
501 0,
502 0xffffffff,
503 1,
504 0,
505 u32,
506 u32,
507 CryptoMreg0Reg_SPEC,
508 crate::common::RW,
509 > {
510 crate::common::RegisterField::<
511 0,
512 0xffffffff,
513 1,
514 0,
515 u32,
516 u32,
517 CryptoMreg0Reg_SPEC,
518 crate::common::RW,
519 >::from_register(self, 0)
520 }
521}
522impl ::core::default::Default for CryptoMreg0Reg {
523 #[inline(always)]
524 fn default() -> CryptoMreg0Reg {
525 <crate::RegValueT<CryptoMreg0Reg_SPEC> as RegisterValue<_>>::new(0)
526 }
527}
528
529#[doc(hidden)]
530#[derive(Copy, Clone, Eq, PartialEq)]
531pub struct CryptoMreg1Reg_SPEC;
532impl crate::sealed::RegSpec for CryptoMreg1Reg_SPEC {
533 type DataType = u32;
534}
535
536#[doc = "Crypto Mode depended register 1"]
537pub type CryptoMreg1Reg = crate::RegValueT<CryptoMreg1Reg_SPEC>;
538
539impl CryptoMreg1Reg {
540 #[doc = "It contains information that are depended by the mode of operation, when is used the AES algorithm:\nCBC - IV\\[63:32\\]\nCTR - CTRBLK\\[63:32\\]\nAt any other mode, the contents of this register has no meaning."]
541 #[inline(always)]
542 pub fn crypto_mreg1(
543 self,
544 ) -> crate::common::RegisterField<
545 0,
546 0xffffffff,
547 1,
548 0,
549 u32,
550 u32,
551 CryptoMreg1Reg_SPEC,
552 crate::common::RW,
553 > {
554 crate::common::RegisterField::<
555 0,
556 0xffffffff,
557 1,
558 0,
559 u32,
560 u32,
561 CryptoMreg1Reg_SPEC,
562 crate::common::RW,
563 >::from_register(self, 0)
564 }
565}
566impl ::core::default::Default for CryptoMreg1Reg {
567 #[inline(always)]
568 fn default() -> CryptoMreg1Reg {
569 <crate::RegValueT<CryptoMreg1Reg_SPEC> as RegisterValue<_>>::new(0)
570 }
571}
572
573#[doc(hidden)]
574#[derive(Copy, Clone, Eq, PartialEq)]
575pub struct CryptoMreg2Reg_SPEC;
576impl crate::sealed::RegSpec for CryptoMreg2Reg_SPEC {
577 type DataType = u32;
578}
579
580#[doc = "Crypto Mode depended register 2"]
581pub type CryptoMreg2Reg = crate::RegValueT<CryptoMreg2Reg_SPEC>;
582
583impl CryptoMreg2Reg {
584 #[doc = "It contains information that are depended by the mode of operation, when is used the AES algorithm:\nCBC - IV\\[95:64\\]\nCTR - CTRBLK\\[95:64\\]\nAt any other mode, the contents of this register has no meaning."]
585 #[inline(always)]
586 pub fn crypto_mreg2(
587 self,
588 ) -> crate::common::RegisterField<
589 0,
590 0xffffffff,
591 1,
592 0,
593 u32,
594 u32,
595 CryptoMreg2Reg_SPEC,
596 crate::common::RW,
597 > {
598 crate::common::RegisterField::<
599 0,
600 0xffffffff,
601 1,
602 0,
603 u32,
604 u32,
605 CryptoMreg2Reg_SPEC,
606 crate::common::RW,
607 >::from_register(self, 0)
608 }
609}
610impl ::core::default::Default for CryptoMreg2Reg {
611 #[inline(always)]
612 fn default() -> CryptoMreg2Reg {
613 <crate::RegValueT<CryptoMreg2Reg_SPEC> as RegisterValue<_>>::new(0)
614 }
615}
616
617#[doc(hidden)]
618#[derive(Copy, Clone, Eq, PartialEq)]
619pub struct CryptoMreg3Reg_SPEC;
620impl crate::sealed::RegSpec for CryptoMreg3Reg_SPEC {
621 type DataType = u32;
622}
623
624#[doc = "Crypto Mode depended register 3"]
625pub type CryptoMreg3Reg = crate::RegValueT<CryptoMreg3Reg_SPEC>;
626
627impl CryptoMreg3Reg {
628 #[doc = "It contains information that are depended by the mode of operation, when is used the AES algorithm:\nCBC - IV\\[127:96\\]\nCTR - CTRBLK\\[127:96\\]\nAt any other mode, the contents of this register has no meaning."]
629 #[inline(always)]
630 pub fn crypto_mreg3(
631 self,
632 ) -> crate::common::RegisterField<
633 0,
634 0xffffffff,
635 1,
636 0,
637 u32,
638 u32,
639 CryptoMreg3Reg_SPEC,
640 crate::common::RW,
641 > {
642 crate::common::RegisterField::<
643 0,
644 0xffffffff,
645 1,
646 0,
647 u32,
648 u32,
649 CryptoMreg3Reg_SPEC,
650 crate::common::RW,
651 >::from_register(self, 0)
652 }
653}
654impl ::core::default::Default for CryptoMreg3Reg {
655 #[inline(always)]
656 fn default() -> CryptoMreg3Reg {
657 <crate::RegValueT<CryptoMreg3Reg_SPEC> as RegisterValue<_>>::new(0)
658 }
659}
660
661#[doc(hidden)]
662#[derive(Copy, Clone, Eq, PartialEq)]
663pub struct CryptoStartReg_SPEC;
664impl crate::sealed::RegSpec for CryptoStartReg_SPEC {
665 type DataType = u32;
666}
667
668#[doc = "Crypto Start calculation"]
669pub type CryptoStartReg = crate::RegValueT<CryptoStartReg_SPEC>;
670
671impl CryptoStartReg {
672 #[doc = "Write 1 to initiate the processing of the input data. This register is auto-cleared."]
673 #[inline(always)]
674 pub fn crypto_start(
675 self,
676 ) -> crate::common::RegisterFieldBool<0, 1, 0, CryptoStartReg_SPEC, crate::common::W> {
677 crate::common::RegisterFieldBool::<0,1,0,CryptoStartReg_SPEC,crate::common::W>::from_register(self,0)
678 }
679}
680impl ::core::default::Default for CryptoStartReg {
681 #[inline(always)]
682 fn default() -> CryptoStartReg {
683 <crate::RegValueT<CryptoStartReg_SPEC> as RegisterValue<_>>::new(0)
684 }
685}
686
687#[doc(hidden)]
688#[derive(Copy, Clone, Eq, PartialEq)]
689pub struct CryptoStatusReg_SPEC;
690impl crate::sealed::RegSpec for CryptoStatusReg_SPEC {
691 type DataType = u32;
692}
693
694#[doc = "Crypto Status register"]
695pub type CryptoStatusReg = crate::RegValueT<CryptoStatusReg_SPEC>;
696
697impl CryptoStatusReg {
698 #[doc = "The status of the interrupt request line of the CRYPTO block.\n0 - There is no active interrupt request.\n1 - An interrupt request is pending."]
699 #[inline(always)]
700 pub fn crypto_irq_st(
701 self,
702 ) -> crate::common::RegisterFieldBool<2, 1, 0, CryptoStatusReg_SPEC, crate::common::R> {
703 crate::common::RegisterFieldBool::<2,1,0,CryptoStatusReg_SPEC,crate::common::R>::from_register(self,0)
704 }
705
706 #[doc = "Indicates the situation where the engine waits for more input data. This is applicable when the CRYPTO_MORE_IN= 1, so the input data are fragmented in the memory.\n0 - The crypto is not waiting for more input data.\n1 - The crypto waits for more input data.\nThe CRYPTO_INACTIVE flag remains to zero to indicate that the calculation is not finished. The supervisor of the CRYPTO must program to the CRYPTO_FETCH_ADDR and CRYPTO_LEN a new input data fragment. The calculation will be continued as soon as the CRYPTO_START register will be written with 1. This action will clear the CRYPTO_WAIT_FOR_IN flag."]
707 #[inline(always)]
708 pub fn crypto_wait_for_in(
709 self,
710 ) -> crate::common::RegisterFieldBool<1, 1, 0, CryptoStatusReg_SPEC, crate::common::R> {
711 crate::common::RegisterFieldBool::<1,1,0,CryptoStatusReg_SPEC,crate::common::R>::from_register(self,0)
712 }
713
714 #[doc = "0 - The CRYPTO is active. The processing is in progress.\n1 - The CRYPTO is inactive. The processing has finished."]
715 #[inline(always)]
716 pub fn crypto_inactive(
717 self,
718 ) -> crate::common::RegisterFieldBool<0, 1, 0, CryptoStatusReg_SPEC, crate::common::R> {
719 crate::common::RegisterFieldBool::<0,1,0,CryptoStatusReg_SPEC,crate::common::R>::from_register(self,0)
720 }
721}
722impl ::core::default::Default for CryptoStatusReg {
723 #[inline(always)]
724 fn default() -> CryptoStatusReg {
725 <crate::RegValueT<CryptoStatusReg_SPEC> as RegisterValue<_>>::new(1)
726 }
727}