da14585_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:44:41 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "Ultra-Low power Bleutooth 5.0 SoC with audio interface from Dialog Semiconductor"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adc580_bif_nl01")]
31pub mod adc580_bif_nl01;
32#[cfg(feature = "ambacore580_patch_gr00")]
33pub mod ambacore580_patch_gr00;
34#[cfg(feature = "anamisc580_nl01")]
35pub mod anamisc580_nl01;
36#[cfg(feature = "ble580_gr01")]
37pub mod ble580_gr01;
38#[cfg(feature = "chip_version")]
39pub mod chip_version;
40#[cfg(feature = "crg580_dcdc_nl01")]
41pub mod crg580_dcdc_nl01;
42#[cfg(feature = "crg580_nl01")]
43pub mod crg580_nl01;
44#[cfg(feature = "gpio580_ports_nl01")]
45pub mod gpio580_ports_nl01;
46#[cfg(feature = "i2c580_nl00")]
47pub mod i2c580_nl00;
48#[cfg(feature = "kbrd580_nl01")]
49pub mod kbrd580_nl01;
50#[cfg(feature = "nvic")]
51pub mod nvic;
52#[cfg(feature = "otpc580_gr01")]
53pub mod otpc580_gr01;
54#[cfg(feature = "quadec580_gr01")]
55pub mod quadec580_gr01;
56#[cfg(feature = "r_rfcu580_nl01")]
57pub mod r_rfcu580_nl01;
58#[cfg(feature = "rfpt580_gr01")]
59pub mod rfpt580_gr01;
60#[cfg(feature = "riscutil580_gpreg_nl01")]
61pub mod riscutil580_gpreg_nl01;
62#[cfg(feature = "riscutil580_wdog_nl00")]
63pub mod riscutil580_wdog_nl00;
64#[cfg(feature = "scb")]
65pub mod scb;
66#[cfg(feature = "spi443_nl00")]
67pub mod spi443_nl00;
68#[cfg(feature = "systick")]
69pub mod systick;
70#[cfg(feature = "tmr580_nl01")]
71pub mod tmr580_nl01;
72#[cfg(feature = "uart1")]
73pub mod uart1;
74#[cfg(feature = "uart2")]
75pub mod uart2;
76#[cfg(feature = "wkup580_nl01")]
77pub mod wkup580_nl01;
78
79#[cfg(feature = "nvic")]
80#[derive(Copy, Clone, Eq, PartialEq)]
81pub struct Nvic {
82    ptr: *mut u8,
83}
84#[cfg(feature = "nvic")]
85pub const NVIC: self::Nvic = self::Nvic {
86    ptr: 0xe000e100u32 as _,
87};
88#[cfg(feature = "scb")]
89#[derive(Copy, Clone, Eq, PartialEq)]
90pub struct Scb {
91    ptr: *mut u8,
92}
93#[cfg(feature = "scb")]
94pub const SCB: self::Scb = self::Scb {
95    ptr: 0xe000ed00u32 as _,
96};
97#[cfg(feature = "systick")]
98#[derive(Copy, Clone, Eq, PartialEq)]
99pub struct SysTick {
100    ptr: *mut u8,
101}
102#[cfg(feature = "systick")]
103pub const SYSTICK: self::SysTick = self::SysTick {
104    ptr: 0xe000e010u32 as _,
105};
106#[cfg(feature = "adc580_bif_nl01")]
107#[derive(Copy, Clone, Eq, PartialEq)]
108pub struct Adc580BifNl01 {
109    ptr: *mut u8,
110}
111#[cfg(feature = "adc580_bif_nl01")]
112pub const ADC580_BIF_NL01: self::Adc580BifNl01 = self::Adc580BifNl01 {
113    ptr: 0x50001500u32 as _,
114};
115#[cfg(feature = "ambacore580_patch_gr00")]
116#[derive(Copy, Clone, Eq, PartialEq)]
117pub struct Ambacore580PatchGr00 {
118    ptr: *mut u8,
119}
120#[cfg(feature = "ambacore580_patch_gr00")]
121pub const AMBACORE580_PATCH_GR00: self::Ambacore580PatchGr00 = self::Ambacore580PatchGr00 {
122    ptr: 0x40008400u32 as _,
123};
124#[cfg(feature = "anamisc580_nl01")]
125#[derive(Copy, Clone, Eq, PartialEq)]
126pub struct Anamisc580Nl01 {
127    ptr: *mut u8,
128}
129#[cfg(feature = "anamisc580_nl01")]
130pub const ANAMISC580_NL01: self::Anamisc580Nl01 = self::Anamisc580Nl01 {
131    ptr: 0x50001600u32 as _,
132};
133#[cfg(feature = "ble580_gr01")]
134#[derive(Copy, Clone, Eq, PartialEq)]
135pub struct Ble580Gr01 {
136    ptr: *mut u8,
137}
138#[cfg(feature = "ble580_gr01")]
139pub const BLE580_GR01: self::Ble580Gr01 = self::Ble580Gr01 {
140    ptr: 0x40000000u32 as _,
141};
142#[cfg(feature = "chip_version")]
143#[derive(Copy, Clone, Eq, PartialEq)]
144pub struct ChipVersion {
145    ptr: *mut u8,
146}
147#[cfg(feature = "chip_version")]
148pub const CHIP_VERSION: self::ChipVersion = self::ChipVersion {
149    ptr: 0x50003200u32 as _,
150};
151#[cfg(feature = "crg580_dcdc_nl01")]
152#[derive(Copy, Clone, Eq, PartialEq)]
153pub struct Crg580DcdcNl01 {
154    ptr: *mut u8,
155}
156#[cfg(feature = "crg580_dcdc_nl01")]
157pub const CRG580_DCDC_NL01: self::Crg580DcdcNl01 = self::Crg580DcdcNl01 {
158    ptr: 0x50000080u32 as _,
159};
160#[cfg(feature = "crg580_nl01")]
161#[derive(Copy, Clone, Eq, PartialEq)]
162pub struct Crg580Nl01 {
163    ptr: *mut u8,
164}
165#[cfg(feature = "crg580_nl01")]
166pub const CRG580_NL01: self::Crg580Nl01 = self::Crg580Nl01 {
167    ptr: 0x50000000u32 as _,
168};
169#[cfg(feature = "gpio580_ports_nl01")]
170#[derive(Copy, Clone, Eq, PartialEq)]
171pub struct Gpio580PortsNl01 {
172    ptr: *mut u8,
173}
174#[cfg(feature = "gpio580_ports_nl01")]
175pub const GPIO580_PORTS_NL01: self::Gpio580PortsNl01 = self::Gpio580PortsNl01 {
176    ptr: 0x50003000u32 as _,
177};
178#[cfg(feature = "i2c580_nl00")]
179#[derive(Copy, Clone, Eq, PartialEq)]
180pub struct I2C580Nl00 {
181    ptr: *mut u8,
182}
183#[cfg(feature = "i2c580_nl00")]
184pub const I2C580_NL00: self::I2C580Nl00 = self::I2C580Nl00 {
185    ptr: 0x50001300u32 as _,
186};
187#[cfg(feature = "kbrd580_nl01")]
188#[derive(Copy, Clone, Eq, PartialEq)]
189pub struct Kbrd580Nl01 {
190    ptr: *mut u8,
191}
192#[cfg(feature = "kbrd580_nl01")]
193pub const KBRD580_NL01: self::Kbrd580Nl01 = self::Kbrd580Nl01 {
194    ptr: 0x50001400u32 as _,
195};
196#[cfg(feature = "otpc580_gr01")]
197#[derive(Copy, Clone, Eq, PartialEq)]
198pub struct Otpc580Gr01 {
199    ptr: *mut u8,
200}
201#[cfg(feature = "otpc580_gr01")]
202pub const OTPC580_GR01: self::Otpc580Gr01 = self::Otpc580Gr01 {
203    ptr: 0x40008000u32 as _,
204};
205#[cfg(feature = "quadec580_gr01")]
206#[derive(Copy, Clone, Eq, PartialEq)]
207pub struct Quadec580Gr01 {
208    ptr: *mut u8,
209}
210#[cfg(feature = "quadec580_gr01")]
211pub const QUADEC580_GR01: self::Quadec580Gr01 = self::Quadec580Gr01 {
212    ptr: 0x50000200u32 as _,
213};
214#[cfg(feature = "r_rfcu580_nl01")]
215#[derive(Copy, Clone, Eq, PartialEq)]
216pub struct RRfcu580Nl01 {
217    ptr: *mut u8,
218}
219#[cfg(feature = "r_rfcu580_nl01")]
220pub const R_RFCU580_NL01: self::RRfcu580Nl01 = self::RRfcu580Nl01 {
221    ptr: 0x50002000u32 as _,
222};
223#[cfg(feature = "rfpt580_gr01")]
224#[derive(Copy, Clone, Eq, PartialEq)]
225pub struct Rfpt580Gr01 {
226    ptr: *mut u8,
227}
228#[cfg(feature = "rfpt580_gr01")]
229pub const RFPT580_GR01: self::Rfpt580Gr01 = self::Rfpt580Gr01 {
230    ptr: 0x50003500u32 as _,
231};
232#[cfg(feature = "riscutil580_gpreg_nl01")]
233#[derive(Copy, Clone, Eq, PartialEq)]
234pub struct Riscutil580GpregNl01 {
235    ptr: *mut u8,
236}
237#[cfg(feature = "riscutil580_gpreg_nl01")]
238pub const RISCUTIL580_GPREG_NL01: self::Riscutil580GpregNl01 = self::Riscutil580GpregNl01 {
239    ptr: 0x50003300u32 as _,
240};
241#[cfg(feature = "riscutil580_wdog_nl00")]
242#[derive(Copy, Clone, Eq, PartialEq)]
243pub struct Riscutil580WdogNl00 {
244    ptr: *mut u8,
245}
246#[cfg(feature = "riscutil580_wdog_nl00")]
247pub const RISCUTIL580_WDOG_NL00: self::Riscutil580WdogNl00 = self::Riscutil580WdogNl00 {
248    ptr: 0x50003100u32 as _,
249};
250#[cfg(feature = "spi443_nl00")]
251#[derive(Copy, Clone, Eq, PartialEq)]
252pub struct Spi443Nl00 {
253    ptr: *mut u8,
254}
255#[cfg(feature = "spi443_nl00")]
256pub const SPI443_NL00: self::Spi443Nl00 = self::Spi443Nl00 {
257    ptr: 0x50001200u32 as _,
258};
259#[cfg(feature = "tmr580_nl01")]
260#[derive(Copy, Clone, Eq, PartialEq)]
261pub struct Tmr580Nl01 {
262    ptr: *mut u8,
263}
264#[cfg(feature = "tmr580_nl01")]
265pub const TMR580_NL01: self::Tmr580Nl01 = self::Tmr580Nl01 {
266    ptr: 0x50003400u32 as _,
267};
268#[cfg(feature = "uart1")]
269#[derive(Copy, Clone, Eq, PartialEq)]
270pub struct Uart1 {
271    ptr: *mut u8,
272}
273#[cfg(feature = "uart1")]
274pub const UART1: self::Uart1 = self::Uart1 {
275    ptr: 0x50001000u32 as _,
276};
277#[cfg(feature = "uart2")]
278#[derive(Copy, Clone, Eq, PartialEq)]
279pub struct Uart2 {
280    ptr: *mut u8,
281}
282#[cfg(feature = "uart2")]
283pub const UART2: self::Uart2 = self::Uart2 {
284    ptr: 0x50001100u32 as _,
285};
286#[cfg(feature = "wkup580_nl01")]
287#[derive(Copy, Clone, Eq, PartialEq)]
288pub struct Wkup580Nl01 {
289    ptr: *mut u8,
290}
291#[cfg(feature = "wkup580_nl01")]
292pub const WKUP580_NL01: self::Wkup580Nl01 = self::Wkup580Nl01 {
293    ptr: 0x50000100u32 as _,
294};
295
296pub use cortex_m::peripheral::Peripherals as CorePeripherals;
297pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
298#[doc = "Number available in the NVIC for configuring priority"]
299pub const NVIC_PRIO_BITS: u8 = 3;
300#[doc(hidden)]
301pub union Vector {
302    _handler: unsafe extern "C" fn(),
303    _reserved: u32,
304}
305#[cfg(feature = "rt")]
306pub use self::Interrupt as interrupt;
307#[cfg(feature = "rt")]
308pub use cortex_m_rt::interrupt;
309#[cfg(feature = "rt")]
310pub mod interrupt_handlers {
311    unsafe extern "C" {
312        pub fn BLE_WAKEUP_LP();
313        pub fn BLE_GEN();
314        pub fn UART();
315        pub fn UART2();
316        pub fn I2C();
317        pub fn SPI();
318        pub fn ADC();
319        pub fn KEYBRD();
320        pub fn BLE_RF_DIAG();
321        pub fn RF_CAL();
322        pub fn GPIO0();
323        pub fn GPIO1();
324        pub fn GPIO2();
325        pub fn GPIO3();
326        pub fn GPIO4();
327        pub fn SWTIM();
328        pub fn WKUP_QUADEC();
329        pub fn PCM();
330        pub fn SRC_IN();
331        pub fn SRC_OUT();
332        pub fn DMA();
333    }
334}
335#[cfg(feature = "rt")]
336#[doc(hidden)]
337#[unsafe(link_section = ".vector_table.interrupts")]
338#[unsafe(no_mangle)]
339pub static __INTERRUPTS: [Vector; 21] = [
340    Vector {
341        _handler: interrupt_handlers::BLE_WAKEUP_LP,
342    },
343    Vector {
344        _handler: interrupt_handlers::BLE_GEN,
345    },
346    Vector {
347        _handler: interrupt_handlers::UART,
348    },
349    Vector {
350        _handler: interrupt_handlers::UART2,
351    },
352    Vector {
353        _handler: interrupt_handlers::I2C,
354    },
355    Vector {
356        _handler: interrupt_handlers::SPI,
357    },
358    Vector {
359        _handler: interrupt_handlers::ADC,
360    },
361    Vector {
362        _handler: interrupt_handlers::KEYBRD,
363    },
364    Vector {
365        _handler: interrupt_handlers::BLE_RF_DIAG,
366    },
367    Vector {
368        _handler: interrupt_handlers::RF_CAL,
369    },
370    Vector {
371        _handler: interrupt_handlers::GPIO0,
372    },
373    Vector {
374        _handler: interrupt_handlers::GPIO1,
375    },
376    Vector {
377        _handler: interrupt_handlers::GPIO2,
378    },
379    Vector {
380        _handler: interrupt_handlers::GPIO3,
381    },
382    Vector {
383        _handler: interrupt_handlers::GPIO4,
384    },
385    Vector {
386        _handler: interrupt_handlers::SWTIM,
387    },
388    Vector {
389        _handler: interrupt_handlers::WKUP_QUADEC,
390    },
391    Vector {
392        _handler: interrupt_handlers::PCM,
393    },
394    Vector {
395        _handler: interrupt_handlers::SRC_IN,
396    },
397    Vector {
398        _handler: interrupt_handlers::SRC_OUT,
399    },
400    Vector {
401        _handler: interrupt_handlers::DMA,
402    },
403];
404#[doc = "Enumeration of all the interrupts."]
405#[derive(Copy, Clone, Debug, PartialEq, Eq)]
406#[repr(u16)]
407pub enum Interrupt {
408    #[doc = "Wake-up from Low Power (Extended Sleep) interrupt from BLE"]
409    BLE_WAKEUP_LP = 0,
410
411    #[doc = "BLE Interrupt from various BLE sources."]
412    BLE_GEN = 1,
413
414    #[doc = "UART interrupt"]
415    UART = 2,
416
417    #[doc = "UART2 interrupt"]
418    UART2 = 3,
419
420    #[doc = "I2C interrupt"]
421    I2C = 4,
422
423    #[doc = "SPI interrupt"]
424    SPI = 5,
425
426    #[doc = "Analog-Digital Converter interrupt."]
427    ADC = 6,
428
429    #[doc = "Keyboard interrupt."]
430    KEYBRD = 7,
431
432    #[doc = "Baseband or Radio Diagnostics Interrupt"]
433    BLE_RF_DIAG = 8,
434
435    #[doc = "RF Calibration Interrupt"]
436    RF_CAL = 9,
437
438    #[doc = "GPIO0 interrupt through debounce"]
439    GPIO0 = 10,
440
441    #[doc = "GPIO1 interrupt through debounce"]
442    GPIO1 = 11,
443
444    #[doc = "GPIO2 interrupt through debounce"]
445    GPIO2 = 12,
446
447    #[doc = "GPIO3 interrupt through debounce"]
448    GPIO3 = 13,
449
450    #[doc = "GPIO4 interrupt through debounce"]
451    GPIO4 = 14,
452
453    #[doc = "Software Timer interrupt"]
454    SWTIM = 15,
455
456    #[doc = "Combines the Wake up Capture Timer interrupt, the GPIO interrupt and the QuadDecoder interrupt"]
457    WKUP_QUADEC = 16,
458
459    #[doc = "PCM interrupt"]
460    PCM = 17,
461
462    #[doc = "Sample rate converter input interrupt"]
463    SRC_IN = 18,
464
465    #[doc = "Sample rate converter output interrupt"]
466    SRC_OUT = 19,
467
468    #[doc = "DMA interrupt"]
469    DMA = 20,
470}
471unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
472    #[inline(always)]
473    fn number(self) -> u16 {
474        self as u16
475    }
476}
477#[allow(non_snake_case)]
478/// Required for compatibility with RTIC and other frameworks
479pub struct Peripherals {
480    #[cfg(feature = "nvic")]
481    pub NVIC: self::Nvic,
482    #[cfg(feature = "scb")]
483    pub SCB: self::Scb,
484    #[cfg(feature = "systick")]
485    pub SYSTICK: self::SysTick,
486    #[cfg(feature = "adc580_bif_nl01")]
487    pub ADC580_BIF_NL01: self::Adc580BifNl01,
488    #[cfg(feature = "ambacore580_patch_gr00")]
489    pub AMBACORE580_PATCH_GR00: self::Ambacore580PatchGr00,
490    #[cfg(feature = "anamisc580_nl01")]
491    pub ANAMISC580_NL01: self::Anamisc580Nl01,
492    #[cfg(feature = "ble580_gr01")]
493    pub BLE580_GR01: self::Ble580Gr01,
494    #[cfg(feature = "chip_version")]
495    pub CHIP_VERSION: self::ChipVersion,
496    #[cfg(feature = "crg580_dcdc_nl01")]
497    pub CRG580_DCDC_NL01: self::Crg580DcdcNl01,
498    #[cfg(feature = "crg580_nl01")]
499    pub CRG580_NL01: self::Crg580Nl01,
500    #[cfg(feature = "gpio580_ports_nl01")]
501    pub GPIO580_PORTS_NL01: self::Gpio580PortsNl01,
502    #[cfg(feature = "i2c580_nl00")]
503    pub I2C580_NL00: self::I2C580Nl00,
504    #[cfg(feature = "kbrd580_nl01")]
505    pub KBRD580_NL01: self::Kbrd580Nl01,
506    #[cfg(feature = "otpc580_gr01")]
507    pub OTPC580_GR01: self::Otpc580Gr01,
508    #[cfg(feature = "quadec580_gr01")]
509    pub QUADEC580_GR01: self::Quadec580Gr01,
510    #[cfg(feature = "r_rfcu580_nl01")]
511    pub R_RFCU580_NL01: self::RRfcu580Nl01,
512    #[cfg(feature = "rfpt580_gr01")]
513    pub RFPT580_GR01: self::Rfpt580Gr01,
514    #[cfg(feature = "riscutil580_gpreg_nl01")]
515    pub RISCUTIL580_GPREG_NL01: self::Riscutil580GpregNl01,
516    #[cfg(feature = "riscutil580_wdog_nl00")]
517    pub RISCUTIL580_WDOG_NL00: self::Riscutil580WdogNl00,
518    #[cfg(feature = "spi443_nl00")]
519    pub SPI443_NL00: self::Spi443Nl00,
520    #[cfg(feature = "tmr580_nl01")]
521    pub TMR580_NL01: self::Tmr580Nl01,
522    #[cfg(feature = "uart1")]
523    pub UART1: self::Uart1,
524    #[cfg(feature = "uart2")]
525    pub UART2: self::Uart2,
526    #[cfg(feature = "wkup580_nl01")]
527    pub WKUP580_NL01: self::Wkup580Nl01,
528}
529
530impl Peripherals {
531    /// Returns Peripheral struct multiple times
532    /// Required for compatibility with RTIC and other frameworks
533    #[inline]
534    pub fn take() -> Option<Self> {
535        Some(Self::steal())
536    }
537
538    /// Returns Peripheral struct multiple times
539    /// Required for compatibility with RTIC and other frameworks
540    #[inline]
541    pub fn steal() -> Self {
542        Peripherals {
543            #[cfg(feature = "nvic")]
544            NVIC: crate::NVIC,
545            #[cfg(feature = "scb")]
546            SCB: crate::SCB,
547            #[cfg(feature = "systick")]
548            SYSTICK: crate::SYSTICK,
549            #[cfg(feature = "adc580_bif_nl01")]
550            ADC580_BIF_NL01: crate::ADC580_BIF_NL01,
551            #[cfg(feature = "ambacore580_patch_gr00")]
552            AMBACORE580_PATCH_GR00: crate::AMBACORE580_PATCH_GR00,
553            #[cfg(feature = "anamisc580_nl01")]
554            ANAMISC580_NL01: crate::ANAMISC580_NL01,
555            #[cfg(feature = "ble580_gr01")]
556            BLE580_GR01: crate::BLE580_GR01,
557            #[cfg(feature = "chip_version")]
558            CHIP_VERSION: crate::CHIP_VERSION,
559            #[cfg(feature = "crg580_dcdc_nl01")]
560            CRG580_DCDC_NL01: crate::CRG580_DCDC_NL01,
561            #[cfg(feature = "crg580_nl01")]
562            CRG580_NL01: crate::CRG580_NL01,
563            #[cfg(feature = "gpio580_ports_nl01")]
564            GPIO580_PORTS_NL01: crate::GPIO580_PORTS_NL01,
565            #[cfg(feature = "i2c580_nl00")]
566            I2C580_NL00: crate::I2C580_NL00,
567            #[cfg(feature = "kbrd580_nl01")]
568            KBRD580_NL01: crate::KBRD580_NL01,
569            #[cfg(feature = "otpc580_gr01")]
570            OTPC580_GR01: crate::OTPC580_GR01,
571            #[cfg(feature = "quadec580_gr01")]
572            QUADEC580_GR01: crate::QUADEC580_GR01,
573            #[cfg(feature = "r_rfcu580_nl01")]
574            R_RFCU580_NL01: crate::R_RFCU580_NL01,
575            #[cfg(feature = "rfpt580_gr01")]
576            RFPT580_GR01: crate::RFPT580_GR01,
577            #[cfg(feature = "riscutil580_gpreg_nl01")]
578            RISCUTIL580_GPREG_NL01: crate::RISCUTIL580_GPREG_NL01,
579            #[cfg(feature = "riscutil580_wdog_nl00")]
580            RISCUTIL580_WDOG_NL00: crate::RISCUTIL580_WDOG_NL00,
581            #[cfg(feature = "spi443_nl00")]
582            SPI443_NL00: crate::SPI443_NL00,
583            #[cfg(feature = "tmr580_nl01")]
584            TMR580_NL01: crate::TMR580_NL01,
585            #[cfg(feature = "uart1")]
586            UART1: crate::UART1,
587            #[cfg(feature = "uart2")]
588            UART2: crate::UART2,
589            #[cfg(feature = "wkup580_nl01")]
590            WKUP580_NL01: crate::WKUP580_NL01,
591        }
592    }
593}
da14585_pac/lib.rs

da14585_pac/
lib.rs
