da14531_pac/
lib.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:44:12 +0000
19#![cfg_attr(not(feature = "tracing"), no_std)]
20#![allow(non_camel_case_types)]
21#![doc = "DA14531"]
22pub mod common;
23pub use common::*;
24
25#[cfg(feature = "tracing")]
26pub mod reg_name;
27#[cfg(feature = "tracing")]
28pub mod tracing;
29
30#[cfg(feature = "adplldig")]
31pub mod adplldig;
32#[cfg(feature = "anamisc")]
33pub mod anamisc;
34#[cfg(feature = "ble")]
35pub mod ble;
36#[cfg(feature = "chip_version")]
37pub mod chip_version;
38#[cfg(feature = "crg_aon")]
39pub mod crg_aon;
40#[cfg(feature = "crg_tim")]
41pub mod crg_tim;
42#[cfg(feature = "crg_top")]
43pub mod crg_top;
44#[cfg(feature = "gpadc")]
45pub mod gpadc;
46#[cfg(feature = "gpio")]
47pub mod gpio;
48#[cfg(feature = "gpreg")]
49pub mod gpreg;
50#[cfg(feature = "i2c")]
51pub mod i2c;
52#[cfg(feature = "kbrd")]
53pub mod kbrd;
54#[cfg(feature = "mbist_sram12")]
55pub mod mbist_sram12;
56#[cfg(feature = "mbist_sram3")]
57pub mod mbist_sram3;
58#[cfg(feature = "nvic")]
59pub mod nvic;
60#[cfg(feature = "otpc")]
61pub mod otpc;
62#[cfg(feature = "patch")]
63pub mod patch;
64#[cfg(feature = "quadec")]
65pub mod quadec;
66#[cfg(feature = "rfcu")]
67pub mod rfcu;
68#[cfg(feature = "rfcu_power")]
69pub mod rfcu_power;
70#[cfg(feature = "rfmon")]
71pub mod rfmon;
72#[cfg(feature = "rtc")]
73pub mod rtc;
74#[cfg(feature = "scb")]
75pub mod scb;
76#[cfg(feature = "spi")]
77pub mod spi;
78#[cfg(feature = "sys_wdog")]
79pub mod sys_wdog;
80#[cfg(feature = "systick")]
81pub mod systick;
82#[cfg(feature = "timer0")]
83pub mod timer0;
84#[cfg(feature = "timer1")]
85pub mod timer1;
86#[cfg(feature = "uart")]
87pub mod uart;
88#[cfg(feature = "uart2")]
89pub mod uart2;
90#[cfg(feature = "wkup")]
91pub mod wkup;
92
93#[cfg(feature = "nvic")]
94#[derive(Copy, Clone, Eq, PartialEq)]
95pub struct Nvic {
96    ptr: *mut u8,
97}
98#[cfg(feature = "nvic")]
99pub const NVIC: self::Nvic = self::Nvic {
100    ptr: 0xe000e100u32 as _,
101};
102#[cfg(feature = "scb")]
103#[derive(Copy, Clone, Eq, PartialEq)]
104pub struct Scb {
105    ptr: *mut u8,
106}
107#[cfg(feature = "scb")]
108pub const SCB: self::Scb = self::Scb {
109    ptr: 0xe000ed00u32 as _,
110};
111#[cfg(feature = "systick")]
112#[derive(Copy, Clone, Eq, PartialEq)]
113pub struct SysTick {
114    ptr: *mut u8,
115}
116#[cfg(feature = "systick")]
117pub const SYSTICK: self::SysTick = self::SysTick {
118    ptr: 0xe000e010u32 as _,
119};
120#[cfg(feature = "adplldig")]
121#[derive(Copy, Clone, Eq, PartialEq)]
122pub struct Adplldig {
123    ptr: *mut u8,
124}
125#[cfg(feature = "adplldig")]
126pub const ADPLLDIG: self::Adplldig = self::Adplldig {
127    ptr: 0x40003000u32 as _,
128};
129#[cfg(feature = "anamisc")]
130#[derive(Copy, Clone, Eq, PartialEq)]
131pub struct Anamisc {
132    ptr: *mut u8,
133}
134#[cfg(feature = "anamisc")]
135pub const ANAMISC: self::Anamisc = self::Anamisc {
136    ptr: 0x50001600u32 as _,
137};
138#[cfg(feature = "ble")]
139#[derive(Copy, Clone, Eq, PartialEq)]
140pub struct Ble {
141    ptr: *mut u8,
142}
143#[cfg(feature = "ble")]
144pub const BLE: self::Ble = self::Ble {
145    ptr: 0x40000000u32 as _,
146};
147#[cfg(feature = "chip_version")]
148#[derive(Copy, Clone, Eq, PartialEq)]
149pub struct ChipVersion {
150    ptr: *mut u8,
151}
152#[cfg(feature = "chip_version")]
153pub const CHIP_VERSION: self::ChipVersion = self::ChipVersion {
154    ptr: 0x50003200u32 as _,
155};
156#[cfg(feature = "crg_aon")]
157#[derive(Copy, Clone, Eq, PartialEq)]
158pub struct CrgAon {
159    ptr: *mut u8,
160}
161#[cfg(feature = "crg_aon")]
162pub const CRG_AON: self::CrgAon = self::CrgAon {
163    ptr: 0x50000300u32 as _,
164};
165#[cfg(feature = "crg_tim")]
166#[derive(Copy, Clone, Eq, PartialEq)]
167pub struct CrgTim {
168    ptr: *mut u8,
169}
170#[cfg(feature = "crg_tim")]
171pub const CRG_TIM: self::CrgTim = self::CrgTim {
172    ptr: 0x50004200u32 as _,
173};
174#[cfg(feature = "crg_top")]
175#[derive(Copy, Clone, Eq, PartialEq)]
176pub struct CrgTop {
177    ptr: *mut u8,
178}
179#[cfg(feature = "crg_top")]
180pub const CRG_TOP: self::CrgTop = self::CrgTop {
181    ptr: 0x50000000u32 as _,
182};
183#[cfg(feature = "gpadc")]
184#[derive(Copy, Clone, Eq, PartialEq)]
185pub struct Gpadc {
186    ptr: *mut u8,
187}
188#[cfg(feature = "gpadc")]
189pub const GPADC: self::Gpadc = self::Gpadc {
190    ptr: 0x50001500u32 as _,
191};
192#[cfg(feature = "gpio")]
193#[derive(Copy, Clone, Eq, PartialEq)]
194pub struct Gpio {
195    ptr: *mut u8,
196}
197#[cfg(feature = "gpio")]
198pub const GPIO: self::Gpio = self::Gpio {
199    ptr: 0x50003000u32 as _,
200};
201#[cfg(feature = "gpreg")]
202#[derive(Copy, Clone, Eq, PartialEq)]
203pub struct Gpreg {
204    ptr: *mut u8,
205}
206#[cfg(feature = "gpreg")]
207pub const GPREG: self::Gpreg = self::Gpreg {
208    ptr: 0x50003300u32 as _,
209};
210#[cfg(feature = "i2c")]
211#[derive(Copy, Clone, Eq, PartialEq)]
212pub struct I2C {
213    ptr: *mut u8,
214}
215#[cfg(feature = "i2c")]
216pub const I2C: self::I2C = self::I2C {
217    ptr: 0x50001300u32 as _,
218};
219#[cfg(feature = "kbrd")]
220#[derive(Copy, Clone, Eq, PartialEq)]
221pub struct Kbrd {
222    ptr: *mut u8,
223}
224#[cfg(feature = "kbrd")]
225pub const KBRD: self::Kbrd = self::Kbrd {
226    ptr: 0x50001400u32 as _,
227};
228#[cfg(feature = "mbist_sram12")]
229#[derive(Copy, Clone, Eq, PartialEq)]
230pub struct MbistSram12 {
231    ptr: *mut u8,
232}
233#[cfg(feature = "mbist_sram12")]
234pub const MBIST_SRAM12: self::MbistSram12 = self::MbistSram12 {
235    ptr: 0x50003700u32 as _,
236};
237#[cfg(feature = "mbist_sram3")]
238#[derive(Copy, Clone, Eq, PartialEq)]
239pub struct MbistSram3 {
240    ptr: *mut u8,
241}
242#[cfg(feature = "mbist_sram3")]
243pub const MBIST_SRAM3: self::MbistSram3 = self::MbistSram3 {
244    ptr: 0x50003800u32 as _,
245};
246#[cfg(feature = "otpc")]
247#[derive(Copy, Clone, Eq, PartialEq)]
248pub struct Otpc {
249    ptr: *mut u8,
250}
251#[cfg(feature = "otpc")]
252pub const OTPC: self::Otpc = self::Otpc {
253    ptr: 0x7f40000u32 as _,
254};
255#[cfg(feature = "patch")]
256#[derive(Copy, Clone, Eq, PartialEq)]
257pub struct Patch {
258    ptr: *mut u8,
259}
260#[cfg(feature = "patch")]
261pub const PATCH: self::Patch = self::Patch {
262    ptr: 0x40080000u32 as _,
263};
264#[cfg(feature = "quadec")]
265#[derive(Copy, Clone, Eq, PartialEq)]
266pub struct Quadec {
267    ptr: *mut u8,
268}
269#[cfg(feature = "quadec")]
270pub const QUADEC: self::Quadec = self::Quadec {
271    ptr: 0x50000200u32 as _,
272};
273#[cfg(feature = "rfcu")]
274#[derive(Copy, Clone, Eq, PartialEq)]
275pub struct Rfcu {
276    ptr: *mut u8,
277}
278#[cfg(feature = "rfcu")]
279pub const RFCU: self::Rfcu = self::Rfcu {
280    ptr: 0x40001000u32 as _,
281};
282#[cfg(feature = "rfcu_power")]
283#[derive(Copy, Clone, Eq, PartialEq)]
284pub struct RfcuPower {
285    ptr: *mut u8,
286}
287#[cfg(feature = "rfcu_power")]
288pub const RFCU_POWER: self::RfcuPower = self::RfcuPower {
289    ptr: 0x40001200u32 as _,
290};
291#[cfg(feature = "rfmon")]
292#[derive(Copy, Clone, Eq, PartialEq)]
293pub struct Rfmon {
294    ptr: *mut u8,
295}
296#[cfg(feature = "rfmon")]
297pub const RFMON: self::Rfmon = self::Rfmon {
298    ptr: 0x50003500u32 as _,
299};
300#[cfg(feature = "rtc")]
301#[derive(Copy, Clone, Eq, PartialEq)]
302pub struct Rtc {
303    ptr: *mut u8,
304}
305#[cfg(feature = "rtc")]
306pub const RTC: self::Rtc = self::Rtc {
307    ptr: 0x50004100u32 as _,
308};
309#[cfg(feature = "spi")]
310#[derive(Copy, Clone, Eq, PartialEq)]
311pub struct Spi {
312    ptr: *mut u8,
313}
314#[cfg(feature = "spi")]
315pub const SPI: self::Spi = self::Spi {
316    ptr: 0x50001200u32 as _,
317};
318#[cfg(feature = "sys_wdog")]
319#[derive(Copy, Clone, Eq, PartialEq)]
320pub struct SysWdog {
321    ptr: *mut u8,
322}
323#[cfg(feature = "sys_wdog")]
324pub const SYS_WDOG: self::SysWdog = self::SysWdog {
325    ptr: 0x50003100u32 as _,
326};
327#[cfg(feature = "timer0")]
328#[derive(Copy, Clone, Eq, PartialEq)]
329pub struct Timer0 {
330    ptr: *mut u8,
331}
332#[cfg(feature = "timer0")]
333pub const TIMER0: self::Timer0 = self::Timer0 {
334    ptr: 0x50003400u32 as _,
335};
336#[cfg(feature = "timer1")]
337#[derive(Copy, Clone, Eq, PartialEq)]
338pub struct Timer1 {
339    ptr: *mut u8,
340}
341#[cfg(feature = "timer1")]
342pub const TIMER1: self::Timer1 = self::Timer1 {
343    ptr: 0x50004000u32 as _,
344};
345#[cfg(feature = "uart")]
346#[derive(Copy, Clone, Eq, PartialEq)]
347pub struct Uart {
348    ptr: *mut u8,
349}
350#[cfg(feature = "uart")]
351pub const UART: self::Uart = self::Uart {
352    ptr: 0x50001000u32 as _,
353};
354#[cfg(feature = "uart2")]
355#[derive(Copy, Clone, Eq, PartialEq)]
356pub struct Uart2 {
357    ptr: *mut u8,
358}
359#[cfg(feature = "uart2")]
360pub const UART2: self::Uart2 = self::Uart2 {
361    ptr: 0x50001100u32 as _,
362};
363#[cfg(feature = "wkup")]
364#[derive(Copy, Clone, Eq, PartialEq)]
365pub struct Wkup {
366    ptr: *mut u8,
367}
368#[cfg(feature = "wkup")]
369pub const WKUP: self::Wkup = self::Wkup {
370    ptr: 0x50000100u32 as _,
371};
372
373pub use cortex_m::peripheral::Peripherals as CorePeripherals;
374pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU};
375#[doc = "Number available in the NVIC for configuring priority"]
376pub const NVIC_PRIO_BITS: u8 = 3;
377#[doc(hidden)]
378pub union Vector {
379    _handler: unsafe extern "C" fn(),
380    _reserved: u32,
381}
382#[allow(non_snake_case)]
383/// Required for compatibility with RTIC and other frameworks
384pub struct Peripherals {
385    #[cfg(feature = "nvic")]
386    pub NVIC: self::Nvic,
387    #[cfg(feature = "scb")]
388    pub SCB: self::Scb,
389    #[cfg(feature = "systick")]
390    pub SYSTICK: self::SysTick,
391    #[cfg(feature = "adplldig")]
392    pub ADPLLDIG: self::Adplldig,
393    #[cfg(feature = "anamisc")]
394    pub ANAMISC: self::Anamisc,
395    #[cfg(feature = "ble")]
396    pub BLE: self::Ble,
397    #[cfg(feature = "chip_version")]
398    pub CHIP_VERSION: self::ChipVersion,
399    #[cfg(feature = "crg_aon")]
400    pub CRG_AON: self::CrgAon,
401    #[cfg(feature = "crg_tim")]
402    pub CRG_TIM: self::CrgTim,
403    #[cfg(feature = "crg_top")]
404    pub CRG_TOP: self::CrgTop,
405    #[cfg(feature = "gpadc")]
406    pub GPADC: self::Gpadc,
407    #[cfg(feature = "gpio")]
408    pub GPIO: self::Gpio,
409    #[cfg(feature = "gpreg")]
410    pub GPREG: self::Gpreg,
411    #[cfg(feature = "i2c")]
412    pub I2C: self::I2C,
413    #[cfg(feature = "kbrd")]
414    pub KBRD: self::Kbrd,
415    #[cfg(feature = "mbist_sram12")]
416    pub MBIST_SRAM12: self::MbistSram12,
417    #[cfg(feature = "mbist_sram3")]
418    pub MBIST_SRAM3: self::MbistSram3,
419    #[cfg(feature = "otpc")]
420    pub OTPC: self::Otpc,
421    #[cfg(feature = "patch")]
422    pub PATCH: self::Patch,
423    #[cfg(feature = "quadec")]
424    pub QUADEC: self::Quadec,
425    #[cfg(feature = "rfcu")]
426    pub RFCU: self::Rfcu,
427    #[cfg(feature = "rfcu_power")]
428    pub RFCU_POWER: self::RfcuPower,
429    #[cfg(feature = "rfmon")]
430    pub RFMON: self::Rfmon,
431    #[cfg(feature = "rtc")]
432    pub RTC: self::Rtc,
433    #[cfg(feature = "spi")]
434    pub SPI: self::Spi,
435    #[cfg(feature = "sys_wdog")]
436    pub SYS_WDOG: self::SysWdog,
437    #[cfg(feature = "timer0")]
438    pub TIMER0: self::Timer0,
439    #[cfg(feature = "timer1")]
440    pub TIMER1: self::Timer1,
441    #[cfg(feature = "uart")]
442    pub UART: self::Uart,
443    #[cfg(feature = "uart2")]
444    pub UART2: self::Uart2,
445    #[cfg(feature = "wkup")]
446    pub WKUP: self::Wkup,
447}
448
449impl Peripherals {
450    /// Returns Peripheral struct multiple times
451    /// Required for compatibility with RTIC and other frameworks
452    #[inline]
453    pub fn take() -> Option<Self> {
454        Some(Self::steal())
455    }
456
457    /// Returns Peripheral struct multiple times
458    /// Required for compatibility with RTIC and other frameworks
459    #[inline]
460    pub fn steal() -> Self {
461        Peripherals {
462            #[cfg(feature = "nvic")]
463            NVIC: crate::NVIC,
464            #[cfg(feature = "scb")]
465            SCB: crate::SCB,
466            #[cfg(feature = "systick")]
467            SYSTICK: crate::SYSTICK,
468            #[cfg(feature = "adplldig")]
469            ADPLLDIG: crate::ADPLLDIG,
470            #[cfg(feature = "anamisc")]
471            ANAMISC: crate::ANAMISC,
472            #[cfg(feature = "ble")]
473            BLE: crate::BLE,
474            #[cfg(feature = "chip_version")]
475            CHIP_VERSION: crate::CHIP_VERSION,
476            #[cfg(feature = "crg_aon")]
477            CRG_AON: crate::CRG_AON,
478            #[cfg(feature = "crg_tim")]
479            CRG_TIM: crate::CRG_TIM,
480            #[cfg(feature = "crg_top")]
481            CRG_TOP: crate::CRG_TOP,
482            #[cfg(feature = "gpadc")]
483            GPADC: crate::GPADC,
484            #[cfg(feature = "gpio")]
485            GPIO: crate::GPIO,
486            #[cfg(feature = "gpreg")]
487            GPREG: crate::GPREG,
488            #[cfg(feature = "i2c")]
489            I2C: crate::I2C,
490            #[cfg(feature = "kbrd")]
491            KBRD: crate::KBRD,
492            #[cfg(feature = "mbist_sram12")]
493            MBIST_SRAM12: crate::MBIST_SRAM12,
494            #[cfg(feature = "mbist_sram3")]
495            MBIST_SRAM3: crate::MBIST_SRAM3,
496            #[cfg(feature = "otpc")]
497            OTPC: crate::OTPC,
498            #[cfg(feature = "patch")]
499            PATCH: crate::PATCH,
500            #[cfg(feature = "quadec")]
501            QUADEC: crate::QUADEC,
502            #[cfg(feature = "rfcu")]
503            RFCU: crate::RFCU,
504            #[cfg(feature = "rfcu_power")]
505            RFCU_POWER: crate::RFCU_POWER,
506            #[cfg(feature = "rfmon")]
507            RFMON: crate::RFMON,
508            #[cfg(feature = "rtc")]
509            RTC: crate::RTC,
510            #[cfg(feature = "spi")]
511            SPI: crate::SPI,
512            #[cfg(feature = "sys_wdog")]
513            SYS_WDOG: crate::SYS_WDOG,
514            #[cfg(feature = "timer0")]
515            TIMER0: crate::TIMER0,
516            #[cfg(feature = "timer1")]
517            TIMER1: crate::TIMER1,
518            #[cfg(feature = "uart")]
519            UART: crate::UART,
520            #[cfg(feature = "uart2")]
521            UART2: crate::UART2,
522            #[cfg(feature = "wkup")]
523            WKUP: crate::WKUP,
524        }
525    }
526}