da14531_pac/
nvic.rs

1/*
2DISCLAIMER
3This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products.
4No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
5applicable laws, including copyright laws.
6THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED
7OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
8NON-INFRINGEMENT.  ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY
9LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT,
10INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR
11ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
12Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability
13of this software. By using this software, you agree to the additional terms and conditions found by accessing the
14following link:
15http://www.renesas.com/disclaimer
16
17*/
18// Generated from SVD 1.2, with svd2pac 0.6.0 on Thu, 24 Jul 2025 04:44:12 +0000
19
20#![allow(clippy::identity_op)]
21#![allow(clippy::module_inception)]
22#![allow(clippy::derivable_impls)]
23#[allow(unused_imports)]
24use crate::common::sealed;
25#[allow(unused_imports)]
26use crate::common::*;
27#[doc = r"Cortex M0 NVIC registers"]
28unsafe impl ::core::marker::Send for super::Nvic {}
29unsafe impl ::core::marker::Sync for super::Nvic {}
30impl super::Nvic {
31    #[allow(unused)]
32    #[inline(always)]
33    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
34        self.ptr
35    }
36
37    #[doc = "Interrupt set-enable register"]
38    #[inline(always)]
39    pub const fn iser(&self) -> &'static crate::common::Reg<self::Iser_SPEC, crate::common::RW> {
40        unsafe {
41            crate::common::Reg::<self::Iser_SPEC, crate::common::RW>::from_ptr(
42                self._svd2pac_as_ptr().add(0usize),
43            )
44        }
45    }
46
47    #[doc = "Interrupt clear-enable register"]
48    #[inline(always)]
49    pub const fn icer(&self) -> &'static crate::common::Reg<self::Icer_SPEC, crate::common::RW> {
50        unsafe {
51            crate::common::Reg::<self::Icer_SPEC, crate::common::RW>::from_ptr(
52                self._svd2pac_as_ptr().add(128usize),
53            )
54        }
55    }
56
57    #[doc = "Interrupt set-pending register"]
58    #[inline(always)]
59    pub const fn ispr(&self) -> &'static crate::common::Reg<self::Ispr_SPEC, crate::common::RW> {
60        unsafe {
61            crate::common::Reg::<self::Ispr_SPEC, crate::common::RW>::from_ptr(
62                self._svd2pac_as_ptr().add(256usize),
63            )
64        }
65    }
66
67    #[doc = "Interrupt clear-pending register"]
68    #[inline(always)]
69    pub const fn icpr(&self) -> &'static crate::common::Reg<self::Icpr_SPEC, crate::common::RW> {
70        unsafe {
71            crate::common::Reg::<self::Icpr_SPEC, crate::common::RW>::from_ptr(
72                self._svd2pac_as_ptr().add(384usize),
73            )
74        }
75    }
76
77    #[doc = "Interrupt priority register 0"]
78    #[inline(always)]
79    pub const fn ipr0(&self) -> &'static crate::common::Reg<self::Ipr0_SPEC, crate::common::RW> {
80        unsafe {
81            crate::common::Reg::<self::Ipr0_SPEC, crate::common::RW>::from_ptr(
82                self._svd2pac_as_ptr().add(768usize),
83            )
84        }
85    }
86
87    #[doc = "Interrupt priority register 1"]
88    #[inline(always)]
89    pub const fn ipr1(&self) -> &'static crate::common::Reg<self::Ipr1_SPEC, crate::common::RW> {
90        unsafe {
91            crate::common::Reg::<self::Ipr1_SPEC, crate::common::RW>::from_ptr(
92                self._svd2pac_as_ptr().add(772usize),
93            )
94        }
95    }
96
97    #[doc = "Interrupt priority register 2"]
98    #[inline(always)]
99    pub const fn ipr2(&self) -> &'static crate::common::Reg<self::Ipr2_SPEC, crate::common::RW> {
100        unsafe {
101            crate::common::Reg::<self::Ipr2_SPEC, crate::common::RW>::from_ptr(
102                self._svd2pac_as_ptr().add(776usize),
103            )
104        }
105    }
106
107    #[doc = "Interrupt priority register 3"]
108    #[inline(always)]
109    pub const fn ipr3(&self) -> &'static crate::common::Reg<self::Ipr3_SPEC, crate::common::RW> {
110        unsafe {
111            crate::common::Reg::<self::Ipr3_SPEC, crate::common::RW>::from_ptr(
112                self._svd2pac_as_ptr().add(780usize),
113            )
114        }
115    }
116
117    #[doc = "Interrupt priority register 4"]
118    #[inline(always)]
119    pub const fn ipr4(&self) -> &'static crate::common::Reg<self::Ipr4_SPEC, crate::common::RW> {
120        unsafe {
121            crate::common::Reg::<self::Ipr4_SPEC, crate::common::RW>::from_ptr(
122                self._svd2pac_as_ptr().add(784usize),
123            )
124        }
125    }
126
127    #[doc = "Interrupt priority register 5"]
128    #[inline(always)]
129    pub const fn ipr5(&self) -> &'static crate::common::Reg<self::Ipr5_SPEC, crate::common::RW> {
130        unsafe {
131            crate::common::Reg::<self::Ipr5_SPEC, crate::common::RW>::from_ptr(
132                self._svd2pac_as_ptr().add(788usize),
133            )
134        }
135    }
136
137    #[doc = "Interrupt priority register 6"]
138    #[inline(always)]
139    pub const fn ipr6(&self) -> &'static crate::common::Reg<self::Ipr6_SPEC, crate::common::RW> {
140        unsafe {
141            crate::common::Reg::<self::Ipr6_SPEC, crate::common::RW>::from_ptr(
142                self._svd2pac_as_ptr().add(792usize),
143            )
144        }
145    }
146
147    #[doc = "Interrupt priority register 7"]
148    #[inline(always)]
149    pub const fn ipr7(&self) -> &'static crate::common::Reg<self::Ipr7_SPEC, crate::common::RW> {
150        unsafe {
151            crate::common::Reg::<self::Ipr7_SPEC, crate::common::RW>::from_ptr(
152                self._svd2pac_as_ptr().add(796usize),
153            )
154        }
155    }
156}
157#[doc(hidden)]
158#[derive(Copy, Clone, Eq, PartialEq)]
159pub struct Iser_SPEC;
160impl crate::sealed::RegSpec for Iser_SPEC {
161    type DataType = u32;
162}
163
164#[doc = "Interrupt set-enable register"]
165pub type Iser = crate::RegValueT<Iser_SPEC>;
166
167impl Iser {
168    #[doc = "BLE_WAKEUP_LP_IRQn (Interrupt set-enable bit)"]
169    #[inline(always)]
170    pub fn ble_wakeup_lp_irqn(
171        self,
172    ) -> crate::common::RegisterFieldBool<0, 1, 0, Iser_SPEC, crate::common::RW> {
173        crate::common::RegisterFieldBool::<0, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
174            self, 0,
175        )
176    }
177
178    #[doc = "BLE_GEN_IRQn (Interrupt set-enable bit)"]
179    #[inline(always)]
180    pub fn ble_gen_irqn(
181        self,
182    ) -> crate::common::RegisterFieldBool<1, 1, 0, Iser_SPEC, crate::common::RW> {
183        crate::common::RegisterFieldBool::<1, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
184            self, 0,
185        )
186    }
187
188    #[doc = "FTDF_WAKEUP_IRQn (Interrupt set-enable bit)"]
189    #[inline(always)]
190    pub fn ftdf_wakeup_irqn(
191        self,
192    ) -> crate::common::RegisterFieldBool<2, 1, 0, Iser_SPEC, crate::common::RW> {
193        crate::common::RegisterFieldBool::<2, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
194            self, 0,
195        )
196    }
197
198    #[doc = "FTDF_GEN_IRQn (Interrupt set-enable bit)"]
199    #[inline(always)]
200    pub fn ftdf_gen_irqn(
201        self,
202    ) -> crate::common::RegisterFieldBool<3, 1, 0, Iser_SPEC, crate::common::RW> {
203        crate::common::RegisterFieldBool::<3, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
204            self, 0,
205        )
206    }
207
208    #[doc = "RFCAL_IRQn (Interrupt set-enable bit)"]
209    #[inline(always)]
210    pub fn rfcal_irqn(
211        self,
212    ) -> crate::common::RegisterFieldBool<4, 1, 0, Iser_SPEC, crate::common::RW> {
213        crate::common::RegisterFieldBool::<4, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
214            self, 0,
215        )
216    }
217
218    #[doc = "COEX_IRQn (Interrupt set-enable bit)"]
219    #[inline(always)]
220    pub fn coex_irqn(
221        self,
222    ) -> crate::common::RegisterFieldBool<5, 1, 0, Iser_SPEC, crate::common::RW> {
223        crate::common::RegisterFieldBool::<5, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
224            self, 0,
225        )
226    }
227
228    #[doc = "CRYPTO_IRQn (Interrupt set-enable bit)"]
229    #[inline(always)]
230    pub fn crypto_irqn(
231        self,
232    ) -> crate::common::RegisterFieldBool<6, 1, 0, Iser_SPEC, crate::common::RW> {
233        crate::common::RegisterFieldBool::<6, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
234            self, 0,
235        )
236    }
237
238    #[doc = "MRM_IRQn (Interrupt set-enable bit)"]
239    #[inline(always)]
240    pub fn mrm_irqn(
241        self,
242    ) -> crate::common::RegisterFieldBool<7, 1, 0, Iser_SPEC, crate::common::RW> {
243        crate::common::RegisterFieldBool::<7, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
244            self, 0,
245        )
246    }
247
248    #[doc = "UART_IRQn (Interrupt set-enable bit)"]
249    #[inline(always)]
250    pub fn uart_irqn(
251        self,
252    ) -> crate::common::RegisterFieldBool<8, 1, 0, Iser_SPEC, crate::common::RW> {
253        crate::common::RegisterFieldBool::<8, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
254            self, 0,
255        )
256    }
257
258    #[doc = "UART2_IRQn (Interrupt set-enable bit)"]
259    #[inline(always)]
260    pub fn uart2_irqn(
261        self,
262    ) -> crate::common::RegisterFieldBool<9, 1, 0, Iser_SPEC, crate::common::RW> {
263        crate::common::RegisterFieldBool::<9, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
264            self, 0,
265        )
266    }
267
268    #[doc = "I2C_IRQn (Interrupt set-enable bit)"]
269    #[inline(always)]
270    pub fn i2c_irqn(
271        self,
272    ) -> crate::common::RegisterFieldBool<10, 1, 0, Iser_SPEC, crate::common::RW> {
273        crate::common::RegisterFieldBool::<10, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
274            self, 0,
275        )
276    }
277
278    #[doc = "I2C2_IRQn (Interrupt set-enable bit)"]
279    #[inline(always)]
280    pub fn i2c2_irqn(
281        self,
282    ) -> crate::common::RegisterFieldBool<11, 1, 0, Iser_SPEC, crate::common::RW> {
283        crate::common::RegisterFieldBool::<11, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
284            self, 0,
285        )
286    }
287
288    #[doc = "SPI_IRQn (Interrupt set-enable bit)"]
289    #[inline(always)]
290    pub fn spi_irqn(
291        self,
292    ) -> crate::common::RegisterFieldBool<12, 1, 0, Iser_SPEC, crate::common::RW> {
293        crate::common::RegisterFieldBool::<12, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
294            self, 0,
295        )
296    }
297
298    #[doc = "SPI2_IRQn (Interrupt set-enable bit)"]
299    #[inline(always)]
300    pub fn spi2_irqn(
301        self,
302    ) -> crate::common::RegisterFieldBool<13, 1, 0, Iser_SPEC, crate::common::RW> {
303        crate::common::RegisterFieldBool::<13, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
304            self, 0,
305        )
306    }
307
308    #[doc = "ADC_IRQn (Interrupt set-enable bit)"]
309    #[inline(always)]
310    pub fn adc_irqn(
311        self,
312    ) -> crate::common::RegisterFieldBool<14, 1, 0, Iser_SPEC, crate::common::RW> {
313        crate::common::RegisterFieldBool::<14, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
314            self, 0,
315        )
316    }
317
318    #[doc = "KEYBRD_IRQn (Interrupt set-enable bit)"]
319    #[inline(always)]
320    pub fn keybrd_irqn(
321        self,
322    ) -> crate::common::RegisterFieldBool<15, 1, 0, Iser_SPEC, crate::common::RW> {
323        crate::common::RegisterFieldBool::<15, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
324            self, 0,
325        )
326    }
327
328    #[doc = "IRGEN_IRQn (Interrupt set-enable bit)"]
329    #[inline(always)]
330    pub fn irgen_irqn(
331        self,
332    ) -> crate::common::RegisterFieldBool<16, 1, 0, Iser_SPEC, crate::common::RW> {
333        crate::common::RegisterFieldBool::<16, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
334            self, 0,
335        )
336    }
337
338    #[doc = "WKUP_GPIO_IRQn (Interrupt set-enable bit)"]
339    #[inline(always)]
340    pub fn wkup_gpio_irqn(
341        self,
342    ) -> crate::common::RegisterFieldBool<17, 1, 0, Iser_SPEC, crate::common::RW> {
343        crate::common::RegisterFieldBool::<17, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
344            self, 0,
345        )
346    }
347
348    #[doc = "SWTIM0_IRQn (Interrupt set-enable bit)"]
349    #[inline(always)]
350    pub fn swtim0_irqn(
351        self,
352    ) -> crate::common::RegisterFieldBool<18, 1, 0, Iser_SPEC, crate::common::RW> {
353        crate::common::RegisterFieldBool::<18, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
354            self, 0,
355        )
356    }
357
358    #[doc = "SWTIM1_IRQn (Interrupt set-enable bit)"]
359    #[inline(always)]
360    pub fn swtim1_irqn(
361        self,
362    ) -> crate::common::RegisterFieldBool<19, 1, 0, Iser_SPEC, crate::common::RW> {
363        crate::common::RegisterFieldBool::<19, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
364            self, 0,
365        )
366    }
367
368    #[doc = "QUADEC_IRQn (Interrupt set-enable bit)"]
369    #[inline(always)]
370    pub fn quadec_irqn(
371        self,
372    ) -> crate::common::RegisterFieldBool<20, 1, 0, Iser_SPEC, crate::common::RW> {
373        crate::common::RegisterFieldBool::<20, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
374            self, 0,
375        )
376    }
377
378    #[doc = "USB_IRQn (Interrupt set-enable bit)"]
379    #[inline(always)]
380    pub fn usb_irqn(
381        self,
382    ) -> crate::common::RegisterFieldBool<21, 1, 0, Iser_SPEC, crate::common::RW> {
383        crate::common::RegisterFieldBool::<21, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
384            self, 0,
385        )
386    }
387
388    #[doc = "PCM_IRQn (Interrupt set-enable bit)"]
389    #[inline(always)]
390    pub fn pcm_irqn(
391        self,
392    ) -> crate::common::RegisterFieldBool<22, 1, 0, Iser_SPEC, crate::common::RW> {
393        crate::common::RegisterFieldBool::<22, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
394            self, 0,
395        )
396    }
397
398    #[doc = "SRC_IN_IRQn (Interrupt set-enable bit)"]
399    #[inline(always)]
400    pub fn src_in_irqn(
401        self,
402    ) -> crate::common::RegisterFieldBool<23, 1, 0, Iser_SPEC, crate::common::RW> {
403        crate::common::RegisterFieldBool::<23, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
404            self, 0,
405        )
406    }
407
408    #[doc = "SRC_OUT_IRQn (Interrupt set-enable bit)"]
409    #[inline(always)]
410    pub fn src_out_irqn(
411        self,
412    ) -> crate::common::RegisterFieldBool<24, 1, 0, Iser_SPEC, crate::common::RW> {
413        crate::common::RegisterFieldBool::<24, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
414            self, 0,
415        )
416    }
417
418    #[doc = "VBUS_IRQn (Interrupt set-enable bit)"]
419    #[inline(always)]
420    pub fn vbus_irqn(
421        self,
422    ) -> crate::common::RegisterFieldBool<25, 1, 0, Iser_SPEC, crate::common::RW> {
423        crate::common::RegisterFieldBool::<25, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
424            self, 0,
425        )
426    }
427
428    #[doc = "DMA_IRQn (Interrupt set-enable bit)"]
429    #[inline(always)]
430    pub fn dma_irqn(
431        self,
432    ) -> crate::common::RegisterFieldBool<26, 1, 0, Iser_SPEC, crate::common::RW> {
433        crate::common::RegisterFieldBool::<26, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
434            self, 0,
435        )
436    }
437
438    #[doc = "RF_DIAG_IRQn (Interrupt set-enable bit)"]
439    #[inline(always)]
440    pub fn rf_diag_irqn(
441        self,
442    ) -> crate::common::RegisterFieldBool<27, 1, 0, Iser_SPEC, crate::common::RW> {
443        crate::common::RegisterFieldBool::<27, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
444            self, 0,
445        )
446    }
447
448    #[doc = "TRNG_IRQn (Interrupt set-enable bit)"]
449    #[inline(always)]
450    pub fn trng_irqn(
451        self,
452    ) -> crate::common::RegisterFieldBool<28, 1, 0, Iser_SPEC, crate::common::RW> {
453        crate::common::RegisterFieldBool::<28, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
454            self, 0,
455        )
456    }
457
458    #[doc = "DCDC_IRQn (Interrupt set-enable bit)"]
459    #[inline(always)]
460    pub fn dcdc_irqn(
461        self,
462    ) -> crate::common::RegisterFieldBool<29, 1, 0, Iser_SPEC, crate::common::RW> {
463        crate::common::RegisterFieldBool::<29, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
464            self, 0,
465        )
466    }
467
468    #[doc = "XTAL16RDY_IRQn (Interrupt set-enable bit)"]
469    #[inline(always)]
470    pub fn xtal16rdy_irqn(
471        self,
472    ) -> crate::common::RegisterFieldBool<30, 1, 0, Iser_SPEC, crate::common::RW> {
473        crate::common::RegisterFieldBool::<30, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
474            self, 0,
475        )
476    }
477
478    #[doc = "Rsvd__irq__n (Reserved)"]
479    #[inline(always)]
480    pub fn rsvd__irq__n(
481        self,
482    ) -> crate::common::RegisterFieldBool<31, 1, 0, Iser_SPEC, crate::common::RW> {
483        crate::common::RegisterFieldBool::<31, 1, 0, Iser_SPEC, crate::common::RW>::from_register(
484            self, 0,
485        )
486    }
487}
488impl ::core::default::Default for Iser {
489    #[inline(always)]
490    fn default() -> Iser {
491        <crate::RegValueT<Iser_SPEC> as RegisterValue<_>>::new(0)
492    }
493}
494
495#[doc(hidden)]
496#[derive(Copy, Clone, Eq, PartialEq)]
497pub struct Icer_SPEC;
498impl crate::sealed::RegSpec for Icer_SPEC {
499    type DataType = u32;
500}
501
502#[doc = "Interrupt clear-enable register"]
503pub type Icer = crate::RegValueT<Icer_SPEC>;
504
505impl Icer {
506    #[doc = "BLE_WAKEUP_LP_IRQn (Interrupt clear-enable bit)"]
507    #[inline(always)]
508    pub fn ble_wakeup_lp_irqn(
509        self,
510    ) -> crate::common::RegisterFieldBool<0, 1, 0, Icer_SPEC, crate::common::RW> {
511        crate::common::RegisterFieldBool::<0, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
512            self, 0,
513        )
514    }
515
516    #[doc = "BLE_GEN_IRQn (Interrupt clear-enable bit)"]
517    #[inline(always)]
518    pub fn ble_gen_irqn(
519        self,
520    ) -> crate::common::RegisterFieldBool<1, 1, 0, Icer_SPEC, crate::common::RW> {
521        crate::common::RegisterFieldBool::<1, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
522            self, 0,
523        )
524    }
525
526    #[doc = "FTDF_WAKEUP_IRQn (Interrupt clear-enable bit)"]
527    #[inline(always)]
528    pub fn ftdf_wakeup_irqn(
529        self,
530    ) -> crate::common::RegisterFieldBool<2, 1, 0, Icer_SPEC, crate::common::RW> {
531        crate::common::RegisterFieldBool::<2, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
532            self, 0,
533        )
534    }
535
536    #[doc = "FTDF_GEN_IRQn (Interrupt clear-enable bit)"]
537    #[inline(always)]
538    pub fn ftdf_gen_irqn(
539        self,
540    ) -> crate::common::RegisterFieldBool<3, 1, 0, Icer_SPEC, crate::common::RW> {
541        crate::common::RegisterFieldBool::<3, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
542            self, 0,
543        )
544    }
545
546    #[doc = "RFCAL_IRQn (Interrupt clear-enable bit)"]
547    #[inline(always)]
548    pub fn rfcal_irqn(
549        self,
550    ) -> crate::common::RegisterFieldBool<4, 1, 0, Icer_SPEC, crate::common::RW> {
551        crate::common::RegisterFieldBool::<4, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
552            self, 0,
553        )
554    }
555
556    #[doc = "COEX_IRQn (Interrupt clear-enable bit)"]
557    #[inline(always)]
558    pub fn coex_irqn(
559        self,
560    ) -> crate::common::RegisterFieldBool<5, 1, 0, Icer_SPEC, crate::common::RW> {
561        crate::common::RegisterFieldBool::<5, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
562            self, 0,
563        )
564    }
565
566    #[doc = "CRYPTO_IRQn (Interrupt clear-enable bit)"]
567    #[inline(always)]
568    pub fn crypto_irqn(
569        self,
570    ) -> crate::common::RegisterFieldBool<6, 1, 0, Icer_SPEC, crate::common::RW> {
571        crate::common::RegisterFieldBool::<6, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
572            self, 0,
573        )
574    }
575
576    #[doc = "MRM_IRQn (Interrupt clear-enable bit)"]
577    #[inline(always)]
578    pub fn mrm_irqn(
579        self,
580    ) -> crate::common::RegisterFieldBool<7, 1, 0, Icer_SPEC, crate::common::RW> {
581        crate::common::RegisterFieldBool::<7, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
582            self, 0,
583        )
584    }
585
586    #[doc = "UART_IRQn (Interrupt clear-enable bit)"]
587    #[inline(always)]
588    pub fn uart_irqn(
589        self,
590    ) -> crate::common::RegisterFieldBool<8, 1, 0, Icer_SPEC, crate::common::RW> {
591        crate::common::RegisterFieldBool::<8, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
592            self, 0,
593        )
594    }
595
596    #[doc = "UART2_IRQn (Interrupt clear-enable bit)"]
597    #[inline(always)]
598    pub fn uart2_irqn(
599        self,
600    ) -> crate::common::RegisterFieldBool<9, 1, 0, Icer_SPEC, crate::common::RW> {
601        crate::common::RegisterFieldBool::<9, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
602            self, 0,
603        )
604    }
605
606    #[doc = "I2C_IRQn (Interrupt clear-enable bit)"]
607    #[inline(always)]
608    pub fn i2c_irqn(
609        self,
610    ) -> crate::common::RegisterFieldBool<10, 1, 0, Icer_SPEC, crate::common::RW> {
611        crate::common::RegisterFieldBool::<10, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
612            self, 0,
613        )
614    }
615
616    #[doc = "I2C2_IRQn (Interrupt clear-enable bit)"]
617    #[inline(always)]
618    pub fn i2c2_irqn(
619        self,
620    ) -> crate::common::RegisterFieldBool<11, 1, 0, Icer_SPEC, crate::common::RW> {
621        crate::common::RegisterFieldBool::<11, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
622            self, 0,
623        )
624    }
625
626    #[doc = "SPI_IRQn (Interrupt clear-enable bit)"]
627    #[inline(always)]
628    pub fn spi_irqn(
629        self,
630    ) -> crate::common::RegisterFieldBool<12, 1, 0, Icer_SPEC, crate::common::RW> {
631        crate::common::RegisterFieldBool::<12, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
632            self, 0,
633        )
634    }
635
636    #[doc = "SPI2_IRQn (Interrupt clear-enable bit)"]
637    #[inline(always)]
638    pub fn spi2_irqn(
639        self,
640    ) -> crate::common::RegisterFieldBool<13, 1, 0, Icer_SPEC, crate::common::RW> {
641        crate::common::RegisterFieldBool::<13, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
642            self, 0,
643        )
644    }
645
646    #[doc = "ADC_IRQn (Interrupt clear-enable bit)"]
647    #[inline(always)]
648    pub fn adc_irqn(
649        self,
650    ) -> crate::common::RegisterFieldBool<14, 1, 0, Icer_SPEC, crate::common::RW> {
651        crate::common::RegisterFieldBool::<14, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
652            self, 0,
653        )
654    }
655
656    #[doc = "KEYBRD_IRQn (Interrupt clear-enable bit)"]
657    #[inline(always)]
658    pub fn keybrd_irqn(
659        self,
660    ) -> crate::common::RegisterFieldBool<15, 1, 0, Icer_SPEC, crate::common::RW> {
661        crate::common::RegisterFieldBool::<15, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
662            self, 0,
663        )
664    }
665
666    #[doc = "IRGEN_IRQn (Interrupt clear-enable bit)"]
667    #[inline(always)]
668    pub fn irgen_irqn(
669        self,
670    ) -> crate::common::RegisterFieldBool<16, 1, 0, Icer_SPEC, crate::common::RW> {
671        crate::common::RegisterFieldBool::<16, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
672            self, 0,
673        )
674    }
675
676    #[doc = "WKUP_GPIO_IRQn (Interrupt clear-enable bit)"]
677    #[inline(always)]
678    pub fn wkup_gpio_irqn(
679        self,
680    ) -> crate::common::RegisterFieldBool<17, 1, 0, Icer_SPEC, crate::common::RW> {
681        crate::common::RegisterFieldBool::<17, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
682            self, 0,
683        )
684    }
685
686    #[doc = "SWTIM0_IRQn (Interrupt clear-enable bit)"]
687    #[inline(always)]
688    pub fn swtim0_irqn(
689        self,
690    ) -> crate::common::RegisterFieldBool<18, 1, 0, Icer_SPEC, crate::common::RW> {
691        crate::common::RegisterFieldBool::<18, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
692            self, 0,
693        )
694    }
695
696    #[doc = "SWTIM1_IRQn (Interrupt clear-enable bit)"]
697    #[inline(always)]
698    pub fn swtim1_irqn(
699        self,
700    ) -> crate::common::RegisterFieldBool<19, 1, 0, Icer_SPEC, crate::common::RW> {
701        crate::common::RegisterFieldBool::<19, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
702            self, 0,
703        )
704    }
705
706    #[doc = "QUADEC_IRQn (Interrupt clear-enable bit)"]
707    #[inline(always)]
708    pub fn quadec_irqn(
709        self,
710    ) -> crate::common::RegisterFieldBool<20, 1, 0, Icer_SPEC, crate::common::RW> {
711        crate::common::RegisterFieldBool::<20, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
712            self, 0,
713        )
714    }
715
716    #[doc = "USB_IRQn (Interrupt clear-enable bit)"]
717    #[inline(always)]
718    pub fn usb_irqn(
719        self,
720    ) -> crate::common::RegisterFieldBool<21, 1, 0, Icer_SPEC, crate::common::RW> {
721        crate::common::RegisterFieldBool::<21, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
722            self, 0,
723        )
724    }
725
726    #[doc = "PCM_IRQn (Interrupt clear-enable bit)"]
727    #[inline(always)]
728    pub fn pcm_irqn(
729        self,
730    ) -> crate::common::RegisterFieldBool<22, 1, 0, Icer_SPEC, crate::common::RW> {
731        crate::common::RegisterFieldBool::<22, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
732            self, 0,
733        )
734    }
735
736    #[doc = "SRC_IN_IRQn (Interrupt clear-enable bit)"]
737    #[inline(always)]
738    pub fn src_in_irqn(
739        self,
740    ) -> crate::common::RegisterFieldBool<23, 1, 0, Icer_SPEC, crate::common::RW> {
741        crate::common::RegisterFieldBool::<23, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
742            self, 0,
743        )
744    }
745
746    #[doc = "SRC_OUT_IRQn (Interrupt clear-enable bit)"]
747    #[inline(always)]
748    pub fn src_out_irqn(
749        self,
750    ) -> crate::common::RegisterFieldBool<24, 1, 0, Icer_SPEC, crate::common::RW> {
751        crate::common::RegisterFieldBool::<24, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
752            self, 0,
753        )
754    }
755
756    #[doc = "VBUS_IRQn (Interrupt clear-enable bit)"]
757    #[inline(always)]
758    pub fn vbus_irqn(
759        self,
760    ) -> crate::common::RegisterFieldBool<25, 1, 0, Icer_SPEC, crate::common::RW> {
761        crate::common::RegisterFieldBool::<25, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
762            self, 0,
763        )
764    }
765
766    #[doc = "DMA_IRQn (Interrupt clear-enable bit)"]
767    #[inline(always)]
768    pub fn dma_irqn(
769        self,
770    ) -> crate::common::RegisterFieldBool<26, 1, 0, Icer_SPEC, crate::common::RW> {
771        crate::common::RegisterFieldBool::<26, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
772            self, 0,
773        )
774    }
775
776    #[doc = "RF_DIAG_IRQn (Interrupt clear-enable bit)"]
777    #[inline(always)]
778    pub fn rf_diag_irqn(
779        self,
780    ) -> crate::common::RegisterFieldBool<27, 1, 0, Icer_SPEC, crate::common::RW> {
781        crate::common::RegisterFieldBool::<27, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
782            self, 0,
783        )
784    }
785
786    #[doc = "TRNG_IRQn (Interrupt clear-enable bit)"]
787    #[inline(always)]
788    pub fn trng_irqn(
789        self,
790    ) -> crate::common::RegisterFieldBool<28, 1, 0, Icer_SPEC, crate::common::RW> {
791        crate::common::RegisterFieldBool::<28, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
792            self, 0,
793        )
794    }
795
796    #[doc = "DCDC_IRQn (Interrupt clear-enable bit)"]
797    #[inline(always)]
798    pub fn dcdc_irqn(
799        self,
800    ) -> crate::common::RegisterFieldBool<29, 1, 0, Icer_SPEC, crate::common::RW> {
801        crate::common::RegisterFieldBool::<29, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
802            self, 0,
803        )
804    }
805
806    #[doc = "XTAL16RDY_IRQn (Interrupt clear-enable bit)"]
807    #[inline(always)]
808    pub fn xtal16rdy_irqn(
809        self,
810    ) -> crate::common::RegisterFieldBool<30, 1, 0, Icer_SPEC, crate::common::RW> {
811        crate::common::RegisterFieldBool::<30, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
812            self, 0,
813        )
814    }
815
816    #[doc = "Rsvd__irq__n (Reserved)"]
817    #[inline(always)]
818    pub fn rsvd__irq__n(
819        self,
820    ) -> crate::common::RegisterFieldBool<31, 1, 0, Icer_SPEC, crate::common::RW> {
821        crate::common::RegisterFieldBool::<31, 1, 0, Icer_SPEC, crate::common::RW>::from_register(
822            self, 0,
823        )
824    }
825}
826impl ::core::default::Default for Icer {
827    #[inline(always)]
828    fn default() -> Icer {
829        <crate::RegValueT<Icer_SPEC> as RegisterValue<_>>::new(0)
830    }
831}
832
833#[doc(hidden)]
834#[derive(Copy, Clone, Eq, PartialEq)]
835pub struct Ispr_SPEC;
836impl crate::sealed::RegSpec for Ispr_SPEC {
837    type DataType = u32;
838}
839
840#[doc = "Interrupt set-pending register"]
841pub type Ispr = crate::RegValueT<Ispr_SPEC>;
842
843impl Ispr {
844    #[doc = "BLE_WAKEUP_LP_IRQn (Interrupt set-pending bit)"]
845    #[inline(always)]
846    pub fn ble_wakeup_lp_irqn(
847        self,
848    ) -> crate::common::RegisterFieldBool<0, 1, 0, Ispr_SPEC, crate::common::RW> {
849        crate::common::RegisterFieldBool::<0, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
850            self, 0,
851        )
852    }
853
854    #[doc = "BLE_GEN_IRQn (Interrupt set-pending bit)"]
855    #[inline(always)]
856    pub fn ble_gen_irqn(
857        self,
858    ) -> crate::common::RegisterFieldBool<1, 1, 0, Ispr_SPEC, crate::common::RW> {
859        crate::common::RegisterFieldBool::<1, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
860            self, 0,
861        )
862    }
863
864    #[doc = "FTDF_WAKEUP_IRQn (Interrupt set-pending bit)"]
865    #[inline(always)]
866    pub fn ftdf_wakeup_irqn(
867        self,
868    ) -> crate::common::RegisterFieldBool<2, 1, 0, Ispr_SPEC, crate::common::RW> {
869        crate::common::RegisterFieldBool::<2, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
870            self, 0,
871        )
872    }
873
874    #[doc = "FTDF_GEN_IRQn (Interrupt set-pending bit)"]
875    #[inline(always)]
876    pub fn ftdf_gen_irqn(
877        self,
878    ) -> crate::common::RegisterFieldBool<3, 1, 0, Ispr_SPEC, crate::common::RW> {
879        crate::common::RegisterFieldBool::<3, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
880            self, 0,
881        )
882    }
883
884    #[doc = "RFCAL_IRQn (Interrupt set-pending bit)"]
885    #[inline(always)]
886    pub fn rfcal_irqn(
887        self,
888    ) -> crate::common::RegisterFieldBool<4, 1, 0, Ispr_SPEC, crate::common::RW> {
889        crate::common::RegisterFieldBool::<4, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
890            self, 0,
891        )
892    }
893
894    #[doc = "COEX_IRQn (Interrupt set-pending bit)"]
895    #[inline(always)]
896    pub fn coex_irqn(
897        self,
898    ) -> crate::common::RegisterFieldBool<5, 1, 0, Ispr_SPEC, crate::common::RW> {
899        crate::common::RegisterFieldBool::<5, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
900            self, 0,
901        )
902    }
903
904    #[doc = "CRYPTO_IRQn (Interrupt set-pending bit)"]
905    #[inline(always)]
906    pub fn crypto_irqn(
907        self,
908    ) -> crate::common::RegisterFieldBool<6, 1, 0, Ispr_SPEC, crate::common::RW> {
909        crate::common::RegisterFieldBool::<6, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
910            self, 0,
911        )
912    }
913
914    #[doc = "MRM_IRQn (Interrupt set-pending bit)"]
915    #[inline(always)]
916    pub fn mrm_irqn(
917        self,
918    ) -> crate::common::RegisterFieldBool<7, 1, 0, Ispr_SPEC, crate::common::RW> {
919        crate::common::RegisterFieldBool::<7, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
920            self, 0,
921        )
922    }
923
924    #[doc = "UART_IRQn (Interrupt set-pending bit)"]
925    #[inline(always)]
926    pub fn uart_irqn(
927        self,
928    ) -> crate::common::RegisterFieldBool<8, 1, 0, Ispr_SPEC, crate::common::RW> {
929        crate::common::RegisterFieldBool::<8, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
930            self, 0,
931        )
932    }
933
934    #[doc = "UART2_IRQn (Interrupt set-pending bit)"]
935    #[inline(always)]
936    pub fn uart2_irqn(
937        self,
938    ) -> crate::common::RegisterFieldBool<9, 1, 0, Ispr_SPEC, crate::common::RW> {
939        crate::common::RegisterFieldBool::<9, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
940            self, 0,
941        )
942    }
943
944    #[doc = "I2C_IRQn (Interrupt set-pending bit)"]
945    #[inline(always)]
946    pub fn i2c_irqn(
947        self,
948    ) -> crate::common::RegisterFieldBool<10, 1, 0, Ispr_SPEC, crate::common::RW> {
949        crate::common::RegisterFieldBool::<10, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
950            self, 0,
951        )
952    }
953
954    #[doc = "I2C2_IRQn (Interrupt set-pending bit)"]
955    #[inline(always)]
956    pub fn i2c2_irqn(
957        self,
958    ) -> crate::common::RegisterFieldBool<11, 1, 0, Ispr_SPEC, crate::common::RW> {
959        crate::common::RegisterFieldBool::<11, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
960            self, 0,
961        )
962    }
963
964    #[doc = "SPI_IRQn (Interrupt set-pending bit)"]
965    #[inline(always)]
966    pub fn spi_irqn(
967        self,
968    ) -> crate::common::RegisterFieldBool<12, 1, 0, Ispr_SPEC, crate::common::RW> {
969        crate::common::RegisterFieldBool::<12, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
970            self, 0,
971        )
972    }
973
974    #[doc = "SPI2_IRQn (Interrupt set-pending bit)"]
975    #[inline(always)]
976    pub fn spi2_irqn(
977        self,
978    ) -> crate::common::RegisterFieldBool<13, 1, 0, Ispr_SPEC, crate::common::RW> {
979        crate::common::RegisterFieldBool::<13, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
980            self, 0,
981        )
982    }
983
984    #[doc = "ADC_IRQn (Interrupt set-pending bit)"]
985    #[inline(always)]
986    pub fn adc_irqn(
987        self,
988    ) -> crate::common::RegisterFieldBool<14, 1, 0, Ispr_SPEC, crate::common::RW> {
989        crate::common::RegisterFieldBool::<14, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
990            self, 0,
991        )
992    }
993
994    #[doc = "KEYBRD_IRQn (Interrupt set-pending bit)"]
995    #[inline(always)]
996    pub fn keybrd_irqn(
997        self,
998    ) -> crate::common::RegisterFieldBool<15, 1, 0, Ispr_SPEC, crate::common::RW> {
999        crate::common::RegisterFieldBool::<15, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1000            self, 0,
1001        )
1002    }
1003
1004    #[doc = "IRGEN_IRQn (Interrupt set-pending bit)"]
1005    #[inline(always)]
1006    pub fn irgen_irqn(
1007        self,
1008    ) -> crate::common::RegisterFieldBool<16, 1, 0, Ispr_SPEC, crate::common::RW> {
1009        crate::common::RegisterFieldBool::<16, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1010            self, 0,
1011        )
1012    }
1013
1014    #[doc = "WKUP_GPIO_IRQn (Interrupt set-pending bit)"]
1015    #[inline(always)]
1016    pub fn wkup_gpio_irqn(
1017        self,
1018    ) -> crate::common::RegisterFieldBool<17, 1, 0, Ispr_SPEC, crate::common::RW> {
1019        crate::common::RegisterFieldBool::<17, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1020            self, 0,
1021        )
1022    }
1023
1024    #[doc = "SWTIM0_IRQn (Interrupt set-pending bit)"]
1025    #[inline(always)]
1026    pub fn swtim0_irqn(
1027        self,
1028    ) -> crate::common::RegisterFieldBool<18, 1, 0, Ispr_SPEC, crate::common::RW> {
1029        crate::common::RegisterFieldBool::<18, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1030            self, 0,
1031        )
1032    }
1033
1034    #[doc = "SWTIM1_IRQn (Interrupt set-pending bit)"]
1035    #[inline(always)]
1036    pub fn swtim1_irqn(
1037        self,
1038    ) -> crate::common::RegisterFieldBool<19, 1, 0, Ispr_SPEC, crate::common::RW> {
1039        crate::common::RegisterFieldBool::<19, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1040            self, 0,
1041        )
1042    }
1043
1044    #[doc = "QUADEC_IRQn (Interrupt set-pending bit)"]
1045    #[inline(always)]
1046    pub fn quadec_irqn(
1047        self,
1048    ) -> crate::common::RegisterFieldBool<20, 1, 0, Ispr_SPEC, crate::common::RW> {
1049        crate::common::RegisterFieldBool::<20, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1050            self, 0,
1051        )
1052    }
1053
1054    #[doc = "USB_IRQn (Interrupt set-pending bit)"]
1055    #[inline(always)]
1056    pub fn usb_irqn(
1057        self,
1058    ) -> crate::common::RegisterFieldBool<21, 1, 0, Ispr_SPEC, crate::common::RW> {
1059        crate::common::RegisterFieldBool::<21, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1060            self, 0,
1061        )
1062    }
1063
1064    #[doc = "PCM_IRQn (Interrupt set-pending bit)"]
1065    #[inline(always)]
1066    pub fn pcm_irqn(
1067        self,
1068    ) -> crate::common::RegisterFieldBool<22, 1, 0, Ispr_SPEC, crate::common::RW> {
1069        crate::common::RegisterFieldBool::<22, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1070            self, 0,
1071        )
1072    }
1073
1074    #[doc = "SRC_IN_IRQn (Interrupt set-pending bit)"]
1075    #[inline(always)]
1076    pub fn src_in_irqn(
1077        self,
1078    ) -> crate::common::RegisterFieldBool<23, 1, 0, Ispr_SPEC, crate::common::RW> {
1079        crate::common::RegisterFieldBool::<23, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1080            self, 0,
1081        )
1082    }
1083
1084    #[doc = "SRC_OUT_IRQn (Interrupt set-pending bit)"]
1085    #[inline(always)]
1086    pub fn src_out_irqn(
1087        self,
1088    ) -> crate::common::RegisterFieldBool<24, 1, 0, Ispr_SPEC, crate::common::RW> {
1089        crate::common::RegisterFieldBool::<24, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1090            self, 0,
1091        )
1092    }
1093
1094    #[doc = "VBUS_IRQn (Interrupt set-pending bit)"]
1095    #[inline(always)]
1096    pub fn vbus_irqn(
1097        self,
1098    ) -> crate::common::RegisterFieldBool<25, 1, 0, Ispr_SPEC, crate::common::RW> {
1099        crate::common::RegisterFieldBool::<25, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1100            self, 0,
1101        )
1102    }
1103
1104    #[doc = "DMA_IRQn (Interrupt set-pending bit)"]
1105    #[inline(always)]
1106    pub fn dma_irqn(
1107        self,
1108    ) -> crate::common::RegisterFieldBool<26, 1, 0, Ispr_SPEC, crate::common::RW> {
1109        crate::common::RegisterFieldBool::<26, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1110            self, 0,
1111        )
1112    }
1113
1114    #[doc = "RF_DIAG_IRQn (Interrupt set-pending bit)"]
1115    #[inline(always)]
1116    pub fn rf_diag_irqn(
1117        self,
1118    ) -> crate::common::RegisterFieldBool<27, 1, 0, Ispr_SPEC, crate::common::RW> {
1119        crate::common::RegisterFieldBool::<27, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1120            self, 0,
1121        )
1122    }
1123
1124    #[doc = "TRNG_IRQn (Interrupt set-pending bit)"]
1125    #[inline(always)]
1126    pub fn trng_irqn(
1127        self,
1128    ) -> crate::common::RegisterFieldBool<28, 1, 0, Ispr_SPEC, crate::common::RW> {
1129        crate::common::RegisterFieldBool::<28, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1130            self, 0,
1131        )
1132    }
1133
1134    #[doc = "DCDC_IRQn (Interrupt set-pending bit)"]
1135    #[inline(always)]
1136    pub fn dcdc_irqn(
1137        self,
1138    ) -> crate::common::RegisterFieldBool<29, 1, 0, Ispr_SPEC, crate::common::RW> {
1139        crate::common::RegisterFieldBool::<29, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1140            self, 0,
1141        )
1142    }
1143
1144    #[doc = "XTAL16RDY_IRQn (Interrupt set-pending bit)"]
1145    #[inline(always)]
1146    pub fn xtal16rdy_irqn(
1147        self,
1148    ) -> crate::common::RegisterFieldBool<30, 1, 0, Ispr_SPEC, crate::common::RW> {
1149        crate::common::RegisterFieldBool::<30, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1150            self, 0,
1151        )
1152    }
1153
1154    #[doc = "Rsvd__irq__n (Reserved)"]
1155    #[inline(always)]
1156    pub fn rsvd__irq__n(
1157        self,
1158    ) -> crate::common::RegisterFieldBool<31, 1, 0, Ispr_SPEC, crate::common::RW> {
1159        crate::common::RegisterFieldBool::<31, 1, 0, Ispr_SPEC, crate::common::RW>::from_register(
1160            self, 0,
1161        )
1162    }
1163}
1164impl ::core::default::Default for Ispr {
1165    #[inline(always)]
1166    fn default() -> Ispr {
1167        <crate::RegValueT<Ispr_SPEC> as RegisterValue<_>>::new(0)
1168    }
1169}
1170
1171#[doc(hidden)]
1172#[derive(Copy, Clone, Eq, PartialEq)]
1173pub struct Icpr_SPEC;
1174impl crate::sealed::RegSpec for Icpr_SPEC {
1175    type DataType = u32;
1176}
1177
1178#[doc = "Interrupt clear-pending register"]
1179pub type Icpr = crate::RegValueT<Icpr_SPEC>;
1180
1181impl Icpr {
1182    #[doc = "BLE_WAKEUP_LP_IRQn (Interrupt clear-pending bit)"]
1183    #[inline(always)]
1184    pub fn ble_wakeup_lp_irqn(
1185        self,
1186    ) -> crate::common::RegisterFieldBool<0, 1, 0, Icpr_SPEC, crate::common::RW> {
1187        crate::common::RegisterFieldBool::<0, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1188            self, 0,
1189        )
1190    }
1191
1192    #[doc = "BLE_GEN_IRQn (Interrupt clear-pending bit)"]
1193    #[inline(always)]
1194    pub fn ble_gen_irqn(
1195        self,
1196    ) -> crate::common::RegisterFieldBool<1, 1, 0, Icpr_SPEC, crate::common::RW> {
1197        crate::common::RegisterFieldBool::<1, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1198            self, 0,
1199        )
1200    }
1201
1202    #[doc = "FTDF_WAKEUP_IRQn (Interrupt clear-pending bit)"]
1203    #[inline(always)]
1204    pub fn ftdf_wakeup_irqn(
1205        self,
1206    ) -> crate::common::RegisterFieldBool<2, 1, 0, Icpr_SPEC, crate::common::RW> {
1207        crate::common::RegisterFieldBool::<2, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1208            self, 0,
1209        )
1210    }
1211
1212    #[doc = "FTDF_GEN_IRQn (Interrupt clear-pending bit)"]
1213    #[inline(always)]
1214    pub fn ftdf_gen_irqn(
1215        self,
1216    ) -> crate::common::RegisterFieldBool<3, 1, 0, Icpr_SPEC, crate::common::RW> {
1217        crate::common::RegisterFieldBool::<3, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1218            self, 0,
1219        )
1220    }
1221
1222    #[doc = "RFCAL_IRQn (Interrupt clear-pending bit)"]
1223    #[inline(always)]
1224    pub fn rfcal_irqn(
1225        self,
1226    ) -> crate::common::RegisterFieldBool<4, 1, 0, Icpr_SPEC, crate::common::RW> {
1227        crate::common::RegisterFieldBool::<4, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1228            self, 0,
1229        )
1230    }
1231
1232    #[doc = "COEX_IRQn (Interrupt clear-pending bit)"]
1233    #[inline(always)]
1234    pub fn coex_irqn(
1235        self,
1236    ) -> crate::common::RegisterFieldBool<5, 1, 0, Icpr_SPEC, crate::common::RW> {
1237        crate::common::RegisterFieldBool::<5, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1238            self, 0,
1239        )
1240    }
1241
1242    #[doc = "CRYPTO_IRQn (Interrupt clear-pending bit)"]
1243    #[inline(always)]
1244    pub fn crypto_irqn(
1245        self,
1246    ) -> crate::common::RegisterFieldBool<6, 1, 0, Icpr_SPEC, crate::common::RW> {
1247        crate::common::RegisterFieldBool::<6, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1248            self, 0,
1249        )
1250    }
1251
1252    #[doc = "MRM_IRQn (Interrupt clear-pending bit)"]
1253    #[inline(always)]
1254    pub fn mrm_irqn(
1255        self,
1256    ) -> crate::common::RegisterFieldBool<7, 1, 0, Icpr_SPEC, crate::common::RW> {
1257        crate::common::RegisterFieldBool::<7, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1258            self, 0,
1259        )
1260    }
1261
1262    #[doc = "UART_IRQn (Interrupt clear-pending bit)"]
1263    #[inline(always)]
1264    pub fn uart_irqn(
1265        self,
1266    ) -> crate::common::RegisterFieldBool<8, 1, 0, Icpr_SPEC, crate::common::RW> {
1267        crate::common::RegisterFieldBool::<8, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1268            self, 0,
1269        )
1270    }
1271
1272    #[doc = "UART2_IRQn (Interrupt clear-pending bit)"]
1273    #[inline(always)]
1274    pub fn uart2_irqn(
1275        self,
1276    ) -> crate::common::RegisterFieldBool<9, 1, 0, Icpr_SPEC, crate::common::RW> {
1277        crate::common::RegisterFieldBool::<9, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1278            self, 0,
1279        )
1280    }
1281
1282    #[doc = "I2C_IRQn (Interrupt clear-pending bit)"]
1283    #[inline(always)]
1284    pub fn i2c_irqn(
1285        self,
1286    ) -> crate::common::RegisterFieldBool<10, 1, 0, Icpr_SPEC, crate::common::RW> {
1287        crate::common::RegisterFieldBool::<10, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1288            self, 0,
1289        )
1290    }
1291
1292    #[doc = "I2C2_IRQn (Interrupt clear-pending bit)"]
1293    #[inline(always)]
1294    pub fn i2c2_irqn(
1295        self,
1296    ) -> crate::common::RegisterFieldBool<11, 1, 0, Icpr_SPEC, crate::common::RW> {
1297        crate::common::RegisterFieldBool::<11, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1298            self, 0,
1299        )
1300    }
1301
1302    #[doc = "SPI_IRQn (Interrupt clear-pending bit)"]
1303    #[inline(always)]
1304    pub fn spi_irqn(
1305        self,
1306    ) -> crate::common::RegisterFieldBool<12, 1, 0, Icpr_SPEC, crate::common::RW> {
1307        crate::common::RegisterFieldBool::<12, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1308            self, 0,
1309        )
1310    }
1311
1312    #[doc = "SPI2_IRQn (Interrupt clear-pending bit)"]
1313    #[inline(always)]
1314    pub fn spi2_irqn(
1315        self,
1316    ) -> crate::common::RegisterFieldBool<13, 1, 0, Icpr_SPEC, crate::common::RW> {
1317        crate::common::RegisterFieldBool::<13, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1318            self, 0,
1319        )
1320    }
1321
1322    #[doc = "ADC_IRQn (Interrupt clear-pending bit)"]
1323    #[inline(always)]
1324    pub fn adc_irqn(
1325        self,
1326    ) -> crate::common::RegisterFieldBool<14, 1, 0, Icpr_SPEC, crate::common::RW> {
1327        crate::common::RegisterFieldBool::<14, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1328            self, 0,
1329        )
1330    }
1331
1332    #[doc = "KEYBRD_IRQn (Interrupt clear-pending bit)"]
1333    #[inline(always)]
1334    pub fn keybrd_irqn(
1335        self,
1336    ) -> crate::common::RegisterFieldBool<15, 1, 0, Icpr_SPEC, crate::common::RW> {
1337        crate::common::RegisterFieldBool::<15, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1338            self, 0,
1339        )
1340    }
1341
1342    #[doc = "IRGEN_IRQn (Interrupt clear-pending bit)"]
1343    #[inline(always)]
1344    pub fn irgen_irqn(
1345        self,
1346    ) -> crate::common::RegisterFieldBool<16, 1, 0, Icpr_SPEC, crate::common::RW> {
1347        crate::common::RegisterFieldBool::<16, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1348            self, 0,
1349        )
1350    }
1351
1352    #[doc = "WKUP_GPIO_IRQn (Interrupt clear-pending bit)"]
1353    #[inline(always)]
1354    pub fn wkup_gpio_irqn(
1355        self,
1356    ) -> crate::common::RegisterFieldBool<17, 1, 0, Icpr_SPEC, crate::common::RW> {
1357        crate::common::RegisterFieldBool::<17, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1358            self, 0,
1359        )
1360    }
1361
1362    #[doc = "SWTIM0_IRQn (Interrupt clear-pending bit)"]
1363    #[inline(always)]
1364    pub fn swtim0_irqn(
1365        self,
1366    ) -> crate::common::RegisterFieldBool<18, 1, 0, Icpr_SPEC, crate::common::RW> {
1367        crate::common::RegisterFieldBool::<18, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1368            self, 0,
1369        )
1370    }
1371
1372    #[doc = "SWTIM1_IRQn (Interrupt clear-pending bit)"]
1373    #[inline(always)]
1374    pub fn swtim1_irqn(
1375        self,
1376    ) -> crate::common::RegisterFieldBool<19, 1, 0, Icpr_SPEC, crate::common::RW> {
1377        crate::common::RegisterFieldBool::<19, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1378            self, 0,
1379        )
1380    }
1381
1382    #[doc = "QUADEC_IRQn (Interrupt clear-pending bit)"]
1383    #[inline(always)]
1384    pub fn quadec_irqn(
1385        self,
1386    ) -> crate::common::RegisterFieldBool<20, 1, 0, Icpr_SPEC, crate::common::RW> {
1387        crate::common::RegisterFieldBool::<20, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1388            self, 0,
1389        )
1390    }
1391
1392    #[doc = "USB_IRQn (Interrupt clear-pending bit)"]
1393    #[inline(always)]
1394    pub fn usb_irqn(
1395        self,
1396    ) -> crate::common::RegisterFieldBool<21, 1, 0, Icpr_SPEC, crate::common::RW> {
1397        crate::common::RegisterFieldBool::<21, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1398            self, 0,
1399        )
1400    }
1401
1402    #[doc = "PCM_IRQn (Interrupt clear-pending bit)"]
1403    #[inline(always)]
1404    pub fn pcm_irqn(
1405        self,
1406    ) -> crate::common::RegisterFieldBool<22, 1, 0, Icpr_SPEC, crate::common::RW> {
1407        crate::common::RegisterFieldBool::<22, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1408            self, 0,
1409        )
1410    }
1411
1412    #[doc = "SRC_IN_IRQn (Interrupt clear-pending bit)"]
1413    #[inline(always)]
1414    pub fn src_in_irqn(
1415        self,
1416    ) -> crate::common::RegisterFieldBool<23, 1, 0, Icpr_SPEC, crate::common::RW> {
1417        crate::common::RegisterFieldBool::<23, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1418            self, 0,
1419        )
1420    }
1421
1422    #[doc = "SRC_OUT_IRQn (Interrupt clear-pending bit)"]
1423    #[inline(always)]
1424    pub fn src_out_irqn(
1425        self,
1426    ) -> crate::common::RegisterFieldBool<24, 1, 0, Icpr_SPEC, crate::common::RW> {
1427        crate::common::RegisterFieldBool::<24, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1428            self, 0,
1429        )
1430    }
1431
1432    #[doc = "VBUS_IRQn (Interrupt clear-pending bit)"]
1433    #[inline(always)]
1434    pub fn vbus_irqn(
1435        self,
1436    ) -> crate::common::RegisterFieldBool<25, 1, 0, Icpr_SPEC, crate::common::RW> {
1437        crate::common::RegisterFieldBool::<25, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1438            self, 0,
1439        )
1440    }
1441
1442    #[doc = "DMA_IRQn (Interrupt clear-pending bit)"]
1443    #[inline(always)]
1444    pub fn dma_irqn(
1445        self,
1446    ) -> crate::common::RegisterFieldBool<26, 1, 0, Icpr_SPEC, crate::common::RW> {
1447        crate::common::RegisterFieldBool::<26, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1448            self, 0,
1449        )
1450    }
1451
1452    #[doc = "RF_DIAG_IRQn (Interrupt clear-pending bit)"]
1453    #[inline(always)]
1454    pub fn rf_diag_irqn(
1455        self,
1456    ) -> crate::common::RegisterFieldBool<27, 1, 0, Icpr_SPEC, crate::common::RW> {
1457        crate::common::RegisterFieldBool::<27, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1458            self, 0,
1459        )
1460    }
1461
1462    #[doc = "TRNG_IRQn (Interrupt clear-pending bit)"]
1463    #[inline(always)]
1464    pub fn trng_irqn(
1465        self,
1466    ) -> crate::common::RegisterFieldBool<28, 1, 0, Icpr_SPEC, crate::common::RW> {
1467        crate::common::RegisterFieldBool::<28, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1468            self, 0,
1469        )
1470    }
1471
1472    #[doc = "DCDC_IRQn (Interrupt clear-pending bit)"]
1473    #[inline(always)]
1474    pub fn dcdc_irqn(
1475        self,
1476    ) -> crate::common::RegisterFieldBool<29, 1, 0, Icpr_SPEC, crate::common::RW> {
1477        crate::common::RegisterFieldBool::<29, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1478            self, 0,
1479        )
1480    }
1481
1482    #[doc = "XTAL16RDY_IRQn (Interrupt clear-pending bit)"]
1483    #[inline(always)]
1484    pub fn xtal16rdy_irqn(
1485        self,
1486    ) -> crate::common::RegisterFieldBool<30, 1, 0, Icpr_SPEC, crate::common::RW> {
1487        crate::common::RegisterFieldBool::<30, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1488            self, 0,
1489        )
1490    }
1491
1492    #[doc = "Rsvd__irq__n (Reserved)"]
1493    #[inline(always)]
1494    pub fn rsvd__irq__n(
1495        self,
1496    ) -> crate::common::RegisterFieldBool<31, 1, 0, Icpr_SPEC, crate::common::RW> {
1497        crate::common::RegisterFieldBool::<31, 1, 0, Icpr_SPEC, crate::common::RW>::from_register(
1498            self, 0,
1499        )
1500    }
1501}
1502impl ::core::default::Default for Icpr {
1503    #[inline(always)]
1504    fn default() -> Icpr {
1505        <crate::RegValueT<Icpr_SPEC> as RegisterValue<_>>::new(0)
1506    }
1507}
1508
1509#[doc(hidden)]
1510#[derive(Copy, Clone, Eq, PartialEq)]
1511pub struct Ipr0_SPEC;
1512impl crate::sealed::RegSpec for Ipr0_SPEC {
1513    type DataType = u32;
1514}
1515
1516#[doc = "Interrupt priority register 0"]
1517pub type Ipr0 = crate::RegValueT<Ipr0_SPEC>;
1518
1519impl Ipr0 {
1520    #[doc = "BLE_WAKEUP_LP_IRQn\\[7:0\\] bits (Interrupt priority)"]
1521    #[inline(always)]
1522    pub fn ble_wakeup_lp_irqn_prio(
1523        self,
1524    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ipr0_SPEC, crate::common::RW> {
1525        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ipr0_SPEC,crate::common::RW>::from_register(self,0)
1526    }
1527
1528    #[doc = "BLE_GEN_IRQn\\[7:0\\] bits (Interrupt priority)"]
1529    #[inline(always)]
1530    pub fn ble_gen_irqn_prio(
1531        self,
1532    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ipr0_SPEC, crate::common::RW> {
1533        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ipr0_SPEC,crate::common::RW>::from_register(self,0)
1534    }
1535
1536    #[doc = "FTDF_WAKEUP_IRQn\\[7:0\\] bits (Interrupt priority)"]
1537    #[inline(always)]
1538    pub fn ftdf_wakeup_irqn_prio(
1539        self,
1540    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ipr0_SPEC, crate::common::RW> {
1541        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ipr0_SPEC,crate::common::RW>::from_register(self,0)
1542    }
1543
1544    #[doc = "FTDF_GEN_IRQn\\[7:0\\] bits (Interrupt priority)"]
1545    #[inline(always)]
1546    pub fn ftdf_gen_irqn_prio(
1547        self,
1548    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ipr0_SPEC, crate::common::RW> {
1549        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ipr0_SPEC,crate::common::RW>::from_register(self,0)
1550    }
1551}
1552impl ::core::default::Default for Ipr0 {
1553    #[inline(always)]
1554    fn default() -> Ipr0 {
1555        <crate::RegValueT<Ipr0_SPEC> as RegisterValue<_>>::new(0)
1556    }
1557}
1558
1559#[doc(hidden)]
1560#[derive(Copy, Clone, Eq, PartialEq)]
1561pub struct Ipr1_SPEC;
1562impl crate::sealed::RegSpec for Ipr1_SPEC {
1563    type DataType = u32;
1564}
1565
1566#[doc = "Interrupt priority register 1"]
1567pub type Ipr1 = crate::RegValueT<Ipr1_SPEC>;
1568
1569impl Ipr1 {
1570    #[doc = "RFCAL_IRQn\\[7:0\\] bits (Interrupt priority)"]
1571    #[inline(always)]
1572    pub fn rfcal_irqn_prio(
1573        self,
1574    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ipr1_SPEC, crate::common::RW> {
1575        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ipr1_SPEC,crate::common::RW>::from_register(self,0)
1576    }
1577
1578    #[doc = "COEX_IRQn\\[7:0\\] bits (Interrupt priority)"]
1579    #[inline(always)]
1580    pub fn coex_irqn_prio(
1581        self,
1582    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ipr1_SPEC, crate::common::RW> {
1583        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ipr1_SPEC,crate::common::RW>::from_register(self,0)
1584    }
1585
1586    #[doc = "CRYPTO_IRQn\\[7:0\\] bits (Interrupt priority)"]
1587    #[inline(always)]
1588    pub fn crypto_irqn_prio(
1589        self,
1590    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ipr1_SPEC, crate::common::RW> {
1591        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ipr1_SPEC,crate::common::RW>::from_register(self,0)
1592    }
1593
1594    #[doc = "MRM_IRQn\\[7:0\\] bits (Interrupt priority)"]
1595    #[inline(always)]
1596    pub fn mrm_irqn_prio(
1597        self,
1598    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ipr1_SPEC, crate::common::RW> {
1599        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ipr1_SPEC,crate::common::RW>::from_register(self,0)
1600    }
1601}
1602impl ::core::default::Default for Ipr1 {
1603    #[inline(always)]
1604    fn default() -> Ipr1 {
1605        <crate::RegValueT<Ipr1_SPEC> as RegisterValue<_>>::new(0)
1606    }
1607}
1608
1609#[doc(hidden)]
1610#[derive(Copy, Clone, Eq, PartialEq)]
1611pub struct Ipr2_SPEC;
1612impl crate::sealed::RegSpec for Ipr2_SPEC {
1613    type DataType = u32;
1614}
1615
1616#[doc = "Interrupt priority register 2"]
1617pub type Ipr2 = crate::RegValueT<Ipr2_SPEC>;
1618
1619impl Ipr2 {
1620    #[doc = "UART_IRQn\\[7:0\\] bits (Interrupt priority)"]
1621    #[inline(always)]
1622    pub fn uart_irqn_prio(
1623        self,
1624    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ipr2_SPEC, crate::common::RW> {
1625        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ipr2_SPEC,crate::common::RW>::from_register(self,0)
1626    }
1627
1628    #[doc = "UART2_IRQn\\[7:0\\] bits (Interrupt priority)"]
1629    #[inline(always)]
1630    pub fn uart2_irqn_prio(
1631        self,
1632    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ipr2_SPEC, crate::common::RW> {
1633        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ipr2_SPEC,crate::common::RW>::from_register(self,0)
1634    }
1635
1636    #[doc = "I2C_IRQn\\[7:0\\] bits (Interrupt priority)"]
1637    #[inline(always)]
1638    pub fn i2c_irqn_prio(
1639        self,
1640    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ipr2_SPEC, crate::common::RW> {
1641        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ipr2_SPEC,crate::common::RW>::from_register(self,0)
1642    }
1643
1644    #[doc = "I2C2_IRQn\\[7:0\\] bits (Interrupt priority)"]
1645    #[inline(always)]
1646    pub fn i2c2_irqn_prio(
1647        self,
1648    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ipr2_SPEC, crate::common::RW> {
1649        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ipr2_SPEC,crate::common::RW>::from_register(self,0)
1650    }
1651}
1652impl ::core::default::Default for Ipr2 {
1653    #[inline(always)]
1654    fn default() -> Ipr2 {
1655        <crate::RegValueT<Ipr2_SPEC> as RegisterValue<_>>::new(0)
1656    }
1657}
1658
1659#[doc(hidden)]
1660#[derive(Copy, Clone, Eq, PartialEq)]
1661pub struct Ipr3_SPEC;
1662impl crate::sealed::RegSpec for Ipr3_SPEC {
1663    type DataType = u32;
1664}
1665
1666#[doc = "Interrupt priority register 3"]
1667pub type Ipr3 = crate::RegValueT<Ipr3_SPEC>;
1668
1669impl Ipr3 {
1670    #[doc = "SPI_IRQn\\[7:0\\] bits (Interrupt priority)"]
1671    #[inline(always)]
1672    pub fn spi_irqn_prio(
1673        self,
1674    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ipr3_SPEC, crate::common::RW> {
1675        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ipr3_SPEC,crate::common::RW>::from_register(self,0)
1676    }
1677
1678    #[doc = "SPI2_IRQn\\[7:0\\] bits (Interrupt priority)"]
1679    #[inline(always)]
1680    pub fn spi2_irqn_prio(
1681        self,
1682    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ipr3_SPEC, crate::common::RW> {
1683        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ipr3_SPEC,crate::common::RW>::from_register(self,0)
1684    }
1685
1686    #[doc = "ADC_IRQn\\[7:0\\] bits (Interrupt priority)"]
1687    #[inline(always)]
1688    pub fn adc_irqn_prio(
1689        self,
1690    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ipr3_SPEC, crate::common::RW> {
1691        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ipr3_SPEC,crate::common::RW>::from_register(self,0)
1692    }
1693
1694    #[doc = "KEYBRD_IRQn\\[7:0\\] bits (Interrupt priority)"]
1695    #[inline(always)]
1696    pub fn keybrd_irqn_prio(
1697        self,
1698    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ipr3_SPEC, crate::common::RW> {
1699        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ipr3_SPEC,crate::common::RW>::from_register(self,0)
1700    }
1701}
1702impl ::core::default::Default for Ipr3 {
1703    #[inline(always)]
1704    fn default() -> Ipr3 {
1705        <crate::RegValueT<Ipr3_SPEC> as RegisterValue<_>>::new(0)
1706    }
1707}
1708
1709#[doc(hidden)]
1710#[derive(Copy, Clone, Eq, PartialEq)]
1711pub struct Ipr4_SPEC;
1712impl crate::sealed::RegSpec for Ipr4_SPEC {
1713    type DataType = u32;
1714}
1715
1716#[doc = "Interrupt priority register 4"]
1717pub type Ipr4 = crate::RegValueT<Ipr4_SPEC>;
1718
1719impl Ipr4 {
1720    #[doc = "IRGEN_IRQn\\[7:0\\] bits (Interrupt priority)"]
1721    #[inline(always)]
1722    pub fn irgen_irqn_prio(
1723        self,
1724    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ipr4_SPEC, crate::common::RW> {
1725        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ipr4_SPEC,crate::common::RW>::from_register(self,0)
1726    }
1727
1728    #[doc = "WKUP_GPIO_IRQn\\[7:0\\] bits (Interrupt priority)"]
1729    #[inline(always)]
1730    pub fn wkup_gpio_irqn_prio(
1731        self,
1732    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ipr4_SPEC, crate::common::RW> {
1733        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ipr4_SPEC,crate::common::RW>::from_register(self,0)
1734    }
1735
1736    #[doc = "SWTIM0_IRQn\\[7:0\\] bits (Interrupt priority)"]
1737    #[inline(always)]
1738    pub fn swtim0_irqn_prio(
1739        self,
1740    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ipr4_SPEC, crate::common::RW> {
1741        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ipr4_SPEC,crate::common::RW>::from_register(self,0)
1742    }
1743
1744    #[doc = "SWTIM1_IRQn\\[7:0\\] bits (Interrupt priority)"]
1745    #[inline(always)]
1746    pub fn swtim1_irqn_prio(
1747        self,
1748    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ipr4_SPEC, crate::common::RW> {
1749        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ipr4_SPEC,crate::common::RW>::from_register(self,0)
1750    }
1751}
1752impl ::core::default::Default for Ipr4 {
1753    #[inline(always)]
1754    fn default() -> Ipr4 {
1755        <crate::RegValueT<Ipr4_SPEC> as RegisterValue<_>>::new(0)
1756    }
1757}
1758
1759#[doc(hidden)]
1760#[derive(Copy, Clone, Eq, PartialEq)]
1761pub struct Ipr5_SPEC;
1762impl crate::sealed::RegSpec for Ipr5_SPEC {
1763    type DataType = u32;
1764}
1765
1766#[doc = "Interrupt priority register 5"]
1767pub type Ipr5 = crate::RegValueT<Ipr5_SPEC>;
1768
1769impl Ipr5 {
1770    #[doc = "QUADEC_IRQn\\[7:0\\] bits (Interrupt priority)"]
1771    #[inline(always)]
1772    pub fn quadec_irqn_prio(
1773        self,
1774    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ipr5_SPEC, crate::common::RW> {
1775        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ipr5_SPEC,crate::common::RW>::from_register(self,0)
1776    }
1777
1778    #[doc = "USB_IRQn\\[7:0\\] bits (Interrupt priority)"]
1779    #[inline(always)]
1780    pub fn usb_irqn_prio(
1781        self,
1782    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ipr5_SPEC, crate::common::RW> {
1783        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ipr5_SPEC,crate::common::RW>::from_register(self,0)
1784    }
1785
1786    #[doc = "PCM_IRQn\\[7:0\\] bits (Interrupt priority)"]
1787    #[inline(always)]
1788    pub fn pcm_irqn_prio(
1789        self,
1790    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ipr5_SPEC, crate::common::RW> {
1791        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ipr5_SPEC,crate::common::RW>::from_register(self,0)
1792    }
1793
1794    #[doc = "SRC_IN_IRQn\\[7:0\\] bits (Interrupt priority)"]
1795    #[inline(always)]
1796    pub fn src_in_irqn_prio(
1797        self,
1798    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ipr5_SPEC, crate::common::RW> {
1799        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ipr5_SPEC,crate::common::RW>::from_register(self,0)
1800    }
1801}
1802impl ::core::default::Default for Ipr5 {
1803    #[inline(always)]
1804    fn default() -> Ipr5 {
1805        <crate::RegValueT<Ipr5_SPEC> as RegisterValue<_>>::new(0)
1806    }
1807}
1808
1809#[doc(hidden)]
1810#[derive(Copy, Clone, Eq, PartialEq)]
1811pub struct Ipr6_SPEC;
1812impl crate::sealed::RegSpec for Ipr6_SPEC {
1813    type DataType = u32;
1814}
1815
1816#[doc = "Interrupt priority register 6"]
1817pub type Ipr6 = crate::RegValueT<Ipr6_SPEC>;
1818
1819impl Ipr6 {
1820    #[doc = "SRC_OUT_IRQn\\[7:0\\] bits (Interrupt priority)"]
1821    #[inline(always)]
1822    pub fn src_out_irqn_prio(
1823        self,
1824    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ipr6_SPEC, crate::common::RW> {
1825        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ipr6_SPEC,crate::common::RW>::from_register(self,0)
1826    }
1827
1828    #[doc = "VBUS_IRQn\\[7:0\\] bits (Interrupt priority)"]
1829    #[inline(always)]
1830    pub fn vbus_irqn_prio(
1831        self,
1832    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ipr6_SPEC, crate::common::RW> {
1833        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ipr6_SPEC,crate::common::RW>::from_register(self,0)
1834    }
1835
1836    #[doc = "DMA_IRQn\\[7:0\\] bits (Interrupt priority)"]
1837    #[inline(always)]
1838    pub fn dma_irqn_prio(
1839        self,
1840    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ipr6_SPEC, crate::common::RW> {
1841        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ipr6_SPEC,crate::common::RW>::from_register(self,0)
1842    }
1843
1844    #[doc = "RF_DIAG_IRQn\\[7:0\\] bits (Interrupt priority)"]
1845    #[inline(always)]
1846    pub fn rf_diag_irqn_prio(
1847        self,
1848    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ipr6_SPEC, crate::common::RW> {
1849        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ipr6_SPEC,crate::common::RW>::from_register(self,0)
1850    }
1851}
1852impl ::core::default::Default for Ipr6 {
1853    #[inline(always)]
1854    fn default() -> Ipr6 {
1855        <crate::RegValueT<Ipr6_SPEC> as RegisterValue<_>>::new(0)
1856    }
1857}
1858
1859#[doc(hidden)]
1860#[derive(Copy, Clone, Eq, PartialEq)]
1861pub struct Ipr7_SPEC;
1862impl crate::sealed::RegSpec for Ipr7_SPEC {
1863    type DataType = u32;
1864}
1865
1866#[doc = "Interrupt priority register 7"]
1867pub type Ipr7 = crate::RegValueT<Ipr7_SPEC>;
1868
1869impl Ipr7 {
1870    #[doc = "TRNG_IRQn\\[7:0\\] bits (Interrupt priority)"]
1871    #[inline(always)]
1872    pub fn trng_irqn_prio(
1873        self,
1874    ) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, Ipr7_SPEC, crate::common::RW> {
1875        crate::common::RegisterField::<0,0xff,1,0,u8,u8,Ipr7_SPEC,crate::common::RW>::from_register(self,0)
1876    }
1877
1878    #[doc = "DCDC_IRQn\\[7:0\\] bits (Interrupt priority)"]
1879    #[inline(always)]
1880    pub fn dcdc_irqn_prio(
1881        self,
1882    ) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, Ipr7_SPEC, crate::common::RW> {
1883        crate::common::RegisterField::<8,0xff,1,0,u8,u8,Ipr7_SPEC,crate::common::RW>::from_register(self,0)
1884    }
1885
1886    #[doc = "XTAL16RDY_IRQn\\[7:0\\] bits (Interrupt priority)"]
1887    #[inline(always)]
1888    pub fn xtal16rdy_irqn_prio(
1889        self,
1890    ) -> crate::common::RegisterField<16, 0xff, 1, 0, u8, u8, Ipr7_SPEC, crate::common::RW> {
1891        crate::common::RegisterField::<16,0xff,1,0,u8,u8,Ipr7_SPEC,crate::common::RW>::from_register(self,0)
1892    }
1893
1894    #[doc = "RESERVED31_IRQn\\[7:0\\] bits (Reserved)"]
1895    #[inline(always)]
1896    pub fn reserved31_irqn_dont_use(
1897        self,
1898    ) -> crate::common::RegisterField<24, 0xff, 1, 0, u8, u8, Ipr7_SPEC, crate::common::RW> {
1899        crate::common::RegisterField::<24,0xff,1,0,u8,u8,Ipr7_SPEC,crate::common::RW>::from_register(self,0)
1900    }
1901}
1902impl ::core::default::Default for Ipr7 {
1903    #[inline(always)]
1904    fn default() -> Ipr7 {
1905        <crate::RegValueT<Ipr7_SPEC> as RegisterValue<_>>::new(0)
1906    }
1907}
da14531_pac/nvic.rs

da14531_pac/
nvic.rs
