d1_pac/audio_codec/
ac_adc_drc_ctrl.rs

1#[doc = "Register `ac_adc_drc_ctrl` reader"]
2pub type R = crate::R<AC_ADC_DRC_CTRL_SPEC>;
3#[doc = "Register `ac_adc_drc_ctrl` writer"]
4pub type W = crate::W<AC_ADC_DRC_CTRL_SPEC>;
5#[doc = "Field `adc_drc_et_en` reader - DRC ET enable\n\nWhen the bit is disabled, Ke and OPE parameter is unused."]
6pub type ADC_DRC_ET_EN_R = crate::BitReader<ADC_DRC_ET_EN_A>;
7#[doc = "DRC ET enable\n\nWhen the bit is disabled, Ke and OPE parameter is unused.\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum ADC_DRC_ET_EN_A {
10    #[doc = "0: Disabled"]
11    DISABLED = 0,
12    #[doc = "1: Enabled"]
13    ENABLED = 1,
14}
15impl From<ADC_DRC_ET_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: ADC_DRC_ET_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl ADC_DRC_ET_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> ADC_DRC_ET_EN_A {
25        match self.bits {
26            false => ADC_DRC_ET_EN_A::DISABLED,
27            true => ADC_DRC_ET_EN_A::ENABLED,
28        }
29    }
30    #[doc = "Disabled"]
31    #[inline(always)]
32    pub fn is_disabled(&self) -> bool {
33        *self == ADC_DRC_ET_EN_A::DISABLED
34    }
35    #[doc = "Enabled"]
36    #[inline(always)]
37    pub fn is_enabled(&self) -> bool {
38        *self == ADC_DRC_ET_EN_A::ENABLED
39    }
40}
41#[doc = "Field `adc_drc_et_en` writer - DRC ET enable\n\nWhen the bit is disabled, Ke and OPE parameter is unused."]
42pub type ADC_DRC_ET_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_DRC_ET_EN_A>;
43impl<'a, REG> ADC_DRC_ET_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Disabled"]
48    #[inline(always)]
49    pub fn disabled(self) -> &'a mut crate::W<REG> {
50        self.variant(ADC_DRC_ET_EN_A::DISABLED)
51    }
52    #[doc = "Enabled"]
53    #[inline(always)]
54    pub fn enabled(self) -> &'a mut crate::W<REG> {
55        self.variant(ADC_DRC_ET_EN_A::ENABLED)
56    }
57}
58#[doc = "Field `adc_drc_lt_en` reader - DRC LT enable\n\nWhen the bit is disabled, Kl and OPL parameter is unused."]
59pub type ADC_DRC_LT_EN_R = crate::BitReader<ADC_DRC_LT_EN_A>;
60#[doc = "DRC LT enable\n\nWhen the bit is disabled, Kl and OPL parameter is unused.\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum ADC_DRC_LT_EN_A {
63    #[doc = "0: Disabled"]
64    DISABLED = 0,
65    #[doc = "1: Enabled"]
66    ENABLED = 1,
67}
68impl From<ADC_DRC_LT_EN_A> for bool {
69    #[inline(always)]
70    fn from(variant: ADC_DRC_LT_EN_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl ADC_DRC_LT_EN_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> ADC_DRC_LT_EN_A {
78        match self.bits {
79            false => ADC_DRC_LT_EN_A::DISABLED,
80            true => ADC_DRC_LT_EN_A::ENABLED,
81        }
82    }
83    #[doc = "Disabled"]
84    #[inline(always)]
85    pub fn is_disabled(&self) -> bool {
86        *self == ADC_DRC_LT_EN_A::DISABLED
87    }
88    #[doc = "Enabled"]
89    #[inline(always)]
90    pub fn is_enabled(&self) -> bool {
91        *self == ADC_DRC_LT_EN_A::ENABLED
92    }
93}
94#[doc = "Field `adc_drc_lt_en` writer - DRC LT enable\n\nWhen the bit is disabled, Kl and OPL parameter is unused."]
95pub type ADC_DRC_LT_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_DRC_LT_EN_A>;
96impl<'a, REG> ADC_DRC_LT_EN_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Disabled"]
101    #[inline(always)]
102    pub fn disabled(self) -> &'a mut crate::W<REG> {
103        self.variant(ADC_DRC_LT_EN_A::DISABLED)
104    }
105    #[doc = "Enabled"]
106    #[inline(always)]
107    pub fn enabled(self) -> &'a mut crate::W<REG> {
108        self.variant(ADC_DRC_LT_EN_A::ENABLED)
109    }
110}
111#[doc = "Field `adc_drc_delay_func_en` reader - Delay function enable\n\nWhen the bit is disabled, the signal delay time is unused."]
112pub type ADC_DRC_DELAY_FUNC_EN_R = crate::BitReader<ADC_DRC_DELAY_FUNC_EN_A>;
113#[doc = "Delay function enable\n\nWhen the bit is disabled, the signal delay time is unused.\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum ADC_DRC_DELAY_FUNC_EN_A {
116    #[doc = "0: Disabled"]
117    DISABLED = 0,
118    #[doc = "1: Enabled"]
119    ENABLED = 1,
120}
121impl From<ADC_DRC_DELAY_FUNC_EN_A> for bool {
122    #[inline(always)]
123    fn from(variant: ADC_DRC_DELAY_FUNC_EN_A) -> Self {
124        variant as u8 != 0
125    }
126}
127impl ADC_DRC_DELAY_FUNC_EN_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> ADC_DRC_DELAY_FUNC_EN_A {
131        match self.bits {
132            false => ADC_DRC_DELAY_FUNC_EN_A::DISABLED,
133            true => ADC_DRC_DELAY_FUNC_EN_A::ENABLED,
134        }
135    }
136    #[doc = "Disabled"]
137    #[inline(always)]
138    pub fn is_disabled(&self) -> bool {
139        *self == ADC_DRC_DELAY_FUNC_EN_A::DISABLED
140    }
141    #[doc = "Enabled"]
142    #[inline(always)]
143    pub fn is_enabled(&self) -> bool {
144        *self == ADC_DRC_DELAY_FUNC_EN_A::ENABLED
145    }
146}
147#[doc = "Field `adc_drc_delay_func_en` writer - Delay function enable\n\nWhen the bit is disabled, the signal delay time is unused."]
148pub type ADC_DRC_DELAY_FUNC_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_DRC_DELAY_FUNC_EN_A>;
149impl<'a, REG> ADC_DRC_DELAY_FUNC_EN_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "Disabled"]
154    #[inline(always)]
155    pub fn disabled(self) -> &'a mut crate::W<REG> {
156        self.variant(ADC_DRC_DELAY_FUNC_EN_A::DISABLED)
157    }
158    #[doc = "Enabled"]
159    #[inline(always)]
160    pub fn enabled(self) -> &'a mut crate::W<REG> {
161        self.variant(ADC_DRC_DELAY_FUNC_EN_A::ENABLED)
162    }
163}
164#[doc = "Field `adc_drc_signal_func_sel` reader - Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, and AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)"]
165pub type ADC_DRC_SIGNAL_FUNC_SEL_R = crate::BitReader<ADC_DRC_SIGNAL_FUNC_SEL_A>;
166#[doc = "Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, and AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)\n\nValue on reset: 0"]
167#[derive(Clone, Copy, Debug, PartialEq, Eq)]
168pub enum ADC_DRC_SIGNAL_FUNC_SEL_A {
169    #[doc = "0: RMS filter"]
170    RMS = 0,
171    #[doc = "1: Peak filter"]
172    P_EAK = 1,
173}
174impl From<ADC_DRC_SIGNAL_FUNC_SEL_A> for bool {
175    #[inline(always)]
176    fn from(variant: ADC_DRC_SIGNAL_FUNC_SEL_A) -> Self {
177        variant as u8 != 0
178    }
179}
180impl ADC_DRC_SIGNAL_FUNC_SEL_R {
181    #[doc = "Get enumerated values variant"]
182    #[inline(always)]
183    pub const fn variant(&self) -> ADC_DRC_SIGNAL_FUNC_SEL_A {
184        match self.bits {
185            false => ADC_DRC_SIGNAL_FUNC_SEL_A::RMS,
186            true => ADC_DRC_SIGNAL_FUNC_SEL_A::P_EAK,
187        }
188    }
189    #[doc = "RMS filter"]
190    #[inline(always)]
191    pub fn is_rms(&self) -> bool {
192        *self == ADC_DRC_SIGNAL_FUNC_SEL_A::RMS
193    }
194    #[doc = "Peak filter"]
195    #[inline(always)]
196    pub fn is_p_eak(&self) -> bool {
197        *self == ADC_DRC_SIGNAL_FUNC_SEL_A::P_EAK
198    }
199}
200#[doc = "Field `adc_drc_signal_func_sel` writer - Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, and AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)"]
201pub type ADC_DRC_SIGNAL_FUNC_SEL_W<'a, REG> = crate::BitWriter<'a, REG, ADC_DRC_SIGNAL_FUNC_SEL_A>;
202impl<'a, REG> ADC_DRC_SIGNAL_FUNC_SEL_W<'a, REG>
203where
204    REG: crate::Writable + crate::RegisterSpec,
205{
206    #[doc = "RMS filter"]
207    #[inline(always)]
208    pub fn rms(self) -> &'a mut crate::W<REG> {
209        self.variant(ADC_DRC_SIGNAL_FUNC_SEL_A::RMS)
210    }
211    #[doc = "Peak filter"]
212    #[inline(always)]
213    pub fn p_eak(self) -> &'a mut crate::W<REG> {
214        self.variant(ADC_DRC_SIGNAL_FUNC_SEL_A::P_EAK)
215    }
216}
217#[doc = "Field `adc_drc_detect_noise_en` reader - Control the DRC to detect noise when ET is enabled"]
218pub type ADC_DRC_DETECT_NOISE_EN_R = crate::BitReader<ADC_DRC_DETECT_NOISE_EN_A>;
219#[doc = "Control the DRC to detect noise when ET is enabled\n\nValue on reset: 0"]
220#[derive(Clone, Copy, Debug, PartialEq, Eq)]
221pub enum ADC_DRC_DETECT_NOISE_EN_A {
222    #[doc = "0: Disabled"]
223    DISABLED = 0,
224    #[doc = "1: Enabled"]
225    ENABLED = 1,
226}
227impl From<ADC_DRC_DETECT_NOISE_EN_A> for bool {
228    #[inline(always)]
229    fn from(variant: ADC_DRC_DETECT_NOISE_EN_A) -> Self {
230        variant as u8 != 0
231    }
232}
233impl ADC_DRC_DETECT_NOISE_EN_R {
234    #[doc = "Get enumerated values variant"]
235    #[inline(always)]
236    pub const fn variant(&self) -> ADC_DRC_DETECT_NOISE_EN_A {
237        match self.bits {
238            false => ADC_DRC_DETECT_NOISE_EN_A::DISABLED,
239            true => ADC_DRC_DETECT_NOISE_EN_A::ENABLED,
240        }
241    }
242    #[doc = "Disabled"]
243    #[inline(always)]
244    pub fn is_disabled(&self) -> bool {
245        *self == ADC_DRC_DETECT_NOISE_EN_A::DISABLED
246    }
247    #[doc = "Enabled"]
248    #[inline(always)]
249    pub fn is_enabled(&self) -> bool {
250        *self == ADC_DRC_DETECT_NOISE_EN_A::ENABLED
251    }
252}
253#[doc = "Field `adc_drc_detect_noise_en` writer - Control the DRC to detect noise when ET is enabled"]
254pub type ADC_DRC_DETECT_NOISE_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_DRC_DETECT_NOISE_EN_A>;
255impl<'a, REG> ADC_DRC_DETECT_NOISE_EN_W<'a, REG>
256where
257    REG: crate::Writable + crate::RegisterSpec,
258{
259    #[doc = "Disabled"]
260    #[inline(always)]
261    pub fn disabled(self) -> &'a mut crate::W<REG> {
262        self.variant(ADC_DRC_DETECT_NOISE_EN_A::DISABLED)
263    }
264    #[doc = "Enabled"]
265    #[inline(always)]
266    pub fn enabled(self) -> &'a mut crate::W<REG> {
267        self.variant(ADC_DRC_DETECT_NOISE_EN_A::ENABLED)
268    }
269}
270#[doc = "Field `adc_drc_gain_min_limit_en` reader - DRC gain min limit enable\n\nWhen this fuction is enabled, it will overwrite the noise detect function."]
271pub type ADC_DRC_GAIN_MIN_LIMIT_EN_R = crate::BitReader<ADC_DRC_GAIN_MIN_LIMIT_EN_A>;
272#[doc = "DRC gain min limit enable\n\nWhen this fuction is enabled, it will overwrite the noise detect function.\n\nValue on reset: 0"]
273#[derive(Clone, Copy, Debug, PartialEq, Eq)]
274pub enum ADC_DRC_GAIN_MIN_LIMIT_EN_A {
275    #[doc = "0: Disabled"]
276    DISABLED = 0,
277    #[doc = "1: Enabled"]
278    ENABLED = 1,
279}
280impl From<ADC_DRC_GAIN_MIN_LIMIT_EN_A> for bool {
281    #[inline(always)]
282    fn from(variant: ADC_DRC_GAIN_MIN_LIMIT_EN_A) -> Self {
283        variant as u8 != 0
284    }
285}
286impl ADC_DRC_GAIN_MIN_LIMIT_EN_R {
287    #[doc = "Get enumerated values variant"]
288    #[inline(always)]
289    pub const fn variant(&self) -> ADC_DRC_GAIN_MIN_LIMIT_EN_A {
290        match self.bits {
291            false => ADC_DRC_GAIN_MIN_LIMIT_EN_A::DISABLED,
292            true => ADC_DRC_GAIN_MIN_LIMIT_EN_A::ENABLED,
293        }
294    }
295    #[doc = "Disabled"]
296    #[inline(always)]
297    pub fn is_disabled(&self) -> bool {
298        *self == ADC_DRC_GAIN_MIN_LIMIT_EN_A::DISABLED
299    }
300    #[doc = "Enabled"]
301    #[inline(always)]
302    pub fn is_enabled(&self) -> bool {
303        *self == ADC_DRC_GAIN_MIN_LIMIT_EN_A::ENABLED
304    }
305}
306#[doc = "Field `adc_drc_gain_min_limit_en` writer - DRC gain min limit enable\n\nWhen this fuction is enabled, it will overwrite the noise detect function."]
307pub type ADC_DRC_GAIN_MIN_LIMIT_EN_W<'a, REG> =
308    crate::BitWriter<'a, REG, ADC_DRC_GAIN_MIN_LIMIT_EN_A>;
309impl<'a, REG> ADC_DRC_GAIN_MIN_LIMIT_EN_W<'a, REG>
310where
311    REG: crate::Writable + crate::RegisterSpec,
312{
313    #[doc = "Disabled"]
314    #[inline(always)]
315    pub fn disabled(self) -> &'a mut crate::W<REG> {
316        self.variant(ADC_DRC_GAIN_MIN_LIMIT_EN_A::DISABLED)
317    }
318    #[doc = "Enabled"]
319    #[inline(always)]
320    pub fn enabled(self) -> &'a mut crate::W<REG> {
321        self.variant(ADC_DRC_GAIN_MIN_LIMIT_EN_A::ENABLED)
322    }
323}
324#[doc = "Field `adc_drc_gain_max_limit_en` reader - DRC gain max limit enable"]
325pub type ADC_DRC_GAIN_MAX_LIMIT_EN_R = crate::BitReader<ADC_DRC_GAIN_MAX_LIMIT_EN_A>;
326#[doc = "DRC gain max limit enable\n\nValue on reset: 0"]
327#[derive(Clone, Copy, Debug, PartialEq, Eq)]
328pub enum ADC_DRC_GAIN_MAX_LIMIT_EN_A {
329    #[doc = "0: Disabled"]
330    DISABLED = 0,
331    #[doc = "1: Enabled"]
332    ENABLED = 1,
333}
334impl From<ADC_DRC_GAIN_MAX_LIMIT_EN_A> for bool {
335    #[inline(always)]
336    fn from(variant: ADC_DRC_GAIN_MAX_LIMIT_EN_A) -> Self {
337        variant as u8 != 0
338    }
339}
340impl ADC_DRC_GAIN_MAX_LIMIT_EN_R {
341    #[doc = "Get enumerated values variant"]
342    #[inline(always)]
343    pub const fn variant(&self) -> ADC_DRC_GAIN_MAX_LIMIT_EN_A {
344        match self.bits {
345            false => ADC_DRC_GAIN_MAX_LIMIT_EN_A::DISABLED,
346            true => ADC_DRC_GAIN_MAX_LIMIT_EN_A::ENABLED,
347        }
348    }
349    #[doc = "Disabled"]
350    #[inline(always)]
351    pub fn is_disabled(&self) -> bool {
352        *self == ADC_DRC_GAIN_MAX_LIMIT_EN_A::DISABLED
353    }
354    #[doc = "Enabled"]
355    #[inline(always)]
356    pub fn is_enabled(&self) -> bool {
357        *self == ADC_DRC_GAIN_MAX_LIMIT_EN_A::ENABLED
358    }
359}
360#[doc = "Field `adc_drc_gain_max_limit_en` writer - DRC gain max limit enable"]
361pub type ADC_DRC_GAIN_MAX_LIMIT_EN_W<'a, REG> =
362    crate::BitWriter<'a, REG, ADC_DRC_GAIN_MAX_LIMIT_EN_A>;
363impl<'a, REG> ADC_DRC_GAIN_MAX_LIMIT_EN_W<'a, REG>
364where
365    REG: crate::Writable + crate::RegisterSpec,
366{
367    #[doc = "Disabled"]
368    #[inline(always)]
369    pub fn disabled(self) -> &'a mut crate::W<REG> {
370        self.variant(ADC_DRC_GAIN_MAX_LIMIT_EN_A::DISABLED)
371    }
372    #[doc = "Enabled"]
373    #[inline(always)]
374    pub fn enabled(self) -> &'a mut crate::W<REG> {
375        self.variant(ADC_DRC_GAIN_MAX_LIMIT_EN_A::ENABLED)
376    }
377}
378#[doc = "Field `adc_drc_delay_buf_en` reader - The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely."]
379pub type ADC_DRC_DELAY_BUF_EN_R = crate::BitReader<ADC_DRC_DELAY_BUF_EN_A>;
380#[doc = "The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely.\n\nValue on reset: 1"]
381#[derive(Clone, Copy, Debug, PartialEq, Eq)]
382pub enum ADC_DRC_DELAY_BUF_EN_A {
383    #[doc = "0: Do not use the buffer"]
384    D_O_NOT_USE_THE_BUFFER = 0,
385    #[doc = "1: Use the buffer"]
386    U_SE_THE_BUFFER = 1,
387}
388impl From<ADC_DRC_DELAY_BUF_EN_A> for bool {
389    #[inline(always)]
390    fn from(variant: ADC_DRC_DELAY_BUF_EN_A) -> Self {
391        variant as u8 != 0
392    }
393}
394impl ADC_DRC_DELAY_BUF_EN_R {
395    #[doc = "Get enumerated values variant"]
396    #[inline(always)]
397    pub const fn variant(&self) -> ADC_DRC_DELAY_BUF_EN_A {
398        match self.bits {
399            false => ADC_DRC_DELAY_BUF_EN_A::D_O_NOT_USE_THE_BUFFER,
400            true => ADC_DRC_DELAY_BUF_EN_A::U_SE_THE_BUFFER,
401        }
402    }
403    #[doc = "Do not use the buffer"]
404    #[inline(always)]
405    pub fn is_d_o_not_use_the_buffer(&self) -> bool {
406        *self == ADC_DRC_DELAY_BUF_EN_A::D_O_NOT_USE_THE_BUFFER
407    }
408    #[doc = "Use the buffer"]
409    #[inline(always)]
410    pub fn is_u_se_the_buffer(&self) -> bool {
411        *self == ADC_DRC_DELAY_BUF_EN_A::U_SE_THE_BUFFER
412    }
413}
414#[doc = "Field `adc_drc_delay_buf_en` writer - The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely."]
415pub type ADC_DRC_DELAY_BUF_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_DRC_DELAY_BUF_EN_A>;
416impl<'a, REG> ADC_DRC_DELAY_BUF_EN_W<'a, REG>
417where
418    REG: crate::Writable + crate::RegisterSpec,
419{
420    #[doc = "Do not use the buffer"]
421    #[inline(always)]
422    pub fn d_o_not_use_the_buffer(self) -> &'a mut crate::W<REG> {
423        self.variant(ADC_DRC_DELAY_BUF_EN_A::D_O_NOT_USE_THE_BUFFER)
424    }
425    #[doc = "Use the buffer"]
426    #[inline(always)]
427    pub fn u_se_the_buffer(self) -> &'a mut crate::W<REG> {
428        self.variant(ADC_DRC_DELAY_BUF_EN_A::U_SE_THE_BUFFER)
429    }
430}
431#[doc = "Field `adc_drc_signal_delay_time_set` reader - Signal delay time setting\n\nDelay time = 8*(n + 1) fs, n &lt; 6'h30\n\nWhen the delay function is disabled, the signal delay time is unused."]
432pub type ADC_DRC_SIGNAL_DELAY_TIME_SET_R = crate::FieldReader;
433#[doc = "Field `adc_drc_signal_delay_time_set` writer - Signal delay time setting\n\nDelay time = 8*(n + 1) fs, n &lt; 6'h30\n\nWhen the delay function is disabled, the signal delay time is unused."]
434pub type ADC_DRC_SIGNAL_DELAY_TIME_SET_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
435#[doc = "Field `adc_drc_delay_buf_output_state` reader - DRC delay buffer data output state when The DRC delay function is enabled and the DRC function is disabled. After disabled DRC function and this bit goes to 0, the user should write the DRC delay function bit to 0."]
436pub type ADC_DRC_DELAY_BUF_OUTPUT_STATE_R = crate::BitReader<ADC_DRC_DELAY_BUF_OUTPUT_STATE_A>;
437#[doc = "DRC delay buffer data output state when The DRC delay function is enabled and the DRC function is disabled. After disabled DRC function and this bit goes to 0, the user should write the DRC delay function bit to 0.\n\nValue on reset: 0"]
438#[derive(Clone, Copy, Debug, PartialEq, Eq)]
439pub enum ADC_DRC_DELAY_BUF_OUTPUT_STATE_A {
440    #[doc = "0: Not completed"]
441    NOT_COMPLETED = 0,
442    #[doc = "1: Completed"]
443    COMPLETED = 1,
444}
445impl From<ADC_DRC_DELAY_BUF_OUTPUT_STATE_A> for bool {
446    #[inline(always)]
447    fn from(variant: ADC_DRC_DELAY_BUF_OUTPUT_STATE_A) -> Self {
448        variant as u8 != 0
449    }
450}
451impl ADC_DRC_DELAY_BUF_OUTPUT_STATE_R {
452    #[doc = "Get enumerated values variant"]
453    #[inline(always)]
454    pub const fn variant(&self) -> ADC_DRC_DELAY_BUF_OUTPUT_STATE_A {
455        match self.bits {
456            false => ADC_DRC_DELAY_BUF_OUTPUT_STATE_A::NOT_COMPLETED,
457            true => ADC_DRC_DELAY_BUF_OUTPUT_STATE_A::COMPLETED,
458        }
459    }
460    #[doc = "Not completed"]
461    #[inline(always)]
462    pub fn is_not_completed(&self) -> bool {
463        *self == ADC_DRC_DELAY_BUF_OUTPUT_STATE_A::NOT_COMPLETED
464    }
465    #[doc = "Completed"]
466    #[inline(always)]
467    pub fn is_completed(&self) -> bool {
468        *self == ADC_DRC_DELAY_BUF_OUTPUT_STATE_A::COMPLETED
469    }
470}
471impl R {
472    #[doc = "Bit 0 - DRC ET enable\n\nWhen the bit is disabled, Ke and OPE parameter is unused."]
473    #[inline(always)]
474    pub fn adc_drc_et_en(&self) -> ADC_DRC_ET_EN_R {
475        ADC_DRC_ET_EN_R::new((self.bits & 1) != 0)
476    }
477    #[doc = "Bit 1 - DRC LT enable\n\nWhen the bit is disabled, Kl and OPL parameter is unused."]
478    #[inline(always)]
479    pub fn adc_drc_lt_en(&self) -> ADC_DRC_LT_EN_R {
480        ADC_DRC_LT_EN_R::new(((self.bits >> 1) & 1) != 0)
481    }
482    #[doc = "Bit 2 - Delay function enable\n\nWhen the bit is disabled, the signal delay time is unused."]
483    #[inline(always)]
484    pub fn adc_drc_delay_func_en(&self) -> ADC_DRC_DELAY_FUNC_EN_R {
485        ADC_DRC_DELAY_FUNC_EN_R::new(((self.bits >> 2) & 1) != 0)
486    }
487    #[doc = "Bit 3 - Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, and AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)"]
488    #[inline(always)]
489    pub fn adc_drc_signal_func_sel(&self) -> ADC_DRC_SIGNAL_FUNC_SEL_R {
490        ADC_DRC_SIGNAL_FUNC_SEL_R::new(((self.bits >> 3) & 1) != 0)
491    }
492    #[doc = "Bit 4 - Control the DRC to detect noise when ET is enabled"]
493    #[inline(always)]
494    pub fn adc_drc_detect_noise_en(&self) -> ADC_DRC_DETECT_NOISE_EN_R {
495        ADC_DRC_DETECT_NOISE_EN_R::new(((self.bits >> 4) & 1) != 0)
496    }
497    #[doc = "Bit 5 - DRC gain min limit enable\n\nWhen this fuction is enabled, it will overwrite the noise detect function."]
498    #[inline(always)]
499    pub fn adc_drc_gain_min_limit_en(&self) -> ADC_DRC_GAIN_MIN_LIMIT_EN_R {
500        ADC_DRC_GAIN_MIN_LIMIT_EN_R::new(((self.bits >> 5) & 1) != 0)
501    }
502    #[doc = "Bit 6 - DRC gain max limit enable"]
503    #[inline(always)]
504    pub fn adc_drc_gain_max_limit_en(&self) -> ADC_DRC_GAIN_MAX_LIMIT_EN_R {
505        ADC_DRC_GAIN_MAX_LIMIT_EN_R::new(((self.bits >> 6) & 1) != 0)
506    }
507    #[doc = "Bit 7 - The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely."]
508    #[inline(always)]
509    pub fn adc_drc_delay_buf_en(&self) -> ADC_DRC_DELAY_BUF_EN_R {
510        ADC_DRC_DELAY_BUF_EN_R::new(((self.bits >> 7) & 1) != 0)
511    }
512    #[doc = "Bits 8:13 - Signal delay time setting\n\nDelay time = 8*(n + 1) fs, n &lt; 6'h30\n\nWhen the delay function is disabled, the signal delay time is unused."]
513    #[inline(always)]
514    pub fn adc_drc_signal_delay_time_set(&self) -> ADC_DRC_SIGNAL_DELAY_TIME_SET_R {
515        ADC_DRC_SIGNAL_DELAY_TIME_SET_R::new(((self.bits >> 8) & 0x3f) as u8)
516    }
517    #[doc = "Bit 15 - DRC delay buffer data output state when The DRC delay function is enabled and the DRC function is disabled. After disabled DRC function and this bit goes to 0, the user should write the DRC delay function bit to 0."]
518    #[inline(always)]
519    pub fn adc_drc_delay_buf_output_state(&self) -> ADC_DRC_DELAY_BUF_OUTPUT_STATE_R {
520        ADC_DRC_DELAY_BUF_OUTPUT_STATE_R::new(((self.bits >> 15) & 1) != 0)
521    }
522}
523impl W {
524    #[doc = "Bit 0 - DRC ET enable\n\nWhen the bit is disabled, Ke and OPE parameter is unused."]
525    #[inline(always)]
526    #[must_use]
527    pub fn adc_drc_et_en(&mut self) -> ADC_DRC_ET_EN_W<AC_ADC_DRC_CTRL_SPEC> {
528        ADC_DRC_ET_EN_W::new(self, 0)
529    }
530    #[doc = "Bit 1 - DRC LT enable\n\nWhen the bit is disabled, Kl and OPL parameter is unused."]
531    #[inline(always)]
532    #[must_use]
533    pub fn adc_drc_lt_en(&mut self) -> ADC_DRC_LT_EN_W<AC_ADC_DRC_CTRL_SPEC> {
534        ADC_DRC_LT_EN_W::new(self, 1)
535    }
536    #[doc = "Bit 2 - Delay function enable\n\nWhen the bit is disabled, the signal delay time is unused."]
537    #[inline(always)]
538    #[must_use]
539    pub fn adc_drc_delay_func_en(&mut self) -> ADC_DRC_DELAY_FUNC_EN_W<AC_ADC_DRC_CTRL_SPEC> {
540        ADC_DRC_DELAY_FUNC_EN_W::new(self, 2)
541    }
542    #[doc = "Bit 3 - Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, and AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)"]
543    #[inline(always)]
544    #[must_use]
545    pub fn adc_drc_signal_func_sel(&mut self) -> ADC_DRC_SIGNAL_FUNC_SEL_W<AC_ADC_DRC_CTRL_SPEC> {
546        ADC_DRC_SIGNAL_FUNC_SEL_W::new(self, 3)
547    }
548    #[doc = "Bit 4 - Control the DRC to detect noise when ET is enabled"]
549    #[inline(always)]
550    #[must_use]
551    pub fn adc_drc_detect_noise_en(&mut self) -> ADC_DRC_DETECT_NOISE_EN_W<AC_ADC_DRC_CTRL_SPEC> {
552        ADC_DRC_DETECT_NOISE_EN_W::new(self, 4)
553    }
554    #[doc = "Bit 5 - DRC gain min limit enable\n\nWhen this fuction is enabled, it will overwrite the noise detect function."]
555    #[inline(always)]
556    #[must_use]
557    pub fn adc_drc_gain_min_limit_en(
558        &mut self,
559    ) -> ADC_DRC_GAIN_MIN_LIMIT_EN_W<AC_ADC_DRC_CTRL_SPEC> {
560        ADC_DRC_GAIN_MIN_LIMIT_EN_W::new(self, 5)
561    }
562    #[doc = "Bit 6 - DRC gain max limit enable"]
563    #[inline(always)]
564    #[must_use]
565    pub fn adc_drc_gain_max_limit_en(
566        &mut self,
567    ) -> ADC_DRC_GAIN_MAX_LIMIT_EN_W<AC_ADC_DRC_CTRL_SPEC> {
568        ADC_DRC_GAIN_MAX_LIMIT_EN_W::new(self, 6)
569    }
570    #[doc = "Bit 7 - The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely."]
571    #[inline(always)]
572    #[must_use]
573    pub fn adc_drc_delay_buf_en(&mut self) -> ADC_DRC_DELAY_BUF_EN_W<AC_ADC_DRC_CTRL_SPEC> {
574        ADC_DRC_DELAY_BUF_EN_W::new(self, 7)
575    }
576    #[doc = "Bits 8:13 - Signal delay time setting\n\nDelay time = 8*(n + 1) fs, n &lt; 6'h30\n\nWhen the delay function is disabled, the signal delay time is unused."]
577    #[inline(always)]
578    #[must_use]
579    pub fn adc_drc_signal_delay_time_set(
580        &mut self,
581    ) -> ADC_DRC_SIGNAL_DELAY_TIME_SET_W<AC_ADC_DRC_CTRL_SPEC> {
582        ADC_DRC_SIGNAL_DELAY_TIME_SET_W::new(self, 8)
583    }
584    #[doc = r" Writes raw bits to the register."]
585    #[doc = r""]
586    #[doc = r" # Safety"]
587    #[doc = r""]
588    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
589    #[inline(always)]
590    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
591        self.bits = bits;
592        self
593    }
594}
595#[doc = "ADC DRC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ac_adc_drc_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ac_adc_drc_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
596pub struct AC_ADC_DRC_CTRL_SPEC;
597impl crate::RegisterSpec for AC_ADC_DRC_CTRL_SPEC {
598    type Ux = u32;
599}
600#[doc = "`read()` method returns [`ac_adc_drc_ctrl::R`](R) reader structure"]
601impl crate::Readable for AC_ADC_DRC_CTRL_SPEC {}
602#[doc = "`write(|w| ..)` method takes [`ac_adc_drc_ctrl::W`](W) writer structure"]
603impl crate::Writable for AC_ADC_DRC_CTRL_SPEC {
604    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
605    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
606}
607#[doc = "`reset()` method sets ac_adc_drc_ctrl to value 0x80"]
608impl crate::Resettable for AC_ADC_DRC_CTRL_SPEC {
609    const RESET_VALUE: Self::Ux = 0x80;
610}
d1_pac/audio_codec/ac_adc_drc_ctrl.rs

d1_pac/audio_codec/
ac_adc_drc_ctrl.rs
