d1_pac/usb1/ehci_capability/
hcsparams.rs

1#[doc = "Register `hcsparams` reader"]
2pub type R = crate::R<HCSPARAMS_SPEC>;
3#[doc = "Field `n_ports` reader - This field specifies the number of physical downstream ports implemented on this host controller. The value of this field determines how many port registers are addressable in the Operational Register Space. Valid values are in the range of 0x1 to 0x0f."]
4pub type N_PORTS_R = crate::FieldReader;
5#[doc = "Field `port_routing_rules` reader - This field indicates the method used by this implementation for how all ports are mapped to companion controllers."]
6pub type PORT_ROUTING_RULES_R = crate::BitReader;
7#[doc = "Field `n_pcc` reader - Number of Port per Companion Controller (N_PCC)\n\nThis field indicates the number of ports supported per companion host controller host controller. It is used to indicate the port routing configuration to system software."]
8pub type N_PCC_R = crate::FieldReader;
9#[doc = "Field `n_cc` reader - Number of Companion Controller (N_CC)\n\nThis field indicates the number of companion controllers associated with this USB2.0 host controller. A zero in this field indicates there are no companion host controllers. And a value larger than zero in this field indicates there are companion USB1.1 host controller(s)."]
10pub type N_CC_R = crate::FieldReader;
11#[doc = "Field `debug_port_number` reader - This register identifies which of the host controller ports is the debug port. The value is the port number (one based) of the debug port."]
12pub type DEBUG_PORT_NUMBER_R = crate::FieldReader;
13impl R {
14    #[doc = "Bits 0:3 - This field specifies the number of physical downstream ports implemented on this host controller. The value of this field determines how many port registers are addressable in the Operational Register Space. Valid values are in the range of 0x1 to 0x0f."]
15    #[inline(always)]
16    pub fn n_ports(&self) -> N_PORTS_R {
17        N_PORTS_R::new((self.bits & 0x0f) as u8)
18    }
19    #[doc = "Bit 7 - This field indicates the method used by this implementation for how all ports are mapped to companion controllers."]
20    #[inline(always)]
21    pub fn port_routing_rules(&self) -> PORT_ROUTING_RULES_R {
22        PORT_ROUTING_RULES_R::new(((self.bits >> 7) & 1) != 0)
23    }
24    #[doc = "Bits 8:11 - Number of Port per Companion Controller (N_PCC)\n\nThis field indicates the number of ports supported per companion host controller host controller. It is used to indicate the port routing configuration to system software."]
25    #[inline(always)]
26    pub fn n_pcc(&self) -> N_PCC_R {
27        N_PCC_R::new(((self.bits >> 8) & 0x0f) as u8)
28    }
29    #[doc = "Bits 12:15 - Number of Companion Controller (N_CC)\n\nThis field indicates the number of companion controllers associated with this USB2.0 host controller. A zero in this field indicates there are no companion host controllers. And a value larger than zero in this field indicates there are companion USB1.1 host controller(s)."]
30    #[inline(always)]
31    pub fn n_cc(&self) -> N_CC_R {
32        N_CC_R::new(((self.bits >> 12) & 0x0f) as u8)
33    }
34    #[doc = "Bits 20:23 - This register identifies which of the host controller ports is the debug port. The value is the port number (one based) of the debug port."]
35    #[inline(always)]
36    pub fn debug_port_number(&self) -> DEBUG_PORT_NUMBER_R {
37        DEBUG_PORT_NUMBER_R::new(((self.bits >> 20) & 0x0f) as u8)
38    }
39}
40#[doc = "EHCI Host Control Structural Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hcsparams::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
41pub struct HCSPARAMS_SPEC;
42impl crate::RegisterSpec for HCSPARAMS_SPEC {
43    type Ux = u32;
44}
45#[doc = "`read()` method returns [`hcsparams::R`](R) reader structure"]
46impl crate::Readable for HCSPARAMS_SPEC {}
47#[doc = "`reset()` method sets hcsparams to value 0"]
48impl crate::Resettable for HCSPARAMS_SPEC {
49    const RESET_VALUE: Self::Ux = 0;
50}
d1_pac/usb1/ehci_capability/hcsparams.rs

d1_pac/usb1/ehci_capability/
hcsparams.rs
