d1_pac/tcon_lcd0/
lcd_lvds_if.rs

1#[doc = "Register `lcd_lvds_if` reader"]
2pub type R = crate::R<LCD_LVDS_IF_SPEC>;
3#[doc = "Register `lcd_lvds_if` writer"]
4pub type W = crate::W<LCD_LVDS_IF_SPEC>;
5#[doc = "Field `lcd_lvds_data_pol` reader - Set the data polarity of LVDS"]
6pub type LCD_LVDS_DATA_POL_R = crate::FieldReader<LCD_LVDS_DATA_POL_A>;
7#[doc = "Set the data polarity of LVDS\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum LCD_LVDS_DATA_POL_A {
11    #[doc = "0: Reverse"]
12    REVERSE = 0,
13    #[doc = "1: Normal"]
14    NORMAL = 1,
15}
16impl From<LCD_LVDS_DATA_POL_A> for u8 {
17    #[inline(always)]
18    fn from(variant: LCD_LVDS_DATA_POL_A) -> Self {
19        variant as _
20    }
21}
22impl crate::FieldSpec for LCD_LVDS_DATA_POL_A {
23    type Ux = u8;
24}
25impl LCD_LVDS_DATA_POL_R {
26    #[doc = "Get enumerated values variant"]
27    #[inline(always)]
28    pub const fn variant(&self) -> Option<LCD_LVDS_DATA_POL_A> {
29        match self.bits {
30            0 => Some(LCD_LVDS_DATA_POL_A::REVERSE),
31            1 => Some(LCD_LVDS_DATA_POL_A::NORMAL),
32            _ => None,
33        }
34    }
35    #[doc = "Reverse"]
36    #[inline(always)]
37    pub fn is_reverse(&self) -> bool {
38        *self == LCD_LVDS_DATA_POL_A::REVERSE
39    }
40    #[doc = "Normal"]
41    #[inline(always)]
42    pub fn is_normal(&self) -> bool {
43        *self == LCD_LVDS_DATA_POL_A::NORMAL
44    }
45}
46#[doc = "Field `lcd_lvds_data_pol` writer - Set the data polarity of LVDS"]
47pub type LCD_LVDS_DATA_POL_W<'a, REG> = crate::FieldWriter<'a, REG, 4, LCD_LVDS_DATA_POL_A>;
48impl<'a, REG> LCD_LVDS_DATA_POL_W<'a, REG>
49where
50    REG: crate::Writable + crate::RegisterSpec,
51    REG::Ux: From<u8>,
52{
53    #[doc = "Reverse"]
54    #[inline(always)]
55    pub fn reverse(self) -> &'a mut crate::W<REG> {
56        self.variant(LCD_LVDS_DATA_POL_A::REVERSE)
57    }
58    #[doc = "Normal"]
59    #[inline(always)]
60    pub fn normal(self) -> &'a mut crate::W<REG> {
61        self.variant(LCD_LVDS_DATA_POL_A::NORMAL)
62    }
63}
64#[doc = "Field `lcd_lvds_clk_pol` reader - Set the clock polarity of LVDS"]
65pub type LCD_LVDS_CLK_POL_R = crate::BitReader<LCD_LVDS_CLK_POL_A>;
66#[doc = "Set the clock polarity of LVDS\n\nValue on reset: 0"]
67#[derive(Clone, Copy, Debug, PartialEq, Eq)]
68pub enum LCD_LVDS_CLK_POL_A {
69    #[doc = "0: Reverse"]
70    REVERSE = 0,
71    #[doc = "1: Normal"]
72    NORMAL = 1,
73}
74impl From<LCD_LVDS_CLK_POL_A> for bool {
75    #[inline(always)]
76    fn from(variant: LCD_LVDS_CLK_POL_A) -> Self {
77        variant as u8 != 0
78    }
79}
80impl LCD_LVDS_CLK_POL_R {
81    #[doc = "Get enumerated values variant"]
82    #[inline(always)]
83    pub const fn variant(&self) -> LCD_LVDS_CLK_POL_A {
84        match self.bits {
85            false => LCD_LVDS_CLK_POL_A::REVERSE,
86            true => LCD_LVDS_CLK_POL_A::NORMAL,
87        }
88    }
89    #[doc = "Reverse"]
90    #[inline(always)]
91    pub fn is_reverse(&self) -> bool {
92        *self == LCD_LVDS_CLK_POL_A::REVERSE
93    }
94    #[doc = "Normal"]
95    #[inline(always)]
96    pub fn is_normal(&self) -> bool {
97        *self == LCD_LVDS_CLK_POL_A::NORMAL
98    }
99}
100#[doc = "Field `lcd_lvds_clk_pol` writer - Set the clock polarity of LVDS"]
101pub type LCD_LVDS_CLK_POL_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_CLK_POL_A>;
102impl<'a, REG> LCD_LVDS_CLK_POL_W<'a, REG>
103where
104    REG: crate::Writable + crate::RegisterSpec,
105{
106    #[doc = "Reverse"]
107    #[inline(always)]
108    pub fn reverse(self) -> &'a mut crate::W<REG> {
109        self.variant(LCD_LVDS_CLK_POL_A::REVERSE)
110    }
111    #[doc = "Normal"]
112    #[inline(always)]
113    pub fn normal(self) -> &'a mut crate::W<REG> {
114        self.variant(LCD_LVDS_CLK_POL_A::NORMAL)
115    }
116}
117#[doc = "Field `lcd_lvds_clk_sel` reader - Select the clock source of LVDS"]
118pub type LCD_LVDS_CLK_SEL_R = crate::BitReader<LCD_LVDS_CLK_SEL_A>;
119#[doc = "Select the clock source of LVDS\n\nValue on reset: 0"]
120#[derive(Clone, Copy, Debug, PartialEq, Eq)]
121pub enum LCD_LVDS_CLK_SEL_A {
122    #[doc = "1: LCD CLK"]
123    LCD = 1,
124}
125impl From<LCD_LVDS_CLK_SEL_A> for bool {
126    #[inline(always)]
127    fn from(variant: LCD_LVDS_CLK_SEL_A) -> Self {
128        variant as u8 != 0
129    }
130}
131impl LCD_LVDS_CLK_SEL_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub const fn variant(&self) -> Option<LCD_LVDS_CLK_SEL_A> {
135        match self.bits {
136            true => Some(LCD_LVDS_CLK_SEL_A::LCD),
137            _ => None,
138        }
139    }
140    #[doc = "LCD CLK"]
141    #[inline(always)]
142    pub fn is_lcd(&self) -> bool {
143        *self == LCD_LVDS_CLK_SEL_A::LCD
144    }
145}
146#[doc = "Field `lcd_lvds_clk_sel` writer - Select the clock source of LVDS"]
147pub type LCD_LVDS_CLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_CLK_SEL_A>;
148impl<'a, REG> LCD_LVDS_CLK_SEL_W<'a, REG>
149where
150    REG: crate::Writable + crate::RegisterSpec,
151{
152    #[doc = "LCD CLK"]
153    #[inline(always)]
154    pub fn lcd(self) -> &'a mut crate::W<REG> {
155        self.variant(LCD_LVDS_CLK_SEL_A::LCD)
156    }
157}
158#[doc = "Field `lcd_lvds_correct_mode` reader - Set the LVDS correct mode"]
159pub type LCD_LVDS_CORRECT_MODE_R = crate::BitReader<LCD_LVDS_CORRECT_MODE_A>;
160#[doc = "Set the LVDS correct mode\n\nValue on reset: 0"]
161#[derive(Clone, Copy, Debug, PartialEq, Eq)]
162pub enum LCD_LVDS_CORRECT_MODE_A {
163    #[doc = "0: Mode0"]
164    M_ODE0 = 0,
165    #[doc = "1: Mode1"]
166    M_ODE1 = 1,
167}
168impl From<LCD_LVDS_CORRECT_MODE_A> for bool {
169    #[inline(always)]
170    fn from(variant: LCD_LVDS_CORRECT_MODE_A) -> Self {
171        variant as u8 != 0
172    }
173}
174impl LCD_LVDS_CORRECT_MODE_R {
175    #[doc = "Get enumerated values variant"]
176    #[inline(always)]
177    pub const fn variant(&self) -> LCD_LVDS_CORRECT_MODE_A {
178        match self.bits {
179            false => LCD_LVDS_CORRECT_MODE_A::M_ODE0,
180            true => LCD_LVDS_CORRECT_MODE_A::M_ODE1,
181        }
182    }
183    #[doc = "Mode0"]
184    #[inline(always)]
185    pub fn is_m_ode0(&self) -> bool {
186        *self == LCD_LVDS_CORRECT_MODE_A::M_ODE0
187    }
188    #[doc = "Mode1"]
189    #[inline(always)]
190    pub fn is_m_ode1(&self) -> bool {
191        *self == LCD_LVDS_CORRECT_MODE_A::M_ODE1
192    }
193}
194#[doc = "Field `lcd_lvds_correct_mode` writer - Set the LVDS correct mode"]
195pub type LCD_LVDS_CORRECT_MODE_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_CORRECT_MODE_A>;
196impl<'a, REG> LCD_LVDS_CORRECT_MODE_W<'a, REG>
197where
198    REG: crate::Writable + crate::RegisterSpec,
199{
200    #[doc = "Mode0"]
201    #[inline(always)]
202    pub fn m_ode0(self) -> &'a mut crate::W<REG> {
203        self.variant(LCD_LVDS_CORRECT_MODE_A::M_ODE0)
204    }
205    #[doc = "Mode1"]
206    #[inline(always)]
207    pub fn m_ode1(self) -> &'a mut crate::W<REG> {
208        self.variant(LCD_LVDS_CORRECT_MODE_A::M_ODE1)
209    }
210}
211#[doc = "Field `lcd_lvds_debug_mode` reader - Set the output signal in debug mode"]
212pub type LCD_LVDS_DEBUG_MODE_R = crate::BitReader<LCD_LVDS_DEBUG_MODE_A>;
213#[doc = "Set the output signal in debug mode\n\nValue on reset: 0"]
214#[derive(Clone, Copy, Debug, PartialEq, Eq)]
215pub enum LCD_LVDS_DEBUG_MODE_A {
216    #[doc = "0: Mode0--Random data"]
217    M_ODE0 = 0,
218    #[doc = "1: Mode1--Output CLK period=7/2 LVDS CLK period"]
219    M_ODE1_O_UTPUT = 1,
220}
221impl From<LCD_LVDS_DEBUG_MODE_A> for bool {
222    #[inline(always)]
223    fn from(variant: LCD_LVDS_DEBUG_MODE_A) -> Self {
224        variant as u8 != 0
225    }
226}
227impl LCD_LVDS_DEBUG_MODE_R {
228    #[doc = "Get enumerated values variant"]
229    #[inline(always)]
230    pub const fn variant(&self) -> LCD_LVDS_DEBUG_MODE_A {
231        match self.bits {
232            false => LCD_LVDS_DEBUG_MODE_A::M_ODE0,
233            true => LCD_LVDS_DEBUG_MODE_A::M_ODE1_O_UTPUT,
234        }
235    }
236    #[doc = "Mode0--Random data"]
237    #[inline(always)]
238    pub fn is_m_ode0(&self) -> bool {
239        *self == LCD_LVDS_DEBUG_MODE_A::M_ODE0
240    }
241    #[doc = "Mode1--Output CLK period=7/2 LVDS CLK period"]
242    #[inline(always)]
243    pub fn is_m_ode1_o_utput(&self) -> bool {
244        *self == LCD_LVDS_DEBUG_MODE_A::M_ODE1_O_UTPUT
245    }
246}
247#[doc = "Field `lcd_lvds_debug_mode` writer - Set the output signal in debug mode"]
248pub type LCD_LVDS_DEBUG_MODE_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_DEBUG_MODE_A>;
249impl<'a, REG> LCD_LVDS_DEBUG_MODE_W<'a, REG>
250where
251    REG: crate::Writable + crate::RegisterSpec,
252{
253    #[doc = "Mode0--Random data"]
254    #[inline(always)]
255    pub fn m_ode0(self) -> &'a mut crate::W<REG> {
256        self.variant(LCD_LVDS_DEBUG_MODE_A::M_ODE0)
257    }
258    #[doc = "Mode1--Output CLK period=7/2 LVDS CLK period"]
259    #[inline(always)]
260    pub fn m_ode1_o_utput(self) -> &'a mut crate::W<REG> {
261        self.variant(LCD_LVDS_DEBUG_MODE_A::M_ODE1_O_UTPUT)
262    }
263}
264#[doc = "Field `lcd_lvds_debug_en` reader - Enable LVDS debug function"]
265pub type LCD_LVDS_DEBUG_EN_R = crate::BitReader<LCD_LVDS_DEBUG_EN_A>;
266#[doc = "Enable LVDS debug function\n\nValue on reset: 0"]
267#[derive(Clone, Copy, Debug, PartialEq, Eq)]
268pub enum LCD_LVDS_DEBUG_EN_A {
269    #[doc = "0: Disable"]
270    DISABLE = 0,
271    #[doc = "1: Enable"]
272    ENABLE = 1,
273}
274impl From<LCD_LVDS_DEBUG_EN_A> for bool {
275    #[inline(always)]
276    fn from(variant: LCD_LVDS_DEBUG_EN_A) -> Self {
277        variant as u8 != 0
278    }
279}
280impl LCD_LVDS_DEBUG_EN_R {
281    #[doc = "Get enumerated values variant"]
282    #[inline(always)]
283    pub const fn variant(&self) -> LCD_LVDS_DEBUG_EN_A {
284        match self.bits {
285            false => LCD_LVDS_DEBUG_EN_A::DISABLE,
286            true => LCD_LVDS_DEBUG_EN_A::ENABLE,
287        }
288    }
289    #[doc = "Disable"]
290    #[inline(always)]
291    pub fn is_disable(&self) -> bool {
292        *self == LCD_LVDS_DEBUG_EN_A::DISABLE
293    }
294    #[doc = "Enable"]
295    #[inline(always)]
296    pub fn is_enable(&self) -> bool {
297        *self == LCD_LVDS_DEBUG_EN_A::ENABLE
298    }
299}
300#[doc = "Field `lcd_lvds_debug_en` writer - Enable LVDS debug function"]
301pub type LCD_LVDS_DEBUG_EN_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_DEBUG_EN_A>;
302impl<'a, REG> LCD_LVDS_DEBUG_EN_W<'a, REG>
303where
304    REG: crate::Writable + crate::RegisterSpec,
305{
306    #[doc = "Disable"]
307    #[inline(always)]
308    pub fn disable(self) -> &'a mut crate::W<REG> {
309        self.variant(LCD_LVDS_DEBUG_EN_A::DISABLE)
310    }
311    #[doc = "Enable"]
312    #[inline(always)]
313    pub fn enable(self) -> &'a mut crate::W<REG> {
314        self.variant(LCD_LVDS_DEBUG_EN_A::ENABLE)
315    }
316}
317#[doc = "Field `lcd_lvds_bitwidth` reader - Set the bit width of data"]
318pub type LCD_LVDS_BITWIDTH_R = crate::BitReader<LCD_LVDS_BITWIDTH_A>;
319#[doc = "Set the bit width of data\n\nValue on reset: 0"]
320#[derive(Clone, Copy, Debug, PartialEq, Eq)]
321pub enum LCD_LVDS_BITWIDTH_A {
322    #[doc = "0: 24-bit"]
323    _24_BIT = 0,
324    #[doc = "1: 18-bit"]
325    _18_BIT = 1,
326}
327impl From<LCD_LVDS_BITWIDTH_A> for bool {
328    #[inline(always)]
329    fn from(variant: LCD_LVDS_BITWIDTH_A) -> Self {
330        variant as u8 != 0
331    }
332}
333impl LCD_LVDS_BITWIDTH_R {
334    #[doc = "Get enumerated values variant"]
335    #[inline(always)]
336    pub const fn variant(&self) -> LCD_LVDS_BITWIDTH_A {
337        match self.bits {
338            false => LCD_LVDS_BITWIDTH_A::_24_BIT,
339            true => LCD_LVDS_BITWIDTH_A::_18_BIT,
340        }
341    }
342    #[doc = "24-bit"]
343    #[inline(always)]
344    pub fn is_24_bit(&self) -> bool {
345        *self == LCD_LVDS_BITWIDTH_A::_24_BIT
346    }
347    #[doc = "18-bit"]
348    #[inline(always)]
349    pub fn is_18_bit(&self) -> bool {
350        *self == LCD_LVDS_BITWIDTH_A::_18_BIT
351    }
352}
353#[doc = "Field `lcd_lvds_bitwidth` writer - Set the bit width of data"]
354pub type LCD_LVDS_BITWIDTH_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_BITWIDTH_A>;
355impl<'a, REG> LCD_LVDS_BITWIDTH_W<'a, REG>
356where
357    REG: crate::Writable + crate::RegisterSpec,
358{
359    #[doc = "24-bit"]
360    #[inline(always)]
361    pub fn _24_bit(self) -> &'a mut crate::W<REG> {
362        self.variant(LCD_LVDS_BITWIDTH_A::_24_BIT)
363    }
364    #[doc = "18-bit"]
365    #[inline(always)]
366    pub fn _18_bit(self) -> &'a mut crate::W<REG> {
367        self.variant(LCD_LVDS_BITWIDTH_A::_18_BIT)
368    }
369}
370#[doc = "Field `lcd_lvds_mode` reader - Set the LVDS data mode"]
371pub type LCD_LVDS_MODE_R = crate::BitReader<LCD_LVDS_MODE_A>;
372#[doc = "Set the LVDS data mode\n\nValue on reset: 0"]
373#[derive(Clone, Copy, Debug, PartialEq, Eq)]
374pub enum LCD_LVDS_MODE_A {
375    #[doc = "0: NS mode"]
376    NS_MODE = 0,
377    #[doc = "1: JEIDA mode"]
378    JEIDA_MODE = 1,
379}
380impl From<LCD_LVDS_MODE_A> for bool {
381    #[inline(always)]
382    fn from(variant: LCD_LVDS_MODE_A) -> Self {
383        variant as u8 != 0
384    }
385}
386impl LCD_LVDS_MODE_R {
387    #[doc = "Get enumerated values variant"]
388    #[inline(always)]
389    pub const fn variant(&self) -> LCD_LVDS_MODE_A {
390        match self.bits {
391            false => LCD_LVDS_MODE_A::NS_MODE,
392            true => LCD_LVDS_MODE_A::JEIDA_MODE,
393        }
394    }
395    #[doc = "NS mode"]
396    #[inline(always)]
397    pub fn is_ns_mode(&self) -> bool {
398        *self == LCD_LVDS_MODE_A::NS_MODE
399    }
400    #[doc = "JEIDA mode"]
401    #[inline(always)]
402    pub fn is_jeida_mode(&self) -> bool {
403        *self == LCD_LVDS_MODE_A::JEIDA_MODE
404    }
405}
406#[doc = "Field `lcd_lvds_mode` writer - Set the LVDS data mode"]
407pub type LCD_LVDS_MODE_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_MODE_A>;
408impl<'a, REG> LCD_LVDS_MODE_W<'a, REG>
409where
410    REG: crate::Writable + crate::RegisterSpec,
411{
412    #[doc = "NS mode"]
413    #[inline(always)]
414    pub fn ns_mode(self) -> &'a mut crate::W<REG> {
415        self.variant(LCD_LVDS_MODE_A::NS_MODE)
416    }
417    #[doc = "JEIDA mode"]
418    #[inline(always)]
419    pub fn jeida_mode(self) -> &'a mut crate::W<REG> {
420        self.variant(LCD_LVDS_MODE_A::JEIDA_MODE)
421    }
422}
423#[doc = "Field `lcd_lvds_dir` reader - Set the LVDS direction"]
424pub type LCD_LVDS_DIR_R = crate::BitReader<LCD_LVDS_DIR_A>;
425#[doc = "Set the LVDS direction\n\nValue on reset: 0"]
426#[derive(Clone, Copy, Debug, PartialEq, Eq)]
427pub enum LCD_LVDS_DIR_A {
428    #[doc = "0: Normal"]
429    NORMAL = 0,
430    #[doc = "1: Reverse"]
431    REVERSE = 1,
432}
433impl From<LCD_LVDS_DIR_A> for bool {
434    #[inline(always)]
435    fn from(variant: LCD_LVDS_DIR_A) -> Self {
436        variant as u8 != 0
437    }
438}
439impl LCD_LVDS_DIR_R {
440    #[doc = "Get enumerated values variant"]
441    #[inline(always)]
442    pub const fn variant(&self) -> LCD_LVDS_DIR_A {
443        match self.bits {
444            false => LCD_LVDS_DIR_A::NORMAL,
445            true => LCD_LVDS_DIR_A::REVERSE,
446        }
447    }
448    #[doc = "Normal"]
449    #[inline(always)]
450    pub fn is_normal(&self) -> bool {
451        *self == LCD_LVDS_DIR_A::NORMAL
452    }
453    #[doc = "Reverse"]
454    #[inline(always)]
455    pub fn is_reverse(&self) -> bool {
456        *self == LCD_LVDS_DIR_A::REVERSE
457    }
458}
459#[doc = "Field `lcd_lvds_dir` writer - Set the LVDS direction"]
460pub type LCD_LVDS_DIR_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_DIR_A>;
461impl<'a, REG> LCD_LVDS_DIR_W<'a, REG>
462where
463    REG: crate::Writable + crate::RegisterSpec,
464{
465    #[doc = "Normal"]
466    #[inline(always)]
467    pub fn normal(self) -> &'a mut crate::W<REG> {
468        self.variant(LCD_LVDS_DIR_A::NORMAL)
469    }
470    #[doc = "Reverse"]
471    #[inline(always)]
472    pub fn reverse(self) -> &'a mut crate::W<REG> {
473        self.variant(LCD_LVDS_DIR_A::REVERSE)
474    }
475}
476#[doc = "Field `lcd_lvds_even_odd_dir` reader - Set the order of even field and odd field"]
477pub type LCD_LVDS_EVEN_ODD_DIR_R = crate::BitReader<LCD_LVDS_EVEN_ODD_DIR_A>;
478#[doc = "Set the order of even field and odd field\n\nValue on reset: 0"]
479#[derive(Clone, Copy, Debug, PartialEq, Eq)]
480pub enum LCD_LVDS_EVEN_ODD_DIR_A {
481    #[doc = "0: normal"]
482    NORMAL = 0,
483    #[doc = "1: reverse"]
484    REVERSE = 1,
485}
486impl From<LCD_LVDS_EVEN_ODD_DIR_A> for bool {
487    #[inline(always)]
488    fn from(variant: LCD_LVDS_EVEN_ODD_DIR_A) -> Self {
489        variant as u8 != 0
490    }
491}
492impl LCD_LVDS_EVEN_ODD_DIR_R {
493    #[doc = "Get enumerated values variant"]
494    #[inline(always)]
495    pub const fn variant(&self) -> LCD_LVDS_EVEN_ODD_DIR_A {
496        match self.bits {
497            false => LCD_LVDS_EVEN_ODD_DIR_A::NORMAL,
498            true => LCD_LVDS_EVEN_ODD_DIR_A::REVERSE,
499        }
500    }
501    #[doc = "normal"]
502    #[inline(always)]
503    pub fn is_normal(&self) -> bool {
504        *self == LCD_LVDS_EVEN_ODD_DIR_A::NORMAL
505    }
506    #[doc = "reverse"]
507    #[inline(always)]
508    pub fn is_reverse(&self) -> bool {
509        *self == LCD_LVDS_EVEN_ODD_DIR_A::REVERSE
510    }
511}
512#[doc = "Field `lcd_lvds_even_odd_dir` writer - Set the order of even field and odd field"]
513pub type LCD_LVDS_EVEN_ODD_DIR_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_EVEN_ODD_DIR_A>;
514impl<'a, REG> LCD_LVDS_EVEN_ODD_DIR_W<'a, REG>
515where
516    REG: crate::Writable + crate::RegisterSpec,
517{
518    #[doc = "normal"]
519    #[inline(always)]
520    pub fn normal(self) -> &'a mut crate::W<REG> {
521        self.variant(LCD_LVDS_EVEN_ODD_DIR_A::NORMAL)
522    }
523    #[doc = "reverse"]
524    #[inline(always)]
525    pub fn reverse(self) -> &'a mut crate::W<REG> {
526        self.variant(LCD_LVDS_EVEN_ODD_DIR_A::REVERSE)
527    }
528}
529#[doc = "Field `lcd_lvds_link` reader - Select work in single link mode or dual link mode"]
530pub type LCD_LVDS_LINK_R = crate::BitReader<LCD_LVDS_LINK_A>;
531#[doc = "Select work in single link mode or dual link mode\n\nValue on reset: 0"]
532#[derive(Clone, Copy, Debug, PartialEq, Eq)]
533pub enum LCD_LVDS_LINK_A {
534    #[doc = "0: Single link"]
535    S_INGLE = 0,
536    #[doc = "1: Dual link"]
537    D_UAL = 1,
538}
539impl From<LCD_LVDS_LINK_A> for bool {
540    #[inline(always)]
541    fn from(variant: LCD_LVDS_LINK_A) -> Self {
542        variant as u8 != 0
543    }
544}
545impl LCD_LVDS_LINK_R {
546    #[doc = "Get enumerated values variant"]
547    #[inline(always)]
548    pub const fn variant(&self) -> LCD_LVDS_LINK_A {
549        match self.bits {
550            false => LCD_LVDS_LINK_A::S_INGLE,
551            true => LCD_LVDS_LINK_A::D_UAL,
552        }
553    }
554    #[doc = "Single link"]
555    #[inline(always)]
556    pub fn is_s_ingle(&self) -> bool {
557        *self == LCD_LVDS_LINK_A::S_INGLE
558    }
559    #[doc = "Dual link"]
560    #[inline(always)]
561    pub fn is_d_ual(&self) -> bool {
562        *self == LCD_LVDS_LINK_A::D_UAL
563    }
564}
565#[doc = "Field `lcd_lvds_link` writer - Select work in single link mode or dual link mode"]
566pub type LCD_LVDS_LINK_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_LINK_A>;
567impl<'a, REG> LCD_LVDS_LINK_W<'a, REG>
568where
569    REG: crate::Writable + crate::RegisterSpec,
570{
571    #[doc = "Single link"]
572    #[inline(always)]
573    pub fn s_ingle(self) -> &'a mut crate::W<REG> {
574        self.variant(LCD_LVDS_LINK_A::S_INGLE)
575    }
576    #[doc = "Dual link"]
577    #[inline(always)]
578    pub fn d_ual(self) -> &'a mut crate::W<REG> {
579        self.variant(LCD_LVDS_LINK_A::D_UAL)
580    }
581}
582#[doc = "Field `lcd_lvds_en` reader - Enable LVDS interface"]
583pub type LCD_LVDS_EN_R = crate::BitReader<LCD_LVDS_EN_A>;
584#[doc = "Enable LVDS interface\n\nValue on reset: 0"]
585#[derive(Clone, Copy, Debug, PartialEq, Eq)]
586pub enum LCD_LVDS_EN_A {
587    #[doc = "0: Disable"]
588    DISABLE = 0,
589    #[doc = "1: Enable"]
590    ENABLE = 1,
591}
592impl From<LCD_LVDS_EN_A> for bool {
593    #[inline(always)]
594    fn from(variant: LCD_LVDS_EN_A) -> Self {
595        variant as u8 != 0
596    }
597}
598impl LCD_LVDS_EN_R {
599    #[doc = "Get enumerated values variant"]
600    #[inline(always)]
601    pub const fn variant(&self) -> LCD_LVDS_EN_A {
602        match self.bits {
603            false => LCD_LVDS_EN_A::DISABLE,
604            true => LCD_LVDS_EN_A::ENABLE,
605        }
606    }
607    #[doc = "Disable"]
608    #[inline(always)]
609    pub fn is_disable(&self) -> bool {
610        *self == LCD_LVDS_EN_A::DISABLE
611    }
612    #[doc = "Enable"]
613    #[inline(always)]
614    pub fn is_enable(&self) -> bool {
615        *self == LCD_LVDS_EN_A::ENABLE
616    }
617}
618#[doc = "Field `lcd_lvds_en` writer - Enable LVDS interface"]
619pub type LCD_LVDS_EN_W<'a, REG> = crate::BitWriter<'a, REG, LCD_LVDS_EN_A>;
620impl<'a, REG> LCD_LVDS_EN_W<'a, REG>
621where
622    REG: crate::Writable + crate::RegisterSpec,
623{
624    #[doc = "Disable"]
625    #[inline(always)]
626    pub fn disable(self) -> &'a mut crate::W<REG> {
627        self.variant(LCD_LVDS_EN_A::DISABLE)
628    }
629    #[doc = "Enable"]
630    #[inline(always)]
631    pub fn enable(self) -> &'a mut crate::W<REG> {
632        self.variant(LCD_LVDS_EN_A::ENABLE)
633    }
634}
635impl R {
636    #[doc = "Bits 0:3 - Set the data polarity of LVDS"]
637    #[inline(always)]
638    pub fn lcd_lvds_data_pol(&self) -> LCD_LVDS_DATA_POL_R {
639        LCD_LVDS_DATA_POL_R::new((self.bits & 0x0f) as u8)
640    }
641    #[doc = "Bit 4 - Set the clock polarity of LVDS"]
642    #[inline(always)]
643    pub fn lcd_lvds_clk_pol(&self) -> LCD_LVDS_CLK_POL_R {
644        LCD_LVDS_CLK_POL_R::new(((self.bits >> 4) & 1) != 0)
645    }
646    #[doc = "Bit 20 - Select the clock source of LVDS"]
647    #[inline(always)]
648    pub fn lcd_lvds_clk_sel(&self) -> LCD_LVDS_CLK_SEL_R {
649        LCD_LVDS_CLK_SEL_R::new(((self.bits >> 20) & 1) != 0)
650    }
651    #[doc = "Bit 23 - Set the LVDS correct mode"]
652    #[inline(always)]
653    pub fn lcd_lvds_correct_mode(&self) -> LCD_LVDS_CORRECT_MODE_R {
654        LCD_LVDS_CORRECT_MODE_R::new(((self.bits >> 23) & 1) != 0)
655    }
656    #[doc = "Bit 24 - Set the output signal in debug mode"]
657    #[inline(always)]
658    pub fn lcd_lvds_debug_mode(&self) -> LCD_LVDS_DEBUG_MODE_R {
659        LCD_LVDS_DEBUG_MODE_R::new(((self.bits >> 24) & 1) != 0)
660    }
661    #[doc = "Bit 25 - Enable LVDS debug function"]
662    #[inline(always)]
663    pub fn lcd_lvds_debug_en(&self) -> LCD_LVDS_DEBUG_EN_R {
664        LCD_LVDS_DEBUG_EN_R::new(((self.bits >> 25) & 1) != 0)
665    }
666    #[doc = "Bit 26 - Set the bit width of data"]
667    #[inline(always)]
668    pub fn lcd_lvds_bitwidth(&self) -> LCD_LVDS_BITWIDTH_R {
669        LCD_LVDS_BITWIDTH_R::new(((self.bits >> 26) & 1) != 0)
670    }
671    #[doc = "Bit 27 - Set the LVDS data mode"]
672    #[inline(always)]
673    pub fn lcd_lvds_mode(&self) -> LCD_LVDS_MODE_R {
674        LCD_LVDS_MODE_R::new(((self.bits >> 27) & 1) != 0)
675    }
676    #[doc = "Bit 28 - Set the LVDS direction"]
677    #[inline(always)]
678    pub fn lcd_lvds_dir(&self) -> LCD_LVDS_DIR_R {
679        LCD_LVDS_DIR_R::new(((self.bits >> 28) & 1) != 0)
680    }
681    #[doc = "Bit 29 - Set the order of even field and odd field"]
682    #[inline(always)]
683    pub fn lcd_lvds_even_odd_dir(&self) -> LCD_LVDS_EVEN_ODD_DIR_R {
684        LCD_LVDS_EVEN_ODD_DIR_R::new(((self.bits >> 29) & 1) != 0)
685    }
686    #[doc = "Bit 30 - Select work in single link mode or dual link mode"]
687    #[inline(always)]
688    pub fn lcd_lvds_link(&self) -> LCD_LVDS_LINK_R {
689        LCD_LVDS_LINK_R::new(((self.bits >> 30) & 1) != 0)
690    }
691    #[doc = "Bit 31 - Enable LVDS interface"]
692    #[inline(always)]
693    pub fn lcd_lvds_en(&self) -> LCD_LVDS_EN_R {
694        LCD_LVDS_EN_R::new(((self.bits >> 31) & 1) != 0)
695    }
696}
697impl W {
698    #[doc = "Bits 0:3 - Set the data polarity of LVDS"]
699    #[inline(always)]
700    #[must_use]
701    pub fn lcd_lvds_data_pol(&mut self) -> LCD_LVDS_DATA_POL_W<LCD_LVDS_IF_SPEC> {
702        LCD_LVDS_DATA_POL_W::new(self, 0)
703    }
704    #[doc = "Bit 4 - Set the clock polarity of LVDS"]
705    #[inline(always)]
706    #[must_use]
707    pub fn lcd_lvds_clk_pol(&mut self) -> LCD_LVDS_CLK_POL_W<LCD_LVDS_IF_SPEC> {
708        LCD_LVDS_CLK_POL_W::new(self, 4)
709    }
710    #[doc = "Bit 20 - Select the clock source of LVDS"]
711    #[inline(always)]
712    #[must_use]
713    pub fn lcd_lvds_clk_sel(&mut self) -> LCD_LVDS_CLK_SEL_W<LCD_LVDS_IF_SPEC> {
714        LCD_LVDS_CLK_SEL_W::new(self, 20)
715    }
716    #[doc = "Bit 23 - Set the LVDS correct mode"]
717    #[inline(always)]
718    #[must_use]
719    pub fn lcd_lvds_correct_mode(&mut self) -> LCD_LVDS_CORRECT_MODE_W<LCD_LVDS_IF_SPEC> {
720        LCD_LVDS_CORRECT_MODE_W::new(self, 23)
721    }
722    #[doc = "Bit 24 - Set the output signal in debug mode"]
723    #[inline(always)]
724    #[must_use]
725    pub fn lcd_lvds_debug_mode(&mut self) -> LCD_LVDS_DEBUG_MODE_W<LCD_LVDS_IF_SPEC> {
726        LCD_LVDS_DEBUG_MODE_W::new(self, 24)
727    }
728    #[doc = "Bit 25 - Enable LVDS debug function"]
729    #[inline(always)]
730    #[must_use]
731    pub fn lcd_lvds_debug_en(&mut self) -> LCD_LVDS_DEBUG_EN_W<LCD_LVDS_IF_SPEC> {
732        LCD_LVDS_DEBUG_EN_W::new(self, 25)
733    }
734    #[doc = "Bit 26 - Set the bit width of data"]
735    #[inline(always)]
736    #[must_use]
737    pub fn lcd_lvds_bitwidth(&mut self) -> LCD_LVDS_BITWIDTH_W<LCD_LVDS_IF_SPEC> {
738        LCD_LVDS_BITWIDTH_W::new(self, 26)
739    }
740    #[doc = "Bit 27 - Set the LVDS data mode"]
741    #[inline(always)]
742    #[must_use]
743    pub fn lcd_lvds_mode(&mut self) -> LCD_LVDS_MODE_W<LCD_LVDS_IF_SPEC> {
744        LCD_LVDS_MODE_W::new(self, 27)
745    }
746    #[doc = "Bit 28 - Set the LVDS direction"]
747    #[inline(always)]
748    #[must_use]
749    pub fn lcd_lvds_dir(&mut self) -> LCD_LVDS_DIR_W<LCD_LVDS_IF_SPEC> {
750        LCD_LVDS_DIR_W::new(self, 28)
751    }
752    #[doc = "Bit 29 - Set the order of even field and odd field"]
753    #[inline(always)]
754    #[must_use]
755    pub fn lcd_lvds_even_odd_dir(&mut self) -> LCD_LVDS_EVEN_ODD_DIR_W<LCD_LVDS_IF_SPEC> {
756        LCD_LVDS_EVEN_ODD_DIR_W::new(self, 29)
757    }
758    #[doc = "Bit 30 - Select work in single link mode or dual link mode"]
759    #[inline(always)]
760    #[must_use]
761    pub fn lcd_lvds_link(&mut self) -> LCD_LVDS_LINK_W<LCD_LVDS_IF_SPEC> {
762        LCD_LVDS_LINK_W::new(self, 30)
763    }
764    #[doc = "Bit 31 - Enable LVDS interface"]
765    #[inline(always)]
766    #[must_use]
767    pub fn lcd_lvds_en(&mut self) -> LCD_LVDS_EN_W<LCD_LVDS_IF_SPEC> {
768        LCD_LVDS_EN_W::new(self, 31)
769    }
770    #[doc = r" Writes raw bits to the register."]
771    #[doc = r""]
772    #[doc = r" # Safety"]
773    #[doc = r""]
774    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
775    #[inline(always)]
776    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
777        self.bits = bits;
778        self
779    }
780}
781#[doc = "LCD LVDS Configure Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lcd_lvds_if::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lcd_lvds_if::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
782pub struct LCD_LVDS_IF_SPEC;
783impl crate::RegisterSpec for LCD_LVDS_IF_SPEC {
784    type Ux = u32;
785}
786#[doc = "`read()` method returns [`lcd_lvds_if::R`](R) reader structure"]
787impl crate::Readable for LCD_LVDS_IF_SPEC {}
788#[doc = "`write(|w| ..)` method takes [`lcd_lvds_if::W`](W) writer structure"]
789impl crate::Writable for LCD_LVDS_IF_SPEC {
790    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
791    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
792}
793#[doc = "`reset()` method sets lcd_lvds_if to value 0"]
794impl crate::Resettable for LCD_LVDS_IF_SPEC {
795    const RESET_VALUE: Self::Ux = 0;
796}
d1_pac/tcon_lcd0/lcd_lvds_if.rs

d1_pac/tcon_lcd0/
lcd_lvds_if.rs
