d1-pac 0.0.32

Peripheral access API for Allwinner D1 SoC generated from unofficial SVD file
Documentation 
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#[doc = "Register `spinlock_systatus` reader"]
pub type R = crate::R<SPINLOCK_SYSTATUS_SPEC>;
#[doc = "Field `iu0` reader - In-Use flag0"]
pub type IU0_R = crate::BitReader<IU0_A>;
#[doc = "In-Use flag0\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum IU0_A {
    #[doc = "0: All lock registers 0-31 are not taken"]
    ALL_NOT_TAKEN = 0,
    #[doc = "1: At least one of the lock registers 0-31 is taken"]
    AT_LEAST_ONE_TAKEN = 1,
}
impl From<IU0_A> for bool {
    #[inline(always)]
    fn from(variant: IU0_A) -> Self {
        variant as u8 != 0
    }
}
impl IU0_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> IU0_A {
        match self.bits {
            false => IU0_A::ALL_NOT_TAKEN,
            true => IU0_A::AT_LEAST_ONE_TAKEN,
        }
    }
    #[doc = "All lock registers 0-31 are not taken"]
    #[inline(always)]
    pub fn is_all_not_taken(&self) -> bool {
        *self == IU0_A::ALL_NOT_TAKEN
    }
    #[doc = "At least one of the lock registers 0-31 is taken"]
    #[inline(always)]
    pub fn is_at_least_one_taken(&self) -> bool {
        *self == IU0_A::AT_LEAST_ONE_TAKEN
    }
}
#[doc = "Field `locks_num` reader - Number of lock registers implemented"]
pub type LOCKS_NUM_R = crate::FieldReader<LOCKS_NUM_A>;
#[doc = "Number of lock registers implemented\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum LOCKS_NUM_A {
    #[doc = "0: 256 lock registers"]
    N256 = 0,
    #[doc = "1: 32 lock registers"]
    N32 = 1,
    #[doc = "2: 64 lock registers"]
    N64 = 2,
    #[doc = "3: 128 lock registers"]
    N128 = 3,
}
impl From<LOCKS_NUM_A> for u8 {
    #[inline(always)]
    fn from(variant: LOCKS_NUM_A) -> Self {
        variant as _
    }
}
impl crate::FieldSpec for LOCKS_NUM_A {
    type Ux = u8;
}
impl LOCKS_NUM_R {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> LOCKS_NUM_A {
        match self.bits {
            0 => LOCKS_NUM_A::N256,
            1 => LOCKS_NUM_A::N32,
            2 => LOCKS_NUM_A::N64,
            3 => LOCKS_NUM_A::N128,
            _ => unreachable!(),
        }
    }
    #[doc = "256 lock registers"]
    #[inline(always)]
    pub fn is_n256(&self) -> bool {
        *self == LOCKS_NUM_A::N256
    }
    #[doc = "32 lock registers"]
    #[inline(always)]
    pub fn is_n32(&self) -> bool {
        *self == LOCKS_NUM_A::N32
    }
    #[doc = "64 lock registers"]
    #[inline(always)]
    pub fn is_n64(&self) -> bool {
        *self == LOCKS_NUM_A::N64
    }
    #[doc = "128 lock registers"]
    #[inline(always)]
    pub fn is_n128(&self) -> bool {
        *self == LOCKS_NUM_A::N128
    }
}
impl R {
    #[doc = "Bit 8 - In-Use flag0"]
    #[inline(always)]
    pub fn iu0(&self) -> IU0_R {
        IU0_R::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bits 28:29 - Number of lock registers implemented"]
    #[inline(always)]
    pub fn locks_num(&self) -> LOCKS_NUM_R {
        LOCKS_NUM_R::new(((self.bits >> 28) & 3) as u8)
    }
}
#[doc = "Spinlock System Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spinlock_systatus::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct SPINLOCK_SYSTATUS_SPEC;
impl crate::RegisterSpec for SPINLOCK_SYSTATUS_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`spinlock_systatus::R`](R) reader structure"]
impl crate::Readable for SPINLOCK_SYSTATUS_SPEC {}
#[doc = "`reset()` method sets spinlock_systatus to value 0"]
impl crate::Resettable for SPINLOCK_SYSTATUS_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}