A crate to interface with the Cyclone V FPGA.
This adds types and functions to access all registers and address maps from the HPS side of a Cyclone-V.
See https://www.intel.com/content/www/us/en/programmable/hps/cyclone-v/index_frames.html for more documentation about the registers.
This crate does not cover 100% of the Cyclone V HPS registers.
Hopefully as more people use this crate more registers will be added.