pub mod app;
pub use app::Fpga;
pub mod bls12_377;
pub mod io;
pub mod precompute;
pub mod preprocess;
pub mod testing;
pub mod timing;
use ark_bls12_377::{Fr, G1Projective};
pub struct App {
pub fpga: Fpga,
len: usize,
pool: Option<rayon::ThreadPool>,
carried: Option<Vec<Scalar>>,
}
#[repr(u64)]
pub enum Command {
StartColumn = 1,
SetDigit = 3,
}
pub type Packet = fpga::Aligned<[u64; 8]>;
pub type Digit = i16;
pub type Limb = u64;
pub type Scalar = [Limb; 4];
#[cfg(feature = "hw")]
pub fn fpga() -> fpga::Result<Fpga> {
Fpga::new(0, 0x500, 0, 0x1_0000_0000)
}
#[cfg(not(feature = "hw"))]
pub fn fpga() -> fpga::Result<Fpga> {
Ok(Fpga::new())
}