csa-rhdl 0.1.0

Carry-save adder compressor trees composed via comp-cat-rs, with hdl-cat backend
Documentation 
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//! Pipeline: hdl-cat circuits that package the CSA gates as
//! clock-domain-typed hardware modules.
//!
//! This module currently provides [`RegisteredCompressor`], a
//! placeholder typestate that associates a const-generic bundle
//! count `M` and width `W` with a registered compressor tree output
//! width.  Full [`Sync`](hdl_cat::sync::Sync) wiring (input
//! register, tree, output register) is deferred to a future
//! revision once the combinational tree lowering is wired through
//! hdl-cat's backend.

use core::marker::PhantomData;

use hdl_cat::signal::ClockDomain;

use crate::width::csa_out_width;

/// A registered compressor tree placeholder.
///
/// The const generics carry the tree parameters at the type level:
/// - `M`: input bundle count.
/// - `W`: input bit width.
/// - `OUT_W`: output width (must equal
///   [`csa_out_width(M, W)`](crate::width::csa_out_width)).
/// - `D`: clock domain.
///
/// Construction uses the type-level invariant; runtime wiring into
/// an hdl-cat [`Sync`](hdl_cat::sync::Sync) circuit is a follow-on
/// task.
#[must_use]
pub struct RegisteredCompressor<
    const M: usize,
    const W: usize,
    const OUT_W: usize,
    D: ClockDomain,
> {
    _phantom: PhantomData<D>,
}

impl<const M: usize, const W: usize, const OUT_W: usize, D: ClockDomain>
    RegisteredCompressor<M, W, OUT_W, D>
{
    /// Construct a new registered compressor.
    pub const fn new() -> Self {
        Self {
            _phantom: PhantomData,
        }
    }

    /// Verify at runtime that `OUT_W` matches the computed width.
    #[must_use]
    pub const fn is_consistent() -> bool {
        OUT_W == csa_out_width(M, W)
    }
}

impl<const M: usize, const W: usize, const OUT_W: usize, D: ClockDomain> Default
    for RegisteredCompressor<M, W, OUT_W, D>
{
    fn default() -> Self {
        Self::new()
    }
}