cs47l63 0.1.0

A Rust driver for the CS47L63 DSP
Documentation 
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#![allow(dead_code)]

// register addresses
pub const CS47L63_DEVID: u32 = 0x000000;
pub const CS47L63_REVID: u32 = 0x000004;
pub const CS47L63_FABID: u32 = 0x000008;
pub const CS47L63_RELID: u32 = 0x00000C;
pub const CS47L63_OTPID: u32 = 0x000010;
pub const CS47L63_SFT_RESET: u32 = 0x000020;
pub const CS47L63_TEST_KEY_CTRL: u32 = 0x000030;
pub const CS47L63_USER_KEY_CTRL: u32 = 0x000034;
pub const CS47L63_CTRL_ASYNC0: u32 = 0x000040;
pub const CS47L63_CTRL_ASYNC1: u32 = 0x000044;
pub const CS47L63_CTRL_ASYNC2: u32 = 0x000048;
pub const CS47L63_CTRL_ASYNC3: u32 = 0x00004C;
pub const CS47L63_CTRL_IF_CONFIG1: u32 = 0x000080;
pub const CS47L63_CTRL_IF_STATUS1: u32 = 0x000084;
pub const CS47L63_CTRL_IF_STATUS2: u32 = 0x000088;
pub const CS47L63_CTRL_IF_CONFIG2: u32 = 0x000090;
pub const CS47L63_CTRL_IF_DEBUG1: u32 = 0x0000A0;
pub const CS47L63_CTRL_IF_DEBUG2: u32 = 0x0000A4;
pub const CS47L63_CTRL_IF_DEBUG3: u32 = 0x0000A8;
pub const CS47L63_CIF_MON1: u32 = 0x0000C0;
pub const CS47L63_CIF_MON2: u32 = 0x0000C4;
pub const CS47L63_CIF_MON_PADDR: u32 = 0x0000C8;
pub const CS47L63_CTRL_IF_SPARE1: u32 = 0x0000D4;
pub const CS47L63_CTRL_IF_I2C: u32 = 0x0000D8;
pub const CS47L63_CTRL_IF_I2C_2_CONTROL: u32 = 0x0000E0;
pub const CS47L63_APB_MSTR_DSP_BRIDGE_ERR: u32 = 0x0000F4;
pub const CS47L63_CIF1_BRIDGE_ERR: u32 = 0x0000F8;
pub const CS47L63_CIF2_BRIDGE_ERR: u32 = 0x0000FC;
pub const CS47L63_OTP_CTRL0: u32 = 0x000400;
pub const CS47L63_OTP_CTRL1: u32 = 0x000404;
pub const CS47L63_OTP_CTRL3: u32 = 0x000408;
pub const CS47L63_OTP_CTRL4: u32 = 0x00040C;
pub const CS47L63_OTP_CTRL5: u32 = 0x000410;
pub const CS47L63_OTP_CTRL6: u32 = 0x000414;
pub const CS47L63_OTP_CTRL7: u32 = 0x000418;
pub const CS47L63_OTP_CTRL8: u32 = 0x00041C;
pub const CS47L63_MCU_CTRL0: u32 = 0x000800;
pub const CS47L63_MCU_CTRL1: u32 = 0x000804;
pub const CS47L63_MCU_CTRL2: u32 = 0x000808;
pub const CS47L63_MCU_CTRL3: u32 = 0x00080C;
pub const CS47L63_MCU_CTRL4: u32 = 0x000810;
pub const CS47L63_MCU_CTRL5: u32 = 0x000814;
pub const CS47L63_GPIO_STATUS1: u32 = 0x000C00;
pub const CS47L63_GPIO1_CTRL1: u32 = 0x000C08;
pub const CS47L63_GPIO2_CTRL1: u32 = 0x000C0C;
pub const CS47L63_GPIO3_CTRL1: u32 = 0x000C10;
pub const CS47L63_GPIO4_CTRL1: u32 = 0x000C14;
pub const CS47L63_GPIO5_CTRL1: u32 = 0x000C18;
pub const CS47L63_GPIO6_CTRL1: u32 = 0x000C1C;
pub const CS47L63_GPIO7_CTRL1: u32 = 0x000C20;
pub const CS47L63_GPIO8_CTRL1: u32 = 0x000C24;
pub const CS47L63_GPIO9_CTRL1: u32 = 0x000C28;
pub const CS47L63_GPIO10_CTRL1: u32 = 0x000C2C;
pub const CS47L63_GPIO11_CTRL1: u32 = 0x000C30;
pub const CS47L63_GPIO12_CTRL1: u32 = 0x000C34;
pub const CS47L63_SPI1_CFG_1: u32 = 0x001004;
pub const CS47L63_OUTPUT_SYS_CLK: u32 = 0x001020;
pub const CS47L63_OUTPUT_ASYNC_CLK: u32 = 0x001024;
pub const CS47L63_CLKGEN_PAD_CTRL: u32 = 0x001030;
pub const CS47L63_PDM_PAD_CTRL: u32 = 0x001034;
pub const CS47L63_MISC_TST_CTRL1: u32 = 0x00103C;
pub const CS47L63_OUTPUT_DSP_CLK: u32 = 0x00104C;
pub const CS47L63_PAD_CTRL_SPARE: u32 = 0x001060;
pub const CS47L63_CLOCK32K: u32 = 0x001400;
pub const CS47L63_SYSTEM_CLOCK1: u32 = 0x001404;
pub const CS47L63_SYSTEM_CLOCK2: u32 = 0x001408;
pub const CS47L63_SYSTEM_CLOCK3: u32 = 0x00140C;
pub const CS47L63_SYSTEM_CLOCK4: u32 = 0x001410;
pub const CS47L63_SYSTEM_CLOCK5: u32 = 0x001414;
pub const CS47L63_SYSTEM_CLOCK6: u32 = 0x001418;
pub const CS47L63_SYSTEM_CLOCK7: u32 = 0x00141C;
pub const CS47L63_SAMPLE_RATE1: u32 = 0x001420;
pub const CS47L63_SAMPLE_RATE2: u32 = 0x001424;
pub const CS47L63_SAMPLE_RATE3: u32 = 0x001428;
pub const CS47L63_SAMPLE_RATE4: u32 = 0x00142C;
pub const CS47L63_SAMPLE_RATE_STATUS1: u32 = 0x001440;
pub const CS47L63_SAMPLE_RATE_STATUS2: u32 = 0x001444;
pub const CS47L63_SAMPLE_RATE_STATUS3: u32 = 0x001448;
pub const CS47L63_SAMPLE_RATE_STATUS4: u32 = 0x00144C;
pub const CS47L63_ASYNC_CLOCK1: u32 = 0x001460;
pub const CS47L63_ASYNC_CLOCK2: u32 = 0x001464;
pub const CS47L63_ASYNC_CLOCK3: u32 = 0x001468;
pub const CS47L63_ASYNC_CLOCK4: u32 = 0x00146C;
pub const CS47L63_ASYNC_CLOCK5: u32 = 0x001470;
pub const CS47L63_ASYNC_CLOCK6: u32 = 0x001474;
pub const CS47L63_ASYNC_SAMPLE_RATE1: u32 = 0x001480;
pub const CS47L63_ASYNC_SAMPLE_RATE2: u32 = 0x001484;
pub const CS47L63_ASYNC_SAMPLE_RATE_STATUS1: u32 = 0x0014A0;
pub const CS47L63_ASYNC_SAMPLE_RATE_STATUS2: u32 = 0x0014A4;
pub const CS47L63_DSP_CLOCK1: u32 = 0x001510;
pub const CS47L63_DSP_CLOCK2: u32 = 0x001514;
pub const CS47L63_DSP_CLOCK3: u32 = 0x00151C;
pub const CS47L63_DSP_CLOCK4: u32 = 0x001520;
pub const CS47L63_DSP_CLOCK5: u32 = 0x001524;
pub const CS47L63_DSP_CLOCK6: u32 = 0x001528;
pub const CS47L63_RATE_ESTIMATOR1: u32 = 0x001530;
pub const CS47L63_RATE_ESTIMATOR2: u32 = 0x001534;
pub const CS47L63_RATE_ESTIMATOR3: u32 = 0x001538;
pub const CS47L63_RATE_ESTIMATOR4: u32 = 0x00153C;
pub const CS47L63_RATE_ESTIMATOR5: u32 = 0x001540;
pub const CS47L63_RATE_ESTIMATOR6: u32 = 0x001544;
pub const CS47L63_RATE_ESTIMATOR7: u32 = 0x001548;
pub const CS47L63_FLL1_CONTROL1: u32 = 0x001C00;
pub const CS47L63_FLL1_CONTROL2: u32 = 0x001C04;
pub const CS47L63_FLL1_CONTROL3: u32 = 0x001C08;
pub const CS47L63_FLL1_CONTROL4: u32 = 0x001C0C;
pub const CS47L63_FLL1_CONTROL5: u32 = 0x001C10;
pub const CS47L63_FLL1_CONTROL6: u32 = 0x001C14;
pub const CS47L63_FLL1_CONTROL7: u32 = 0x001C18;
pub const CS47L63_FLL1_DIGITAL_TEST1: u32 = 0x001C30;
pub const CS47L63_FLL1_DIGITAL_TEST2: u32 = 0x001C34;
pub const CS47L63_FLL1_DIGITAL_TEST3: u32 = 0x001C38;
pub const CS47L63_FLL1_DIGITAL_TEST4: u32 = 0x001C3C;
pub const CS47L63_FLL1_DIGITAL_TEST5: u32 = 0x001C40;
pub const CS47L63_FLL1_ANALOGUE_TEST1: u32 = 0x001C48;
pub const CS47L63_FLL1_GPIO_CLOCK: u32 = 0x001CA0;
pub const CS47L63_FLL2_CONTROL1: u32 = 0x001D00;
pub const CS47L63_FLL2_CONTROL2: u32 = 0x001D04;
pub const CS47L63_FLL2_CONTROL3: u32 = 0x001D08;
pub const CS47L63_FLL2_CONTROL4: u32 = 0x001D0C;
pub const CS47L63_FLL2_CONTROL5: u32 = 0x001D10;
pub const CS47L63_FLL2_CONTROL6: u32 = 0x001D14;
pub const CS47L63_FLL2_CONTROL7: u32 = 0x001D18;
pub const CS47L63_FLL2_DIGITAL_TEST1: u32 = 0x001D30;
pub const CS47L63_FLL2_DIGITAL_TEST2: u32 = 0x001D34;
pub const CS47L63_FLL2_DIGITAL_TEST3: u32 = 0x001D38;
pub const CS47L63_FLL2_DIGITAL_TEST4: u32 = 0x001D3C;
pub const CS47L63_FLL2_DIGITAL_TEST5: u32 = 0x001D40;
pub const CS47L63_FLL2_ANALOGUE_TEST1: u32 = 0x001D48;
pub const CS47L63_FLL2_GPIO_CLOCK: u32 = 0x001DA0;
pub const CS47L63_OTP_PROM: u32 = 0x002404;
pub const CS47L63_LDO2_CTRL1: u32 = 0x002408;
pub const CS47L63_MICBIAS_CTRL1: u32 = 0x002410;
pub const CS47L63_MICBIAS_CTRL5: u32 = 0x002418;
pub const CS47L63_MICBIAS_TST_CTRL1: u32 = 0x002420;
pub const CS47L63_MICBIAS_TST_CTRL4: u32 = 0x002424;
pub const CS47L63_MICBIAS_STATUS1: u32 = 0x002428;
pub const CS47L63_HP1L_CTRL: u32 = 0x002430;
pub const CS47L63_HP_OCD_CTRL1: u32 = 0x0024AC;
pub const CS47L63_HP_OCD_STAT1: u32 = 0x0024B0;
pub const CS47L63_HP_OCD_TEST1: u32 = 0x0024B4;
pub const CS47L63_HP_OCD_TEST2: u32 = 0x0024B8;
pub const CS47L63_BANDGAP_CONTROL1: u32 = 0x002600;
pub const CS47L63_BANDGAP_CONTROL2: u32 = 0x002604;
pub const CS47L63_RCO_CTRL1: u32 = 0x002620;
pub const CS47L63_RCO_CTRL2: u32 = 0x002624;
pub const CS47L63_SUB_ANA_SPARE: u32 = 0x002670;
pub const CS47L63_ADC_TST1: u32 = 0x002674;
pub const CS47L63_DAC_FILTP_CTRL: u32 = 0x002678;
pub const CS47L63_MICD_CLAMP_CONTROL: u32 = 0x002700;
pub const CS47L63_MICB_AOD_CTRL: u32 = 0x002708;
pub const CS47L63_IRQ1_CTRL_AOD: u32 = 0x002710;
pub const CS47L63_AOD_PAD_CTRL: u32 = 0x002718;
pub const CS47L63_IRQ1_EINT_AOD: u32 = 0x002720;
pub const CS47L63_IRQ1_MASK_AOD: u32 = 0x002728;
pub const CS47L63_INPUT_CONTROL: u32 = 0x004000;
pub const CS47L63_INPUT_STATUS: u32 = 0x004004;
pub const CS47L63_INPUT_RATE_CONTROL: u32 = 0x004008;
pub const CS47L63_INPUT_CONTROL2: u32 = 0x00400C;
pub const CS47L63_DMIC_TEST: u32 = 0x004010;
pub const CS47L63_INPUT_CONTROL3: u32 = 0x004014;
pub const CS47L63_INPUT1_CONTROL1: u32 = 0x004020;
pub const CS47L63_IN1L_CONTROL1: u32 = 0x004024;
pub const CS47L63_IN1L_CONTROL2: u32 = 0x004028;
pub const CS47L63_IN1R_CONTROL1: u32 = 0x004044;
pub const CS47L63_IN1R_CONTROL2: u32 = 0x004048;
pub const CS47L63_INPUT2_CONTROL1: u32 = 0x004060;
pub const CS47L63_IN2L_CONTROL1: u32 = 0x004064;
pub const CS47L63_IN2L_CONTROL2: u32 = 0x004068;
pub const CS47L63_IN2R_CONTROL1: u32 = 0x004084;
pub const CS47L63_IN2R_CONTROL2: u32 = 0x004088;
pub const CS47L63_IN_SIG_DET_CONTROL: u32 = 0x004240;
pub const CS47L63_INPUT_HPF_CONTROL: u32 = 0x004244;
pub const CS47L63_INPUT_VOL_CONTROL: u32 = 0x004248;
pub const CS47L63_ANC_SRC: u32 = 0x004280;
pub const CS47L63_ADC_ANA_CONTROL4: u32 = 0x0042BC;
pub const CS47L63_INPUT_DITH_CONTROL: u32 = 0x004400;
pub const CS47L63_IN1_CIC_TEST: u32 = 0x004464;
pub const CS47L63_IN2_CIC_TEST: u32 = 0x004468;
pub const CS47L63_INPUT_MIDMODE_CONTROL: u32 = 0x00449C;
pub const CS47L63_INPUT_TEST1: u32 = 0x0044B0;
pub const CS47L63_INPUT_TEST2: u32 = 0x0044B4;
pub const CS47L63_ADC_VCO_CAL1: u32 = 0x0044C0;
pub const CS47L63_ADC_TEST1: u32 = 0x0044C4;
pub const CS47L63_ADC_TEST2: u32 = 0x0044C8;
pub const CS47L63_ADC_CAP_TRIM: u32 = 0x0044CC;
pub const CS47L63_ADC1L_TRIM_RD: u32 = 0x0044D0;
pub const CS47L63_ADC1R_TRIM_RD: u32 = 0x0044D4;
pub const CS47L63_ADC2L_TRIM_RD: u32 = 0x0044D8;
pub const CS47L63_ADC2R_TRIM_RD: u32 = 0x0044DC;
pub const CS47L63_ADC_QUICK_CHARGE1: u32 = 0x0044F8;
pub const CS47L63_ADC_QUICK_CHARGE2: u32 = 0x0044FC;
pub const CS47L63_ADC_DAC_CONTROL: u32 = 0x004600;
pub const CS47L63_ADC_DITH_CONTROL: u32 = 0x004604;
pub const CS47L63_ADC_INTEG_CTRL: u32 = 0x004608;
pub const CS47L63_ADC_INTEG_STATUS: u32 = 0x00460C;
pub const CS47L63_ADC_VCO_CAL2: u32 = 0x004610;
pub const CS47L63_ADC_VCO_CAL3: u32 = 0x004614;
pub const CS47L63_ADC_VCO_CAL4: u32 = 0x004618;
pub const CS47L63_ADC_VCO_TRIM1: u32 = 0x004620;
pub const CS47L63_ADC_VCO_COUNT1: u32 = 0x004624;
pub const CS47L63_ADC_VCO_TRIM2: u32 = 0x004628;
pub const CS47L63_ADC_VCO_COUNT2: u32 = 0x00462C;
pub const CS47L63_ADC_VCO_TRIM3: u32 = 0x004630;
pub const CS47L63_ADC_VCO_COUNT3: u32 = 0x004634;
pub const CS47L63_ADC_VCO_TRIM4: u32 = 0x004638;
pub const CS47L63_ADC_VCO_COUNT4: u32 = 0x00463C;
pub const CS47L63_ADC_VCO_CAL10: u32 = 0x004660;
pub const CS47L63_ADC_VCO_CAL11: u32 = 0x004664;
pub const CS47L63_ADC_VCO_CAL12: u32 = 0x004668;
pub const CS47L63_ADC_VCO_CAL13: u32 = 0x00466C;
pub const CS47L63_ADC_VCO_CAL14: u32 = 0x004670;
pub const CS47L63_ADC_TEST3: u32 = 0x004680;
pub const CS47L63_ADC_TEST4: u32 = 0x004684;
pub const CS47L63_ADC1L_ANA_CONTROL1: u32 = 0x004688;
pub const CS47L63_ADC1R_ANA_CONTROL1: u32 = 0x00468C;
pub const CS47L63_ADC2L_ANA_CONTROL1: u32 = 0x004690;
pub const CS47L63_ADC2R_ANA_CONTROL1: u32 = 0x004694;
pub const CS47L63_ADC1L_LP_CONTROL1: u32 = 0x0046A0;
pub const CS47L63_ADC1R_LP_CONTROL1: u32 = 0x0046A4;
pub const CS47L63_ADC2L_LP_CONTROL1: u32 = 0x0046A8;
pub const CS47L63_ADC2R_LP_CONTROL1: u32 = 0x0046AC;
pub const CS47L63_ADC_TEST5: u32 = 0x0046C0;
pub const CS47L63_ADC_TEST6: u32 = 0x0046C4;
pub const CS47L63_ADC_ANA_CONTROL1: u32 = 0x0046C8;
pub const CS47L63_ADC_ANA_CONTROL2: u32 = 0x0046CC;
pub const CS47L63_ADC_PGA_CONTROL1: u32 = 0x0046D0;
pub const CS47L63_ADC_PGA_TEST: u32 = 0x0046D4;
pub const CS47L63_ADC_PGA_CONTROL2: u32 = 0x0046D8;
pub const CS47L63_ADC_ANA_CONTROL5: u32 = 0x0046DC;
pub const CS47L63_ADC_TEST7: u32 = 0x0046E0;
pub const CS47L63_ADC1LLP_TRIM: u32 = 0x0046F0;
pub const CS47L63_ADC1RLP_TRIM: u32 = 0x0046F4;
pub const CS47L63_ADC2LLP_TRIM: u32 = 0x0046F8;
pub const CS47L63_ADC2RLP_TRIM: u32 = 0x0046FC;
pub const CS47L63_OUTPUT_ENABLE_1: u32 = 0x004804;
pub const CS47L63_OUTPUT_STATUS_1: u32 = 0x004808;
pub const CS47L63_OUTPUT_CONTROL_1: u32 = 0x00480C;
pub const CS47L63_OUTPUT_VOLUME_RAMP: u32 = 0x004810;
pub const CS47L63_OUT1L_ENABLE_1: u32 = 0x004814;
pub const CS47L63_OUT1L_VOLUME_1: u32 = 0x004818;
pub const CS47L63_OUT1L_VOLUME_2: u32 = 0x00481C;
pub const CS47L63_OUT1L_CONTROL_1: u32 = 0x004820;
pub const CS47L63_OUTPUT_AEC_ENABLE_1: u32 = 0x004A18;
pub const CS47L63_OUTPUT_AEC_STATUS_1: u32 = 0x004A1C;
pub const CS47L63_OUTPUT_AEC_CONTROL_1: u32 = 0x004A20;
pub const CS47L63_OUTPUT_NG_CONTROL_1: u32 = 0x004A24;
pub const CS47L63_OUTPUT_ANC_CTRL_1: u32 = 0x004A2C;
pub const CS47L63_OUTPUT_ANC_CTRL_2: u32 = 0x004A30;
pub const CS47L63_DAC_SR_DETECT: u32 = 0x004B00;
pub const CS47L63_DAC_TEST_CONTROL_2: u32 = 0x004B04;
pub const CS47L63_DAC_TEST_1: u32 = 0x004B08;
pub const CS47L63_DAC_TEST_CONTROL_1: u32 = 0x004B20;
pub const CS47L63_OUTPUT_FILTER_CONTROL_1: u32 = 0x004B24;
pub const CS47L63_DAC_COMP_1: u32 = 0x004B30;
pub const CS47L63_DAC_COMP_2: u32 = 0x004B34;
pub const CS47L63_OUT1_COMP_COEFF: u32 = 0x004B3C;
pub const CS47L63_FRF_COEFF_1L_1: u32 = 0x004B60;
pub const CS47L63_FRF_COEFF_1L_2: u32 = 0x004B64;
pub const CS47L63_EDRE_ENABLE: u32 = 0x004CA0;
pub const CS47L63_EDRE_MANUAL: u32 = 0x004CA4;
pub const CS47L63_EDRE1_THRESH_1: u32 = 0x004CA8;
pub const CS47L63_EDRE_DEBOUNCE_1: u32 = 0x004CB0;
pub const CS47L63_EDRE_TEST_1: u32 = 0x004CB4;
pub const CS47L63_EDRE_TEST_3: u32 = 0x004CBC;
pub const CS47L63_DAC_BYP_TEST_1: u32 = 0x004D64;
pub const CS47L63_DAC_IF_CONTROL_1: u32 = 0x004D68;
pub const CS47L63_DAC_IF_CONTROL_2: u32 = 0x004D6C;
pub const CS47L63_DAC_IF_TEST_1: u32 = 0x004D70;
pub const CS47L63_DAC_IF_TRIM_1: u32 = 0x004D74;
pub const CS47L63_DAC_IF_CONTROL_3: u32 = 0x004D78;
pub const CS47L63_ASP1_ENABLES1: u32 = 0x006000;
pub const CS47L63_ASP1_CONTROL1: u32 = 0x006004;
pub const CS47L63_ASP1_CONTROL2: u32 = 0x006008;
pub const CS47L63_ASP1_CONTROL3: u32 = 0x00600C;
pub const CS47L63_ASP1_FRAME_CONTROL1: u32 = 0x006010;
pub const CS47L63_ASP1_FRAME_CONTROL2: u32 = 0x006014;
pub const CS47L63_ASP1_FRAME_CONTROL5: u32 = 0x006020;
pub const CS47L63_ASP1_FRAME_CONTROL6: u32 = 0x006024;
pub const CS47L63_ASP1_DATA_CONTROL1: u32 = 0x006030;
pub const CS47L63_ASP1_DATA_CONTROL5: u32 = 0x006040;
pub const CS47L63_ASP1_LATENCY1: u32 = 0x006050;
pub const CS47L63_ASP1_FSYNC_CONTROL1: u32 = 0x006060;
pub const CS47L63_ASP1_FSYNC_CONTROL2: u32 = 0x006064;
pub const CS47L63_ASP1_FSYNC_STATUS1: u32 = 0x006068;
pub const CS47L63_ASP1_TEST1: u32 = 0x00606C;
pub const CS47L63_ASP1_CLOCK_OVD1: u32 = 0x006070;
pub const CS47L63_ASP2_ENABLES1: u32 = 0x006080;
pub const CS47L63_ASP2_CONTROL1: u32 = 0x006084;
pub const CS47L63_ASP2_CONTROL2: u32 = 0x006088;
pub const CS47L63_ASP2_CONTROL3: u32 = 0x00608C;
pub const CS47L63_ASP2_FRAME_CONTROL1: u32 = 0x006090;
pub const CS47L63_ASP2_FRAME_CONTROL5: u32 = 0x0060A0;
pub const CS47L63_ASP2_DATA_CONTROL1: u32 = 0x0060B0;
pub const CS47L63_ASP2_DATA_CONTROL5: u32 = 0x0060C0;
pub const CS47L63_ASP2_LATENCY1: u32 = 0x0060D0;
pub const CS47L63_ASP2_FSYNC_CONTROL1: u32 = 0x0060E0;
pub const CS47L63_ASP2_FSYNC_CONTROL2: u32 = 0x0060E4;
pub const CS47L63_ASP2_FSYNC_STATUS1: u32 = 0x0060E8;
pub const CS47L63_ASP2_TEST1: u32 = 0x0060EC;
pub const CS47L63_ASP2_CLOCK_OVD1: u32 = 0x0060F0;
pub const CS47L63_MIXER_CLK_OVD: u32 = 0x008000;
pub const CS47L63_MIXER_BYPASS: u32 = 0x008004;
pub const CS47L63_PWM1_INPUT1: u32 = 0x008080;
pub const CS47L63_PWM1_INPUT2: u32 = 0x008084;
pub const CS47L63_PWM1_INPUT3: u32 = 0x008088;
pub const CS47L63_PWM1_INPUT4: u32 = 0x00808C;
pub const CS47L63_PWM2_INPUT1: u32 = 0x008090;
pub const CS47L63_PWM2_INPUT2: u32 = 0x008094;
pub const CS47L63_PWM2_INPUT3: u32 = 0x008098;
pub const CS47L63_PWM2_INPUT4: u32 = 0x00809C;
pub const CS47L63_OUT1L_INPUT1: u32 = 0x008100;
pub const CS47L63_OUT1L_INPUT2: u32 = 0x008104;
pub const CS47L63_OUT1L_INPUT3: u32 = 0x008108;
pub const CS47L63_OUT1L_INPUT4: u32 = 0x00810C;
pub const CS47L63_ASP1TX1_INPUT1: u32 = 0x008200;
pub const CS47L63_ASP1TX1_INPUT2: u32 = 0x008204;
pub const CS47L63_ASP1TX1_INPUT3: u32 = 0x008208;
pub const CS47L63_ASP1TX1_INPUT4: u32 = 0x00820C;
pub const CS47L63_ASP1TX2_INPUT1: u32 = 0x008210;
pub const CS47L63_ASP1TX2_INPUT2: u32 = 0x008214;
pub const CS47L63_ASP1TX2_INPUT3: u32 = 0x008218;
pub const CS47L63_ASP1TX2_INPUT4: u32 = 0x00821C;
pub const CS47L63_ASP1TX3_INPUT1: u32 = 0x008220;
pub const CS47L63_ASP1TX3_INPUT2: u32 = 0x008224;
pub const CS47L63_ASP1TX3_INPUT3: u32 = 0x008228;
pub const CS47L63_ASP1TX3_INPUT4: u32 = 0x00822C;
pub const CS47L63_ASP1TX4_INPUT1: u32 = 0x008230;
pub const CS47L63_ASP1TX4_INPUT2: u32 = 0x008234;
pub const CS47L63_ASP1TX4_INPUT3: u32 = 0x008238;
pub const CS47L63_ASP1TX4_INPUT4: u32 = 0x00823C;
pub const CS47L63_ASP1TX5_INPUT1: u32 = 0x008240;
pub const CS47L63_ASP1TX5_INPUT2: u32 = 0x008244;
pub const CS47L63_ASP1TX5_INPUT3: u32 = 0x008248;
pub const CS47L63_ASP1TX5_INPUT4: u32 = 0x00824C;
pub const CS47L63_ASP1TX6_INPUT1: u32 = 0x008250;
pub const CS47L63_ASP1TX6_INPUT2: u32 = 0x008254;
pub const CS47L63_ASP1TX6_INPUT3: u32 = 0x008258;
pub const CS47L63_ASP1TX6_INPUT4: u32 = 0x00825C;
pub const CS47L63_ASP1TX7_INPUT1: u32 = 0x008260;
pub const CS47L63_ASP1TX7_INPUT2: u32 = 0x008264;
pub const CS47L63_ASP1TX7_INPUT3: u32 = 0x008268;
pub const CS47L63_ASP1TX7_INPUT4: u32 = 0x00826C;
pub const CS47L63_ASP1TX8_INPUT1: u32 = 0x008270;
pub const CS47L63_ASP1TX8_INPUT2: u32 = 0x008274;
pub const CS47L63_ASP1TX8_INPUT3: u32 = 0x008278;
pub const CS47L63_ASP1TX8_INPUT4: u32 = 0x00827C;
pub const CS47L63_ASP2TX1_INPUT1: u32 = 0x008300;
pub const CS47L63_ASP2TX1_INPUT2: u32 = 0x008304;
pub const CS47L63_ASP2TX1_INPUT3: u32 = 0x008308;
pub const CS47L63_ASP2TX1_INPUT4: u32 = 0x00830C;
pub const CS47L63_ASP2TX2_INPUT1: u32 = 0x008310;
pub const CS47L63_ASP2TX2_INPUT2: u32 = 0x008314;
pub const CS47L63_ASP2TX2_INPUT3: u32 = 0x008318;
pub const CS47L63_ASP2TX2_INPUT4: u32 = 0x00831C;
pub const CS47L63_ASP2TX3_INPUT1: u32 = 0x008320;
pub const CS47L63_ASP2TX3_INPUT2: u32 = 0x008324;
pub const CS47L63_ASP2TX3_INPUT3: u32 = 0x008328;
pub const CS47L63_ASP2TX3_INPUT4: u32 = 0x00832C;
pub const CS47L63_ASP2TX4_INPUT1: u32 = 0x008330;
pub const CS47L63_ASP2TX4_INPUT2: u32 = 0x008334;
pub const CS47L63_ASP2TX4_INPUT3: u32 = 0x008338;
pub const CS47L63_ASP2TX4_INPUT4: u32 = 0x00833C;
pub const CS47L63_ASRC1_IN1L_INPUT1: u32 = 0x008880;
pub const CS47L63_ASRC1_IN1R_INPUT1: u32 = 0x008890;
pub const CS47L63_ASRC1_IN2L_INPUT1: u32 = 0x0088A0;
pub const CS47L63_ASRC1_IN2R_INPUT1: u32 = 0x0088B0;
pub const CS47L63_LSRC2_INL_INPUT1: u32 = 0x0088C0;
pub const CS47L63_LSRC2_INR_INPUT1: u32 = 0x0088D0;
pub const CS47L63_LSRC3_INL_INPUT1: u32 = 0x008900;
pub const CS47L63_LSRC3_INR_INPUT1: u32 = 0x008910;
pub const CS47L63_ISRC1INT1_INPUT1: u32 = 0x008980;
pub const CS47L63_ISRC1INT2_INPUT1: u32 = 0x008990;
pub const CS47L63_ISRC1INT3_INPUT1: u32 = 0x0089A0;
pub const CS47L63_ISRC1INT4_INPUT1: u32 = 0x0089B0;
pub const CS47L63_ISRC1DEC1_INPUT1: u32 = 0x0089C0;
pub const CS47L63_ISRC1DEC2_INPUT1: u32 = 0x0089D0;
pub const CS47L63_ISRC1DEC3_INPUT1: u32 = 0x0089E0;
pub const CS47L63_ISRC1DEC4_INPUT1: u32 = 0x0089F0;
pub const CS47L63_ISRC2INT1_INPUT1: u32 = 0x008A00;
pub const CS47L63_ISRC2INT2_INPUT1: u32 = 0x008A10;
pub const CS47L63_ISRC2DEC1_INPUT1: u32 = 0x008A40;
pub const CS47L63_ISRC2DEC2_INPUT1: u32 = 0x008A50;
pub const CS47L63_ISRC3INT1_INPUT1: u32 = 0x008A80;
pub const CS47L63_ISRC3INT2_INPUT1: u32 = 0x008A90;
pub const CS47L63_ISRC3DEC1_INPUT1: u32 = 0x008AC0;
pub const CS47L63_ISRC3DEC2_INPUT1: u32 = 0x008AD0;
pub const CS47L63_EQ1_INPUT1: u32 = 0x008B80;
pub const CS47L63_EQ1_INPUT2: u32 = 0x008B84;
pub const CS47L63_EQ1_INPUT3: u32 = 0x008B88;
pub const CS47L63_EQ1_INPUT4: u32 = 0x008B8C;
pub const CS47L63_EQ2_INPUT1: u32 = 0x008B90;
pub const CS47L63_EQ2_INPUT2: u32 = 0x008B94;
pub const CS47L63_EQ2_INPUT3: u32 = 0x008B98;
pub const CS47L63_EQ2_INPUT4: u32 = 0x008B9C;
pub const CS47L63_EQ3_INPUT1: u32 = 0x008BA0;
pub const CS47L63_EQ3_INPUT2: u32 = 0x008BA4;
pub const CS47L63_EQ3_INPUT3: u32 = 0x008BA8;
pub const CS47L63_EQ3_INPUT4: u32 = 0x008BAC;
pub const CS47L63_EQ4_INPUT1: u32 = 0x008BB0;
pub const CS47L63_EQ4_INPUT2: u32 = 0x008BB4;
pub const CS47L63_EQ4_INPUT3: u32 = 0x008BB8;
pub const CS47L63_EQ4_INPUT4: u32 = 0x008BBC;
pub const CS47L63_DRC1L_INPUT1: u32 = 0x008C00;
pub const CS47L63_DRC1L_INPUT2: u32 = 0x008C04;
pub const CS47L63_DRC1L_INPUT3: u32 = 0x008C08;
pub const CS47L63_DRC1L_INPUT4: u32 = 0x008C0C;
pub const CS47L63_DRC1R_INPUT1: u32 = 0x008C10;
pub const CS47L63_DRC1R_INPUT2: u32 = 0x008C14;
pub const CS47L63_DRC1R_INPUT3: u32 = 0x008C18;
pub const CS47L63_DRC1R_INPUT4: u32 = 0x008C1C;
pub const CS47L63_DRC2L_INPUT1: u32 = 0x008C20;
pub const CS47L63_DRC2L_INPUT2: u32 = 0x008C24;
pub const CS47L63_DRC2L_INPUT3: u32 = 0x008C28;
pub const CS47L63_DRC2L_INPUT4: u32 = 0x008C2C;
pub const CS47L63_DRC2R_INPUT1: u32 = 0x008C30;
pub const CS47L63_DRC2R_INPUT2: u32 = 0x008C34;
pub const CS47L63_DRC2R_INPUT3: u32 = 0x008C38;
pub const CS47L63_DRC2R_INPUT4: u32 = 0x008C3C;
pub const CS47L63_LHPF1_INPUT1: u32 = 0x008C80;
pub const CS47L63_LHPF1_INPUT2: u32 = 0x008C84;
pub const CS47L63_LHPF1_INPUT3: u32 = 0x008C88;
pub const CS47L63_LHPF1_INPUT4: u32 = 0x008C8C;
pub const CS47L63_LHPF2_INPUT1: u32 = 0x008C90;
pub const CS47L63_LHPF2_INPUT2: u32 = 0x008C94;
pub const CS47L63_LHPF2_INPUT3: u32 = 0x008C98;
pub const CS47L63_LHPF2_INPUT4: u32 = 0x008C9C;
pub const CS47L63_LHPF3_INPUT1: u32 = 0x008CA0;
pub const CS47L63_LHPF3_INPUT2: u32 = 0x008CA4;
pub const CS47L63_LHPF3_INPUT3: u32 = 0x008CA8;
pub const CS47L63_LHPF3_INPUT4: u32 = 0x008CAC;
pub const CS47L63_LHPF4_INPUT1: u32 = 0x008CB0;
pub const CS47L63_LHPF4_INPUT2: u32 = 0x008CB4;
pub const CS47L63_LHPF4_INPUT3: u32 = 0x008CB8;
pub const CS47L63_LHPF4_INPUT4: u32 = 0x008CBC;
pub const CS47L63_DSP1RX1_INPUT1: u32 = 0x009000;
pub const CS47L63_DSP1RX1_INPUT2: u32 = 0x009004;
pub const CS47L63_DSP1RX1_INPUT3: u32 = 0x009008;
pub const CS47L63_DSP1RX1_INPUT4: u32 = 0x00900C;
pub const CS47L63_DSP1RX2_INPUT1: u32 = 0x009010;
pub const CS47L63_DSP1RX2_INPUT2: u32 = 0x009014;
pub const CS47L63_DSP1RX2_INPUT3: u32 = 0x009018;
pub const CS47L63_DSP1RX2_INPUT4: u32 = 0x00901C;
pub const CS47L63_DSP1RX3_INPUT1: u32 = 0x009020;
pub const CS47L63_DSP1RX3_INPUT2: u32 = 0x009024;
pub const CS47L63_DSP1RX3_INPUT3: u32 = 0x009028;
pub const CS47L63_DSP1RX3_INPUT4: u32 = 0x00902C;
pub const CS47L63_DSP1RX4_INPUT1: u32 = 0x009030;
pub const CS47L63_DSP1RX4_INPUT2: u32 = 0x009034;
pub const CS47L63_DSP1RX4_INPUT3: u32 = 0x009038;
pub const CS47L63_DSP1RX4_INPUT4: u32 = 0x00903C;
pub const CS47L63_DSP1RX5_INPUT1: u32 = 0x009040;
pub const CS47L63_DSP1RX5_INPUT2: u32 = 0x009044;
pub const CS47L63_DSP1RX5_INPUT3: u32 = 0x009048;
pub const CS47L63_DSP1RX5_INPUT4: u32 = 0x00904C;
pub const CS47L63_DSP1RX6_INPUT1: u32 = 0x009050;
pub const CS47L63_DSP1RX6_INPUT2: u32 = 0x009054;
pub const CS47L63_DSP1RX6_INPUT3: u32 = 0x009058;
pub const CS47L63_DSP1RX6_INPUT4: u32 = 0x00905C;
pub const CS47L63_DSP1RX7_INPUT1: u32 = 0x009060;
pub const CS47L63_DSP1RX7_INPUT2: u32 = 0x009064;
pub const CS47L63_DSP1RX7_INPUT3: u32 = 0x009068;
pub const CS47L63_DSP1RX7_INPUT4: u32 = 0x00906C;
pub const CS47L63_DSP1RX8_INPUT1: u32 = 0x009070;
pub const CS47L63_DSP1RX8_INPUT2: u32 = 0x009074;
pub const CS47L63_DSP1RX8_INPUT3: u32 = 0x009078;
pub const CS47L63_DSP1RX8_INPUT4: u32 = 0x00907C;
pub const CS47L63_ASRC1_ENABLE: u32 = 0x00A000;
pub const CS47L63_ASRC1_STATUS: u32 = 0x00A004;
pub const CS47L63_ASRC1_CONTROL1: u32 = 0x00A008;
pub const CS47L63_ASRC1_DEBUG1: u32 = 0x00A040;
pub const CS47L63_ASRC1_DEBUG2: u32 = 0x00A044;
pub const CS47L63_ASRC1_DEBUG3: u32 = 0x00A048;
pub const CS47L63_ASRC1_DEBUG4: u32 = 0x00A04C;
pub const CS47L63_LSRC2_ENABLE: u32 = 0x00A080;
pub const CS47L63_LSRC2_CONTROL: u32 = 0x00A088;
pub const CS47L63_LSRC2_STATUS_REG0: u32 = 0x00A08C;
pub const CS47L63_LSRC2_TEST_REG0: u32 = 0x00A090;
pub const CS47L63_LSRC2_CONTROL2: u32 = 0x00A094;
pub const CS47L63_LSRC2_TEST_REG6: u32 = 0x00A098;
pub const CS47L63_LSRC2_TEST_REGA: u32 = 0x00A09C;
pub const CS47L63_LSRC2_TEST_REGE: u32 = 0x00A0A0;
pub const CS47L63_LSRC2_TEST_REG12: u32 = 0x00A0A4;
pub const CS47L63_LSRC2_TEST_REG1A: u32 = 0x00A0A8;
pub const CS47L63_LSRC3_ENABLE: u32 = 0x00A100;
pub const CS47L63_LSRC3_CONTROL: u32 = 0x00A108;
pub const CS47L63_LSRC3_STATUS_REG0: u32 = 0x00A10C;
pub const CS47L63_LSRC3_TEST_REG0: u32 = 0x00A110;
pub const CS47L63_LSRC3_CONTROL2: u32 = 0x00A114;
pub const CS47L63_LSRC3_TEST_REG6: u32 = 0x00A118;
pub const CS47L63_LSRC3_TEST_REGA: u32 = 0x00A11C;
pub const CS47L63_LSRC3_TEST_REGE: u32 = 0x00A120;
pub const CS47L63_LSRC3_TEST_REG12: u32 = 0x00A124;
pub const CS47L63_LSRC3_TEST_REG1A: u32 = 0x00A128;
pub const CS47L63_ISRC1_CONTROL1: u32 = 0x00A400;
pub const CS47L63_ISRC1_CONTROL2: u32 = 0x00A404;
pub const CS47L63_ISRC1_DEBUG1: u32 = 0x00A410;
pub const CS47L63_ISRC2_CONTROL1: u32 = 0x00A510;
pub const CS47L63_ISRC2_CONTROL2: u32 = 0x00A514;
pub const CS47L63_ISRC2_DEBUG1: u32 = 0x00A520;
pub const CS47L63_ISRC3_CONTROL1: u32 = 0x00A620;
pub const CS47L63_ISRC3_CONTROL2: u32 = 0x00A624;
pub const CS47L63_ISRC3_DEBUG1: u32 = 0x00A630;
pub const CS47L63_FX_SAMPLE_RATE: u32 = 0x00A800;
pub const CS47L63_FX_STATUS: u32 = 0x00A804;
pub const CS47L63_EQ_CONTROL1: u32 = 0x00A808;
pub const CS47L63_EQ_CONTROL2: u32 = 0x00A80C;
pub const CS47L63_EQ1_GAIN1: u32 = 0x00A810;
pub const CS47L63_EQ1_GAIN2: u32 = 0x00A814;
pub const CS47L63_EQ1_BAND1_COEFF1: u32 = 0x00A818;
pub const CS47L63_EQ1_BAND1_COEFF2: u32 = 0x00A81C;
pub const CS47L63_EQ1_BAND1_PG: u32 = 0x00A820;
pub const CS47L63_EQ1_BAND2_COEFF1: u32 = 0x00A824;
pub const CS47L63_EQ1_BAND2_COEFF2: u32 = 0x00A828;
pub const CS47L63_EQ1_BAND2_PG: u32 = 0x00A82C;
pub const CS47L63_EQ1_BAND3_COEFF1: u32 = 0x00A830;
pub const CS47L63_EQ1_BAND3_COEFF2: u32 = 0x00A834;
pub const CS47L63_EQ1_BAND3_PG: u32 = 0x00A838;
pub const CS47L63_EQ1_BAND4_COEFF1: u32 = 0x00A83C;
pub const CS47L63_EQ1_BAND4_COEFF2: u32 = 0x00A840;
pub const CS47L63_EQ1_BAND4_PG: u32 = 0x00A844;
pub const CS47L63_EQ1_BAND5_COEFF1: u32 = 0x00A848;
pub const CS47L63_EQ1_BAND5_PG: u32 = 0x00A850;
pub const CS47L63_EQ2_GAIN1: u32 = 0x00A854;
pub const CS47L63_EQ2_GAIN2: u32 = 0x00A858;
pub const CS47L63_EQ2_BAND1_COEFF1: u32 = 0x00A85C;
pub const CS47L63_EQ2_BAND1_COEFF2: u32 = 0x00A860;
pub const CS47L63_EQ2_BAND1_PG: u32 = 0x00A864;
pub const CS47L63_EQ2_BAND2_COEFF1: u32 = 0x00A868;
pub const CS47L63_EQ2_BAND2_COEFF2: u32 = 0x00A86C;
pub const CS47L63_EQ2_BAND2_PG: u32 = 0x00A870;
pub const CS47L63_EQ2_BAND3_COEFF1: u32 = 0x00A874;
pub const CS47L63_EQ2_BAND3_COEFF2: u32 = 0x00A878;
pub const CS47L63_EQ2_BAND3_PG: u32 = 0x00A87C;
pub const CS47L63_EQ2_BAND4_COEFF1: u32 = 0x00A880;
pub const CS47L63_EQ2_BAND4_COEFF2: u32 = 0x00A884;
pub const CS47L63_EQ2_BAND4_PG: u32 = 0x00A888;
pub const CS47L63_EQ2_BAND5_COEFF1: u32 = 0x00A88C;
pub const CS47L63_EQ2_BAND5_PG: u32 = 0x00A894;
pub const CS47L63_EQ3_GAIN1: u32 = 0x00A898;
pub const CS47L63_EQ3_GAIN2: u32 = 0x00A89C;
pub const CS47L63_EQ3_BAND1_COEFF1: u32 = 0x00A8A0;
pub const CS47L63_EQ3_BAND1_COEFF2: u32 = 0x00A8A4;
pub const CS47L63_EQ3_BAND1_PG: u32 = 0x00A8A8;
pub const CS47L63_EQ3_BAND2_COEFF1: u32 = 0x00A8AC;
pub const CS47L63_EQ3_BAND2_COEFF2: u32 = 0x00A8B0;
pub const CS47L63_EQ3_BAND2_PG: u32 = 0x00A8B4;
pub const CS47L63_EQ3_BAND3_COEFF1: u32 = 0x00A8B8;
pub const CS47L63_EQ3_BAND3_COEFF2: u32 = 0x00A8BC;
pub const CS47L63_EQ3_BAND3_PG: u32 = 0x00A8C0;
pub const CS47L63_EQ3_BAND4_COEFF1: u32 = 0x00A8C4;
pub const CS47L63_EQ3_BAND4_COEFF2: u32 = 0x00A8C8;
pub const CS47L63_EQ3_BAND4_PG: u32 = 0x00A8CC;
pub const CS47L63_EQ3_BAND5_COEFF1: u32 = 0x00A8D0;
pub const CS47L63_EQ3_BAND5_PG: u32 = 0x00A8D8;
pub const CS47L63_EQ4_GAIN1: u32 = 0x00A8DC;
pub const CS47L63_EQ4_GAIN2: u32 = 0x00A8E0;
pub const CS47L63_EQ4_BAND1_COEFF1: u32 = 0x00A8E4;
pub const CS47L63_EQ4_BAND1_COEFF2: u32 = 0x00A8E8;
pub const CS47L63_EQ4_BAND1_PG: u32 = 0x00A8EC;
pub const CS47L63_EQ4_BAND2_COEFF1: u32 = 0x00A8F0;
pub const CS47L63_EQ4_BAND2_COEFF2: u32 = 0x00A8F4;
pub const CS47L63_EQ4_BAND2_PG: u32 = 0x00A8F8;
pub const CS47L63_EQ4_BAND3_COEFF1: u32 = 0x00A8FC;
pub const CS47L63_EQ4_BAND3_COEFF2: u32 = 0x00A900;
pub const CS47L63_EQ4_BAND3_PG: u32 = 0x00A904;
pub const CS47L63_EQ4_BAND4_COEFF1: u32 = 0x00A908;
pub const CS47L63_EQ4_BAND4_COEFF2: u32 = 0x00A90C;
pub const CS47L63_EQ4_BAND4_PG: u32 = 0x00A910;
pub const CS47L63_EQ4_BAND5_COEFF1: u32 = 0x00A914;
pub const CS47L63_EQ4_BAND5_PG: u32 = 0x00A91C;
pub const CS47L63_LHPF_CONTROL1: u32 = 0x00AA30;
pub const CS47L63_LHPF_CONTROL2: u32 = 0x00AA34;
pub const CS47L63_LHPF1_COEFF: u32 = 0x00AA38;
pub const CS47L63_LHPF2_COEFF: u32 = 0x00AA3C;
pub const CS47L63_LHPF3_COEFF: u32 = 0x00AA40;
pub const CS47L63_LHPF4_COEFF: u32 = 0x00AA44;
pub const CS47L63_FX_TEST: u32 = 0x00AA60;
pub const CS47L63_DRC1_CONTROL1: u32 = 0x00AB00;
pub const CS47L63_DRC1_CONTROL2: u32 = 0x00AB04;
pub const CS47L63_DRC1_CONTROL3: u32 = 0x00AB08;
pub const CS47L63_DRC1_CONTROL4: u32 = 0x00AB0C;
pub const CS47L63_DRC1_CONTROL5: u32 = 0x00AB10;
pub const CS47L63_DRC2_CONTROL1: u32 = 0x00AB14;
pub const CS47L63_DRC2_CONTROL2: u32 = 0x00AB18;
pub const CS47L63_DRC2_CONTROL3: u32 = 0x00AB1C;
pub const CS47L63_DRC2_CONTROL4: u32 = 0x00AB20;
pub const CS47L63_DRC2_CONTROL5: u32 = 0x00AB24;
pub const CS47L63_TONE_GENERATOR1: u32 = 0x00B000;
pub const CS47L63_TONE_GENERATOR2: u32 = 0x00B004;
pub const CS47L63_TONE_GENERATOR3: u32 = 0x00B008;
pub const CS47L63_COMFORT_NOISE_GENERATOR: u32 = 0x00B400;
pub const CS47L63_PWM_DRIVE_1: u32 = 0x00C000;
pub const CS47L63_PWM_DRIVE_2: u32 = 0x00C004;
pub const CS47L63_PWM_DRIVE_3: u32 = 0x00C008;
pub const CS47L63_ANC_CTRL_1: u32 = 0x00C800;
pub const CS47L63_ANC_CTRL_2: u32 = 0x00C804;
pub const CS47L63_ANC_CTRL_3: u32 = 0x00C808;
pub const CS47L63_ANC_CTRL_4: u32 = 0x00C900;
pub const CS47L63_ANC_CTRL_5: u32 = 0x00C904;
pub const CS47L63_ANC_CTRL_6: u32 = 0x00C908;
pub const CS47L63_ANC_CTRL_7: u32 = 0x00C90C;
pub const CS47L63_ANC_CTRL_8: u32 = 0x00C910;
pub const CS47L63_ANC_CTRL_9: u32 = 0x00C914;
pub const CS47L63_ANC_CTRL_10: u32 = 0x00C918;
pub const CS47L63_ANC_CTRL_11: u32 = 0x00C91C;
pub const CS47L63_ANC_CTRL_12: u32 = 0x00C920;
pub const CS47L63_ANC_CTRL_13: u32 = 0x00C924;
pub const CS47L63_ANC_L_CTRL_1: u32 = 0x00CA00;
pub const CS47L63_ANC_L_CTRL_2: u32 = 0x00CA04;
pub const CS47L63_ANC_L_CTRL_3: u32 = 0x00CA08;
pub const CS47L63_ANC_L_CTRL_4: u32 = 0x00CA0C;
pub const CS47L63_ANC_L_CTRL_5: u32 = 0x00CA10;
pub const CS47L63_ANC_L_CTRL_6: u32 = 0x00CA14;
pub const CS47L63_ANC_L_CTRL_7: u32 = 0x00CA18;
pub const CS47L63_ANC_L_CTRL_8: u32 = 0x00CA1C;
pub const CS47L63_ANC_L_CTRL_9: u32 = 0x00CA20;
pub const CS47L63_ANC_L_CTRL_10: u32 = 0x00CA24;
pub const CS47L63_ANC_L_CTRL_11: u32 = 0x00CA28;
pub const CS47L63_ANC_L_CTRL_12: u32 = 0x00CA2C;
pub const CS47L63_ANC_L_CTRL_13: u32 = 0x00CA30;
pub const CS47L63_ANC_L_CTRL_14: u32 = 0x00CA34;
pub const CS47L63_ANC_L_CTRL_15: u32 = 0x00CA38;
pub const CS47L63_ANC_L_CTRL_16: u32 = 0x00CA3C;
pub const CS47L63_ANC_L_CTRL_17: u32 = 0x00CA40;
pub const CS47L63_ANC_L_CTRL_18: u32 = 0x00CA44;
pub const CS47L63_ANC_L_CTRL_19: u32 = 0x00CA48;
pub const CS47L63_ANC_L_CTRL_20: u32 = 0x00CA4C;
pub const CS47L63_ANC_L_CTRL_21: u32 = 0x00CA50;
pub const CS47L63_ANC_L_CTRL_22: u32 = 0x00CA54;
pub const CS47L63_ANC_L_CTRL_23: u32 = 0x00CA58;
pub const CS47L63_ANC_L_CTRL_24: u32 = 0x00CA5C;
pub const CS47L63_ANC_L_CTRL_25: u32 = 0x00CA60;
pub const CS47L63_ANC_L_CTRL_26: u32 = 0x00CA64;
pub const CS47L63_ANC_L_CTRL_27: u32 = 0x00CA68;
pub const CS47L63_ANC_L_CTRL_28: u32 = 0x00CA6C;
pub const CS47L63_ANC_L_CTRL_29: u32 = 0x00CA70;
pub const CS47L63_ANC_L_CTRL_30: u32 = 0x00CA74;
pub const CS47L63_ANC_L_CTRL_31: u32 = 0x00CA78;
pub const CS47L63_ANC_L_CTRL_32: u32 = 0x00CA7C;
pub const CS47L63_ANC_L_CTRL_33: u32 = 0x00CA80;
pub const CS47L63_ANC_L_CTRL_34: u32 = 0x00CA84;
pub const CS47L63_ANC_L_CTRL_35: u32 = 0x00CA88;
pub const CS47L63_ANC_L_CTRL_36: u32 = 0x00CA8C;
pub const CS47L63_ANC_L_CTRL_37: u32 = 0x00CA90;
pub const CS47L63_ANC_L_CTRL_38: u32 = 0x00CA94;
pub const CS47L63_ANC_L_CTRL_39: u32 = 0x00CA98;
pub const CS47L63_ANC_L_CTRL_40: u32 = 0x00CA9C;
pub const CS47L63_ANC_L_CTRL_41: u32 = 0x00CAA0;
pub const CS47L63_ANC_L_CTRL_42: u32 = 0x00CAA4;
pub const CS47L63_ANC_L_CTRL_43: u32 = 0x00CAA8;
pub const CS47L63_ANC_L_CTRL_44: u32 = 0x00CAAC;
pub const CS47L63_ANC_L_CTRL_45: u32 = 0x00CAB0;
pub const CS47L63_ANC_L_CTRL_46: u32 = 0x00CAB4;
pub const CS47L63_ANC_L_CTRL_47: u32 = 0x00CAB8;
pub const CS47L63_ANC_L_CTRL_48: u32 = 0x00CABC;
pub const CS47L63_ANC_L_CTRL_49: u32 = 0x00CAC0;
pub const CS47L63_ANC_L_CTRL_50: u32 = 0x00CAC4;
pub const CS47L63_ANC_L_CTRL_51: u32 = 0x00CAC8;
pub const CS47L63_ANC_L_CTRL_52: u32 = 0x00CACC;
pub const CS47L63_ANC_L_CTRL_53: u32 = 0x00CAD0;
pub const CS47L63_ANC_L_CTRL_54: u32 = 0x00CAD4;
pub const CS47L63_ANC_L_CTRL_55: u32 = 0x00CAD8;
pub const CS47L63_ANC_L_CTRL_56: u32 = 0x00CADC;
pub const CS47L63_ANC_L_CTRL_57: u32 = 0x00CAE0;
pub const CS47L63_ANC_L_CTRL_58: u32 = 0x00CAE4;
pub const CS47L63_ANC_L_CTRL_59: u32 = 0x00CAE8;
pub const CS47L63_ANC_L_CTRL_60: u32 = 0x00CAEC;
pub const CS47L63_ANC_L_CTRL_61: u32 = 0x00CAF0;
pub const CS47L63_ANC_L_CTRL_DEBUG: u32 = 0x00CAF4;
pub const CS47L63_ANC_L_CTRL_62: u32 = 0x00CAF8;
pub const CS47L63_ANC_L_CTRL_63: u32 = 0x00CAFC;
pub const CS47L63_ANC_L_CTRL_64: u32 = 0x00CB00;
pub const CS47L63_ANC_L_CTRL_65: u32 = 0x00CB04;
pub const CS47L63_ANC_L_CTRL_66: u32 = 0x00CB08;
pub const CS47L63_ANC_L_FF_IIR_CONTROL: u32 = 0x00CD20;
pub const CS47L63_ANC_L_FF_IIR_COEFF_UPDATE: u32 = 0x00CD24;
pub const CS47L63_ANC_L_FF_IIR1_B0: u32 = 0x00CD2C;
pub const CS47L63_ANC_L_FF_IIR1_B1: u32 = 0x00CD30;
pub const CS47L63_ANC_L_FF_IIR1_B2: u32 = 0x00CD34;
pub const CS47L63_ANC_L_FF_IIR1_A1: u32 = 0x00CD38;
pub const CS47L63_ANC_L_FF_IIR1_A2: u32 = 0x00CD3C;
pub const CS47L63_ANC_L_FF_IIR2_B0: u32 = 0x00CD4C;
pub const CS47L63_ANC_L_FF_IIR2_B1: u32 = 0x00CD50;
pub const CS47L63_ANC_L_FF_IIR2_B2: u32 = 0x00CD54;
pub const CS47L63_ANC_L_FF_IIR2_A1: u32 = 0x00CD58;
pub const CS47L63_ANC_L_FF_IIR2_A2: u32 = 0x00CD5C;
pub const CS47L63_ANC_L_FILT_DEBUG: u32 = 0x00CD68;
pub const CS47L63_BISR_CTRL: u32 = 0x016C00;
pub const CS47L63_BISR_WR_ADDR_OFFSET: u32 = 0x016C04;
pub const CS47L63_BISR_RD_ADDR_OFFSET: u32 = 0x016C08;
pub const CS47L63_DSP1_CTRL_SETUP: u32 = 0x017008;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_0: u32 = 0x01700C;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_1: u32 = 0x017010;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_2: u32 = 0x017014;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_3: u32 = 0x017018;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_4: u32 = 0x01701C;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_5: u32 = 0x017020;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_6: u32 = 0x017024;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_7: u32 = 0x017028;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_8: u32 = 0x01702C;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_9: u32 = 0x017030;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_10: u32 = 0x017034;
pub const CS47L63_DSP1_XM_SRAM_IBUS_SETUP_11: u32 = 0x017038;
pub const CS47L63_DSP1_YM_SRAM_IBUS_SETUP_0: u32 = 0x01703C;
pub const CS47L63_DSP1_YM_SRAM_IBUS_SETUP_1: u32 = 0x017040;
pub const CS47L63_DSP1_YM_SRAM_IBUS_SETUP_2: u32 = 0x017044;
pub const CS47L63_DSP1_YM_SRAM_IBUS_SETUP_3: u32 = 0x017048;
pub const CS47L63_DSP1_YM_SRAM_IBUS_SETUP_4: u32 = 0x01704C;
pub const CS47L63_DSP1_YM_SRAM_IBUS_SETUP_5: u32 = 0x017050;
pub const CS47L63_DSP1_YM_SRAM_IBUS_SETUP_6: u32 = 0x017054;
pub const CS47L63_DSP1_PM_SRAM_IBUS_SETUP_0: u32 = 0x017058;
pub const CS47L63_DSP1_PM_SRAM_IBUS_SETUP_1: u32 = 0x01705C;
pub const CS47L63_DSP1_PM_SRAM_IBUS_SETUP_2: u32 = 0x017060;
pub const CS47L63_DSP1_PM_SRAM_IBUS_SETUP_3: u32 = 0x017064;
pub const CS47L63_DSP1_PM_SRAM_IBUS_SETUP_4: u32 = 0x017068;
pub const CS47L63_DSP1_PM_SRAM_IBUS_SETUP_5: u32 = 0x01706C;
pub const CS47L63_DEV_ID_OVD: u32 = 0x017500;
pub const CS47L63_DEV_ID: u32 = 0x017504;
pub const CS47L63_REV_ID: u32 = 0x017508;
pub const CS47L63_FAB_ID: u32 = 0x01750C;
pub const CS47L63_REL_ID: u32 = 0x017510;
pub const CS47L63_SLIM_MANU_ID: u32 = 0x017514;
pub const CS47L63_SW_MANU_ID: u32 = 0x017518;
pub const CS47L63_PRODUCT_ID: u32 = 0x01751C;
pub const CS47L63_DSP_STREAM_ARB_RESYNC_CTRL: u32 = 0x017530;
pub const CS47L63_DIE_STS1: u32 = 0x017540;
pub const CS47L63_DIE_STS2: u32 = 0x017544;
pub const CS47L63_DVS_STS: u32 = 0x017548;
pub const CS47L63_GPIO_DEBUG_CTRL: u32 = 0x017550;
pub const CS47L63_FLL_DSP_CTRL: u32 = 0x017560;
pub const CS47L63_CHIP_SPEC_SPARE: u32 = 0x017570;
pub const CS47L63_CIF_PAD_CTRL1: u32 = 0x017580;
pub const CS47L63_CIF_PAD_DBG1: u32 = 0x017584;
pub const CS47L63_IRQ1_CFG: u32 = 0x018000;
pub const CS47L63_IRQ1_STATUS: u32 = 0x018004;
pub const CS47L63_IRQ1_EINT_1: u32 = 0x018010;
pub const CS47L63_IRQ1_EINT_2: u32 = 0x018014;
pub const CS47L63_IRQ1_EINT_3: u32 = 0x018018;
pub const CS47L63_IRQ1_EINT_5: u32 = 0x018020;
pub const CS47L63_IRQ1_EINT_6: u32 = 0x018024;
pub const CS47L63_IRQ1_EINT_7: u32 = 0x018028;
pub const CS47L63_IRQ1_EINT_9: u32 = 0x018030;
pub const CS47L63_IRQ1_EINT_10: u32 = 0x018034;
pub const CS47L63_IRQ1_EINT_11: u32 = 0x018038;
pub const CS47L63_IRQ1_EINT_12: u32 = 0x01803C;
pub const CS47L63_IRQ1_EINT_13: u32 = 0x018040;
pub const CS47L63_IRQ1_EINT_14: u32 = 0x018044;
pub const CS47L63_IRQ1_EINT_15: u32 = 0x018048;
pub const CS47L63_IRQ1_EINT_17: u32 = 0x018050;
pub const CS47L63_IRQ1_EINT_18: u32 = 0x018054;
pub const CS47L63_IRQ1_STS_1: u32 = 0x018090;
pub const CS47L63_IRQ1_STS_2: u32 = 0x018094;
pub const CS47L63_IRQ1_STS_3: u32 = 0x018098;
pub const CS47L63_IRQ1_STS_5: u32 = 0x0180A0;
pub const CS47L63_IRQ1_STS_6: u32 = 0x0180A4;
pub const CS47L63_IRQ1_STS_7: u32 = 0x0180A8;
pub const CS47L63_IRQ1_STS_9: u32 = 0x0180B0;
pub const CS47L63_IRQ1_STS_10: u32 = 0x0180B4;
pub const CS47L63_IRQ1_STS_11: u32 = 0x0180B8;
pub const CS47L63_IRQ1_STS_12: u32 = 0x0180BC;
pub const CS47L63_IRQ1_STS_13: u32 = 0x0180C0;
pub const CS47L63_IRQ1_STS_14: u32 = 0x0180C4;
pub const CS47L63_IRQ1_STS_15: u32 = 0x0180C8;
pub const CS47L63_IRQ1_STS_17: u32 = 0x0180D0;
pub const CS47L63_IRQ1_MASK_1: u32 = 0x018110;
pub const CS47L63_IRQ1_MASK_2: u32 = 0x018114;
pub const CS47L63_IRQ1_MASK_3: u32 = 0x018118;
pub const CS47L63_IRQ1_MASK_5: u32 = 0x018120;
pub const CS47L63_IRQ1_MASK_6: u32 = 0x018124;
pub const CS47L63_IRQ1_MASK_7: u32 = 0x018128;
pub const CS47L63_IRQ1_MASK_9: u32 = 0x018130;
pub const CS47L63_IRQ1_MASK_10: u32 = 0x018134;
pub const CS47L63_IRQ1_MASK_11: u32 = 0x018138;
pub const CS47L63_IRQ1_MASK_12: u32 = 0x01813C;
pub const CS47L63_IRQ1_MASK_13: u32 = 0x018140;
pub const CS47L63_IRQ1_MASK_14: u32 = 0x018144;
pub const CS47L63_IRQ1_MASK_15: u32 = 0x018148;
pub const CS47L63_IRQ1_MASK_17: u32 = 0x018150;
pub const CS47L63_IRQ1_MASK_18: u32 = 0x018154;
pub const CS47L63_IRQ1_EDGE_11: u32 = 0x018238;
pub const CS47L63_IRQ1_EDGE_17: u32 = 0x018250;
pub const CS47L63_IRQ3_CFG: u32 = 0x018800;
pub const CS47L63_IRQ3_STATUS: u32 = 0x018804;
pub const CS47L63_IRQ3_EINT_1: u32 = 0x018810;
pub const CS47L63_IRQ3_EINT_2: u32 = 0x018814;
pub const CS47L63_IRQ3_STS_1: u32 = 0x018820;
pub const CS47L63_IRQ3_STS_2: u32 = 0x018824;
pub const CS47L63_IRQ3_MASK_1: u32 = 0x018830;
pub const CS47L63_IRQ3_MASK_2: u32 = 0x018834;
pub const CS47L63_DSP1_XMEM_PACKED_0: u32 = 0x2000000;
pub const CS47L63_DSP1_XMEM_PACKED_1: u32 = 0x2000004;
pub const CS47L63_DSP1_XMEM_PACKED_2: u32 = 0x2000008;
pub const CS47L63_DSP1_XMEM_PACKED_67578: u32 = 0x2041FE8;
pub const CS47L63_DSP1_XMEM_PACKED_67579: u32 = 0x2041FEC;
pub const CS47L63_DSP1_XMEM_PACKED_67580: u32 = 0x2041FF0;
pub const CS47L63_DSP1_XMEM_UNPACKED32_0: u32 = 0x2400000;
pub const CS47L63_DSP1_XMEM_UNPACKED32_1: u32 = 0x2400004;
pub const CS47L63_DSP1_XMEM_UNPACKED32_45053: u32 = 0x242BFF4;
pub const CS47L63_DSP1_XMEM_UNPACKED32_45054: u32 = 0x242BFF8;
pub const CS47L63_DSP1_TIMESTAMP_COUNT: u32 = 0x25C0800;
pub const CS47L63_DSP1_SYS_INFO_ID: u32 = 0x25E0000;
pub const CS47L63_DSP1_SYS_INFO_VERSION: u32 = 0x25E0004;
pub const CS47L63_DSP1_SYS_INFO_CORE_ID: u32 = 0x25E0008;
pub const CS47L63_DSP1_SYS_INFO_AHB_ADDR: u32 = 0x25E000C;
pub const CS47L63_DSP1_SYS_INFO_XM_SRAM_SIZE: u32 = 0x25E0010;
pub const CS47L63_DSP1_SYS_INFO_YM_SRAM_SIZE: u32 = 0x25E0018;
pub const CS47L63_DSP1_SYS_INFO_PM_SRAM_SIZE: u32 = 0x25E0020;
pub const CS47L63_DSP1_SYS_INFO_PM_BOOT_SIZE: u32 = 0x25E0028;
pub const CS47L63_DSP1_SYS_INFO_FEATURES: u32 = 0x25E002C;
pub const CS47L63_DSP1_SYS_INFO_FIR_FILTERS: u32 = 0x25E0030;
pub const CS47L63_DSP1_SYS_INFO_LMS_FILTERS: u32 = 0x25E0034;
pub const CS47L63_DSP1_SYS_INFO_XM_BANK_SIZE: u32 = 0x25E0038;
pub const CS47L63_DSP1_SYS_INFO_YM_BANK_SIZE: u32 = 0x25E003C;
pub const CS47L63_DSP1_SYS_INFO_PM_BANK_SIZE: u32 = 0x25E0040;
pub const CS47L63_DSP1_AHBM_WINDOW0_CONTROL_0: u32 = 0x25E2000;
pub const CS47L63_DSP1_AHBM_WINDOW0_CONTROL_1: u32 = 0x25E2004;
pub const CS47L63_DSP1_AHBM_WINDOW1_CONTROL_0: u32 = 0x25E2008;
pub const CS47L63_DSP1_AHBM_WINDOW1_CONTROL_1: u32 = 0x25E200C;
pub const CS47L63_DSP1_AHBM_WINDOW2_CONTROL_0: u32 = 0x25E2010;
pub const CS47L63_DSP1_AHBM_WINDOW2_CONTROL_1: u32 = 0x25E2014;
pub const CS47L63_DSP1_AHBM_WINDOW3_CONTROL_0: u32 = 0x25E2018;
pub const CS47L63_DSP1_AHBM_WINDOW3_CONTROL_1: u32 = 0x25E201C;
pub const CS47L63_DSP1_AHBM_WINDOW4_CONTROL_0: u32 = 0x25E2020;
pub const CS47L63_DSP1_AHBM_WINDOW4_CONTROL_1: u32 = 0x25E2024;
pub const CS47L63_DSP1_AHBM_WINDOW5_CONTROL_0: u32 = 0x25E2028;
pub const CS47L63_DSP1_AHBM_WINDOW5_CONTROL_1: u32 = 0x25E202C;
pub const CS47L63_DSP1_AHBM_WINDOW6_CONTROL_0: u32 = 0x25E2030;
pub const CS47L63_DSP1_AHBM_WINDOW6_CONTROL_1: u32 = 0x25E2034;
pub const CS47L63_DSP1_AHBM_WINDOW7_CONTROL_0: u32 = 0x25E2038;
pub const CS47L63_DSP1_AHBM_WINDOW7_CONTROL_1: u32 = 0x25E203C;
pub const CS47L63_DSP1_AHBM_WINDOW_DEBUG_0: u32 = 0x25E2040;
pub const CS47L63_DSP1_AHBM_WINDOW_DEBUG_1: u32 = 0x25E2044;
pub const CS47L63_DSP1_XMEM_UNPACKED24_0: u32 = 0x2800000;
pub const CS47L63_DSP1_XMEM_UNPACKED24_1: u32 = 0x2800004;
pub const CS47L63_DSP1_XMEM_UNPACKED24_2: u32 = 0x2800008;
pub const CS47L63_DSP1_XMEM_UNPACKED24_3: u32 = 0x280000C;
pub const CS47L63_DSP1_XMEM_UNPACKED24_90106: u32 = 0x2857FE8;
pub const CS47L63_DSP1_XMEM_UNPACKED24_90107: u32 = 0x2857FEC;
pub const CS47L63_DSP1_XMEM_UNPACKED24_90108: u32 = 0x2857FF0;
pub const CS47L63_DSP1_XMEM_UNPACKED24_90109: u32 = 0x2857FF4;
pub const CS47L63_DSP1_CLOCK_FREQ: u32 = 0x2B80000;
pub const CS47L63_DSP1_CLOCK_STATUS: u32 = 0x2B80008;
pub const CS47L63_DSP1_CORE_SOFT_RESET: u32 = 0x2B80010;
pub const CS47L63_DSP1_DEBUG: u32 = 0x2B80040;
pub const CS47L63_DSP1_TIMER_CONTROL: u32 = 0x2B80048;
pub const CS47L63_DSP1_STREAM_ARB_CONTROL: u32 = 0x2B80050;
pub const CS47L63_DSP1_SAMPLE_RATE_RX1: u32 = 0x2B80080;
pub const CS47L63_DSP1_SAMPLE_RATE_RX2: u32 = 0x2B80088;
pub const CS47L63_DSP1_SAMPLE_RATE_RX3: u32 = 0x2B80090;
pub const CS47L63_DSP1_SAMPLE_RATE_RX4: u32 = 0x2B80098;
pub const CS47L63_DSP1_SAMPLE_RATE_RX5: u32 = 0x2B800A0;
pub const CS47L63_DSP1_SAMPLE_RATE_RX6: u32 = 0x2B800A8;
pub const CS47L63_DSP1_SAMPLE_RATE_RX7: u32 = 0x2B800B0;
pub const CS47L63_DSP1_SAMPLE_RATE_RX8: u32 = 0x2B800B8;
pub const CS47L63_DSP1_SAMPLE_RATE_TX1: u32 = 0x2B80280;
pub const CS47L63_DSP1_SAMPLE_RATE_TX2: u32 = 0x2B80288;
pub const CS47L63_DSP1_SAMPLE_RATE_TX3: u32 = 0x2B80290;
pub const CS47L63_DSP1_SAMPLE_RATE_TX4: u32 = 0x2B80298;
pub const CS47L63_DSP1_SAMPLE_RATE_TX5: u32 = 0x2B802A0;
pub const CS47L63_DSP1_SAMPLE_RATE_TX6: u32 = 0x2B802A8;
pub const CS47L63_DSP1_SAMPLE_RATE_TX7: u32 = 0x2B802B0;
pub const CS47L63_DSP1_SAMPLE_RATE_TX8: u32 = 0x2B802B8;
pub const CS47L63_DSP1_NMI_CONTROL1: u32 = 0x2B80480;
pub const CS47L63_DSP1_NMI_CONTROL2: u32 = 0x2B80488;
pub const CS47L63_DSP1_NMI_CONTROL3: u32 = 0x2B80490;
pub const CS47L63_DSP1_NMI_CONTROL4: u32 = 0x2B80498;
pub const CS47L63_DSP1_NMI_CONTROL5: u32 = 0x2B804A0;
pub const CS47L63_DSP1_NMI_CONTROL6: u32 = 0x2B804A8;
pub const CS47L63_DSP1_NMI_CONTROL7: u32 = 0x2B804B0;
pub const CS47L63_DSP1_NMI_CONTROL8: u32 = 0x2B804B8;
pub const CS47L63_DSP1_RESUME_CONTROL: u32 = 0x2B80500;
pub const CS47L63_DSP1_IRQ1_CONTROL: u32 = 0x2B80508;
pub const CS47L63_DSP1_IRQ2_CONTROL: u32 = 0x2B80510;
pub const CS47L63_DSP1_IRQ3_CONTROL: u32 = 0x2B80518;
pub const CS47L63_DSP1_IRQ4_CONTROL: u32 = 0x2B80520;
pub const CS47L63_DSP1_IRQ5_CONTROL: u32 = 0x2B80528;
pub const CS47L63_DSP1_IRQ6_CONTROL: u32 = 0x2B80530;
pub const CS47L63_DSP1_IRQ7_CONTROL: u32 = 0x2B80538;
pub const CS47L63_DSP1_IRQ8_CONTROL: u32 = 0x2B80540;
pub const CS47L63_DSP1_IRQ9_CONTROL: u32 = 0x2B80548;
pub const CS47L63_DSP1_IRQ10_CONTROL: u32 = 0x2B80550;
pub const CS47L63_DSP1_IRQ11_CONTROL: u32 = 0x2B80558;
pub const CS47L63_DSP1_IRQ12_CONTROL: u32 = 0x2B80560;
pub const CS47L63_DSP1_IRQ13_CONTROL: u32 = 0x2B80568;
pub const CS47L63_DSP1_IRQ14_CONTROL: u32 = 0x2B80570;
pub const CS47L63_DSP1_IRQ15_CONTROL: u32 = 0x2B80578;
pub const CS47L63_DSP1_IRQ16_CONTROL: u32 = 0x2B80580;
pub const CS47L63_DSP1_IRQ17_CONTROL: u32 = 0x2B80588;
pub const CS47L63_DSP1_IRQ18_CONTROL: u32 = 0x2B80590;
pub const CS47L63_DSP1_IRQ19_CONTROL: u32 = 0x2B80598;
pub const CS47L63_DSP1_IRQ20_CONTROL: u32 = 0x2B805A0;
pub const CS47L63_DSP1_IRQ21_CONTROL: u32 = 0x2B805A8;
pub const CS47L63_DSP1_IRQ22_CONTROL: u32 = 0x2B805B0;
pub const CS47L63_DSP1_IRQ23_CONTROL: u32 = 0x2B805B8;
pub const CS47L63_DSP1_SCRATCH1: u32 = 0x2B805C0;
pub const CS47L63_DSP1_SCRATCH2: u32 = 0x2B805C8;
pub const CS47L63_DSP1_SCRATCH3: u32 = 0x2B805D0;
pub const CS47L63_DSP1_SCRATCH4: u32 = 0x2B805D8;
pub const CS47L63_DSP1_CCM_CORE_CONTROL: u32 = 0x2BC1000;
pub const CS47L63_DSP1_CCM_CLK_OVERRIDE: u32 = 0x2BC1008;
pub const CS47L63_DSP1_MPU_XMEM_ACCESS_0: u32 = 0x2BC3000;
pub const CS47L63_DSP1_MPU_YMEM_ACCESS_0: u32 = 0x2BC3004;
pub const CS47L63_DSP1_MPU_WINDOW_ACCESS_0: u32 = 0x2BC3008;
pub const CS47L63_DSP1_MPU_XREG_ACCESS_0: u32 = 0x2BC300C;
pub const CS47L63_DSP1_MPU_YREG_ACCESS_0: u32 = 0x2BC3014;
pub const CS47L63_DSP1_MPU_XMEM_ACCESS_1: u32 = 0x2BC3018;
pub const CS47L63_DSP1_MPU_YMEM_ACCESS_1: u32 = 0x2BC301C;
pub const CS47L63_DSP1_MPU_WINDOW_ACCESS_1: u32 = 0x2BC3020;
pub const CS47L63_DSP1_MPU_XREG_ACCESS_1: u32 = 0x2BC3024;
pub const CS47L63_DSP1_MPU_YREG_ACCESS_1: u32 = 0x2BC302C;
pub const CS47L63_DSP1_MPU_XMEM_ACCESS_2: u32 = 0x2BC3030;
pub const CS47L63_DSP1_MPU_YMEM_ACCESS_2: u32 = 0x2BC3034;
pub const CS47L63_DSP1_MPU_WINDOW_ACCESS_2: u32 = 0x2BC3038;
pub const CS47L63_DSP1_MPU_XREG_ACCESS_2: u32 = 0x2BC303C;
pub const CS47L63_DSP1_MPU_YREG_ACCESS_2: u32 = 0x2BC3044;
pub const CS47L63_DSP1_MPU_XMEM_ACCESS_3: u32 = 0x2BC3048;
pub const CS47L63_DSP1_MPU_YMEM_ACCESS_3: u32 = 0x2BC304C;
pub const CS47L63_DSP1_MPU_WINDOW_ACCESS_3: u32 = 0x2BC3050;
pub const CS47L63_DSP1_MPU_XREG_ACCESS_3: u32 = 0x2BC3054;
pub const CS47L63_DSP1_MPU_YREG_ACCESS_3: u32 = 0x2BC305C;
pub const CS47L63_DSP1_MPU_XM_VIO_ADDR: u32 = 0x2BC3100;
pub const CS47L63_DSP1_MPU_XM_VIO_STATUS: u32 = 0x2BC3104;
pub const CS47L63_DSP1_MPU_YM_VIO_ADDR: u32 = 0x2BC3108;
pub const CS47L63_DSP1_MPU_YM_VIO_STATUS: u32 = 0x2BC310C;
pub const CS47L63_DSP1_MPU_PM_VIO_ADDR: u32 = 0x2BC3110;
pub const CS47L63_DSP1_MPU_PM_VIO_STATUS: u32 = 0x2BC3114;
pub const CS47L63_DSP1_MPU_LOCK_CONFIG: u32 = 0x2BC3140;
pub const CS47L63_DSP1_MPU_WDT_RESET_CONTROL: u32 = 0x2BC3180;
pub const CS47L63_DSP1_STREAM_ARB_RESYNC_MSK1: u32 = 0x2BC5A00;
pub const CS47L63_DSP1_WDT_CONTROL: u32 = 0x2BC7000;
pub const CS47L63_DSP1_WDT_STATUS: u32 = 0x2BC7008;
pub const CS47L63_DSP1_YMEM_PACKED_0: u32 = 0x2C00000;
pub const CS47L63_DSP1_YMEM_PACKED_1: u32 = 0x2C00004;
pub const CS47L63_DSP1_YMEM_PACKED_2: u32 = 0x2C00008;
pub const CS47L63_DSP1_YMEM_PACKED_36858: u32 = 0x2C23FE8;
pub const CS47L63_DSP1_YMEM_PACKED_36859: u32 = 0x2C23FEC;
pub const CS47L63_DSP1_YMEM_PACKED_36860: u32 = 0x2C23FF0;
pub const CS47L63_DSP1_YMEM_UNPACKED32_0: u32 = 0x3000000;
pub const CS47L63_DSP1_YMEM_UNPACKED32_1: u32 = 0x3000004;
pub const CS47L63_DSP1_YMEM_UNPACKED32_24573: u32 = 0x3017FF4;
pub const CS47L63_DSP1_YMEM_UNPACKED32_24574: u32 = 0x3017FF8;
pub const CS47L63_DSP1_YMEM_UNPACKED24_0: u32 = 0x3400000;
pub const CS47L63_DSP1_YMEM_UNPACKED24_1: u32 = 0x3400004;
pub const CS47L63_DSP1_YMEM_UNPACKED24_2: u32 = 0x3400008;
pub const CS47L63_DSP1_YMEM_UNPACKED24_3: u32 = 0x340000C;
pub const CS47L63_DSP1_YMEM_UNPACKED24_49146: u32 = 0x342FFE8;
pub const CS47L63_DSP1_YMEM_UNPACKED24_49147: u32 = 0x342FFEC;
pub const CS47L63_DSP1_YMEM_UNPACKED24_49148: u32 = 0x342FFF0;
pub const CS47L63_DSP1_YMEM_UNPACKED24_49149: u32 = 0x342FFF4;
pub const CS47L63_DSP1_PMEM_0: u32 = 0x3800000;
pub const CS47L63_DSP1_PMEM_1: u32 = 0x3800004;
pub const CS47L63_DSP1_PMEM_2: u32 = 0x3800008;
pub const CS47L63_DSP1_PMEM_3: u32 = 0x380000C;
pub const CS47L63_DSP1_PMEM_4: u32 = 0x3800010;
pub const CS47L63_DSP1_PMEM_51190: u32 = 0x3831FD8;
pub const CS47L63_DSP1_PMEM_51191: u32 = 0x3831FDC;
pub const CS47L63_DSP1_PMEM_51192: u32 = 0x3831FE0;
pub const CS47L63_DSP1_PMEM_51193: u32 = 0x3831FE4;
pub const CS47L63_DSP1_PMEM_51194: u32 = 0x3831FE8;

/*
 * DSP registers relative offsets
 */
const CS47L63_DSP_BASE_ADDR: u32 = CS47L63_DSP1_CLOCK_FREQ;
const CS47L63_DSP_OFF_CLOCK_FREQ: u32 = CS47L63_DSP1_CLOCK_FREQ - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_CLOCK_STATUS: u32 = CS47L63_DSP1_CLOCK_STATUS - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_CORE_SOFT_RESET: u32 = CS47L63_DSP1_CORE_SOFT_RESET - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_DEBUG: u32 = CS47L63_DSP1_DEBUG - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_TIMER_CONTROL: u32 = CS47L63_DSP1_TIMER_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_STREAM_ARB_CONTROL: u32 =
    CS47L63_DSP1_STREAM_ARB_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_RX1: u32 = CS47L63_DSP1_SAMPLE_RATE_RX1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_RX2: u32 = CS47L63_DSP1_SAMPLE_RATE_RX2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_RX3: u32 = CS47L63_DSP1_SAMPLE_RATE_RX3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_RX4: u32 = CS47L63_DSP1_SAMPLE_RATE_RX4 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_RX5: u32 = CS47L63_DSP1_SAMPLE_RATE_RX5 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_RX6: u32 = CS47L63_DSP1_SAMPLE_RATE_RX6 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_RX7: u32 = CS47L63_DSP1_SAMPLE_RATE_RX7 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_RX8: u32 = CS47L63_DSP1_SAMPLE_RATE_RX8 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_TX1: u32 = CS47L63_DSP1_SAMPLE_RATE_TX1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_TX2: u32 = CS47L63_DSP1_SAMPLE_RATE_TX2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_TX3: u32 = CS47L63_DSP1_SAMPLE_RATE_TX3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_TX4: u32 = CS47L63_DSP1_SAMPLE_RATE_TX4 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_TX5: u32 = CS47L63_DSP1_SAMPLE_RATE_TX5 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_TX6: u32 = CS47L63_DSP1_SAMPLE_RATE_TX6 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_TX7: u32 = CS47L63_DSP1_SAMPLE_RATE_TX7 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SAMPLE_RATE_TX8: u32 = CS47L63_DSP1_SAMPLE_RATE_TX8 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_NMI_CONTROL1: u32 = CS47L63_DSP1_NMI_CONTROL1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_NMI_CONTROL2: u32 = CS47L63_DSP1_NMI_CONTROL2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_NMI_CONTROL3: u32 = CS47L63_DSP1_NMI_CONTROL3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_NMI_CONTROL4: u32 = CS47L63_DSP1_NMI_CONTROL4 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_NMI_CONTROL5: u32 = CS47L63_DSP1_NMI_CONTROL5 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_NMI_CONTROL6: u32 = CS47L63_DSP1_NMI_CONTROL6 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_NMI_CONTROL7: u32 = CS47L63_DSP1_NMI_CONTROL7 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_NMI_CONTROL8: u32 = CS47L63_DSP1_NMI_CONTROL8 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_RESUME_CONTROL: u32 = CS47L63_DSP1_RESUME_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ1_CONTROL: u32 = CS47L63_DSP1_IRQ1_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ2_CONTROL: u32 = CS47L63_DSP1_IRQ2_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ3_CONTROL: u32 = CS47L63_DSP1_IRQ3_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ4_CONTROL: u32 = CS47L63_DSP1_IRQ4_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ5_CONTROL: u32 = CS47L63_DSP1_IRQ5_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ6_CONTROL: u32 = CS47L63_DSP1_IRQ6_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ7_CONTROL: u32 = CS47L63_DSP1_IRQ7_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ8_CONTROL: u32 = CS47L63_DSP1_IRQ8_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ9_CONTROL: u32 = CS47L63_DSP1_IRQ9_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ10_CONTROL: u32 = CS47L63_DSP1_IRQ10_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ11_CONTROL: u32 = CS47L63_DSP1_IRQ11_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ12_CONTROL: u32 = CS47L63_DSP1_IRQ12_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ13_CONTROL: u32 = CS47L63_DSP1_IRQ13_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ14_CONTROL: u32 = CS47L63_DSP1_IRQ14_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ15_CONTROL: u32 = CS47L63_DSP1_IRQ15_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ16_CONTROL: u32 = CS47L63_DSP1_IRQ16_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ17_CONTROL: u32 = CS47L63_DSP1_IRQ17_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ18_CONTROL: u32 = CS47L63_DSP1_IRQ18_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ19_CONTROL: u32 = CS47L63_DSP1_IRQ19_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ20_CONTROL: u32 = CS47L63_DSP1_IRQ20_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ21_CONTROL: u32 = CS47L63_DSP1_IRQ21_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ22_CONTROL: u32 = CS47L63_DSP1_IRQ22_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_IRQ23_CONTROL: u32 = CS47L63_DSP1_IRQ23_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SCRATCH1: u32 = CS47L63_DSP1_SCRATCH1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SCRATCH2: u32 = CS47L63_DSP1_SCRATCH2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SCRATCH3: u32 = CS47L63_DSP1_SCRATCH3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_SCRATCH4: u32 = CS47L63_DSP1_SCRATCH4 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_CCM_CORE_CONTROL: u32 = CS47L63_DSP1_CCM_CORE_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_CCM_CLK_OVERRIDE: u32 = CS47L63_DSP1_CCM_CLK_OVERRIDE - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XMEM_ACCESS_0: u32 =
    CS47L63_DSP1_MPU_XMEM_ACCESS_0 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YMEM_ACCESS_0: u32 =
    CS47L63_DSP1_MPU_YMEM_ACCESS_0 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_WINDOW_ACCESS_0: u32 =
    CS47L63_DSP1_MPU_WINDOW_ACCESS_0 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XREG_ACCESS_0: u32 =
    CS47L63_DSP1_MPU_XREG_ACCESS_0 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YREG_ACCESS_0: u32 =
    CS47L63_DSP1_MPU_YREG_ACCESS_0 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XMEM_ACCESS_1: u32 =
    CS47L63_DSP1_MPU_XMEM_ACCESS_1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YMEM_ACCESS_1: u32 =
    CS47L63_DSP1_MPU_YMEM_ACCESS_1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_WINDOW_ACCESS_1: u32 =
    CS47L63_DSP1_MPU_WINDOW_ACCESS_1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XREG_ACCESS_1: u32 =
    CS47L63_DSP1_MPU_XREG_ACCESS_1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YREG_ACCESS_1: u32 =
    CS47L63_DSP1_MPU_YREG_ACCESS_1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XMEM_ACCESS_2: u32 =
    CS47L63_DSP1_MPU_XMEM_ACCESS_2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YMEM_ACCESS_2: u32 =
    CS47L63_DSP1_MPU_YMEM_ACCESS_2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_WINDOW_ACCESS_2: u32 =
    CS47L63_DSP1_MPU_WINDOW_ACCESS_2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XREG_ACCESS_2: u32 =
    CS47L63_DSP1_MPU_XREG_ACCESS_2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YREG_ACCESS_2: u32 =
    CS47L63_DSP1_MPU_YREG_ACCESS_2 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XMEM_ACCESS_3: u32 =
    CS47L63_DSP1_MPU_XMEM_ACCESS_3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YMEM_ACCESS_3: u32 =
    CS47L63_DSP1_MPU_YMEM_ACCESS_3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_WINDOW_ACCESS_3: u32 =
    CS47L63_DSP1_MPU_WINDOW_ACCESS_3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XREG_ACCESS_3: u32 =
    CS47L63_DSP1_MPU_XREG_ACCESS_3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YREG_ACCESS_3: u32 =
    CS47L63_DSP1_MPU_YREG_ACCESS_3 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XM_VIO_ADDR: u32 = CS47L63_DSP1_MPU_XM_VIO_ADDR - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_XM_VIO_STATUS: u32 =
    CS47L63_DSP1_MPU_XM_VIO_STATUS - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YM_VIO_ADDR: u32 = CS47L63_DSP1_MPU_YM_VIO_ADDR - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_YM_VIO_STATUS: u32 =
    CS47L63_DSP1_MPU_YM_VIO_STATUS - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_PM_VIO_ADDR: u32 = CS47L63_DSP1_MPU_PM_VIO_ADDR - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_PM_VIO_STATUS: u32 =
    CS47L63_DSP1_MPU_PM_VIO_STATUS - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_LOCK_CONFIG: u32 = CS47L63_DSP1_MPU_LOCK_CONFIG - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_MPU_WDT_RESET_CONTROL: u32 =
    CS47L63_DSP1_MPU_WDT_RESET_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_STREAM_ARB_RESYNC_MSK1: u32 =
    CS47L63_DSP1_STREAM_ARB_RESYNC_MSK1 - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_WDT_CONTROL: u32 = CS47L63_DSP1_WDT_CONTROL - CS47L63_DSP_BASE_ADDR;
const CS47L63_DSP_OFF_WDT_STATUS: u32 = CS47L63_DSP1_WDT_STATUS - CS47L63_DSP_BASE_ADDR;

// register masks
pub const CS47L63_BOOT_DONE_EINT1_MASK: u32 = 0x00000008; /* BOOT_DONE_EINT1 */
pub const CS47L63_BOOT_DONE_MASK1_MASK: u32 = 0x00000008; /* BOOT_DONE_MASK1 */
pub const CS47L63_CTRLIF_ERR_MASK1_MASK: u32 = 0x00000200; /* CTRLIF_ERR_MASK1 */
pub const CS47L63_DSP1_AHB_PACK_ERR_MASK1_MASK: u32 = 0x00020000; /* DSP1_AHB_PACK_ERR_MASK1 */
pub const CS47L63_DSP1_AHB_SYS_ERR_MASK1_MASK: u32 = 0x00040000; /* DSP1_AHB_SYS_ERR_MASK1 */
pub const CS47L63_DSP1_IRQ0_MASK1_MASK: u32 = 0x00000001; /* DSP1_IRQ0_MASK1 */
pub const CS47L63_DSP1_WDT_EXPIRE_STS1_MASK: u32 = 0x00100000; /* DSP1_WDT_EXPIRE_STS1 */
pub const CS47L63_DSP1_MPU_ERR_MASK1_MASK: u32 = 0x00200000; /* DSP1_MPU_ERR_MASK1 */
pub const CS47L63_SYSCLK_ERR_MASK1_MASK: u32 = 0x00000400; /* SYSCLK_ERR_MASK1 */
pub const CS47L63_SYSCLK_FAIL_MASK1_MASK: u32 = 0x00000100; /* SYSCLK_FAIL_MASK1 */