#include <asf.h>
#include <string.h>
#include <stdio.h>
#include "atca_hal.h"
#include "hal_sam4s_i2c_asf.h"
#include "atca_device.h"
#include "atca_execution.h"
static ATCAI2CMaster_t i2c_hal_data[MAX_I2C_BUSES]; static twi_master_options_t opt_twi_master;
#ifdef DEBUG_HAL
static void print_array(uint8_t *data, uint32_t data_size)
{
uint32_t n;
for (n = 0; n < data_size; n++)
{
printf("%.2x ", data[n]);
if (((n + 1) % 16) == 0)
{
printf("\r\n");
if ((n + 1) != data_size)
{
printf(" ");
}
}
}
if (data_size % 16 != 0)
{
printf("\r\n");
}
}
#endif
ATCA_STATUS hal_i2c_discover_buses(int i2c_buses[], int max_buses)
{
i2c_buses[0] = 0;
#if MAX_I2C_BUSES == 2
i2c_buses[1] = -1;
#endif
return ATCA_SUCCESS;
}
ATCA_STATUS hal_i2c_discover_devices(int bus_num, ATCAIfaceCfg cfg[], int *found)
{
ATCAIfaceCfg *head = cfg;
uint8_t slaveAddress = 0x01;
ATCADevice device;
#ifdef ATCA_NO_HEAP
struct atca_device disc_device;
struct atca_command disc_command;
struct atca_iface disc_iface;
#endif
ATCAPacket packet;
ATCA_STATUS status;
uint8_t revs608[][4] = { { 0x00, 0x00, 0x60, 0x01 }, { 0x00, 0x00, 0x60, 0x02 } };
uint8_t revs508[][4] = { { 0x00, 0x00, 0x50, 0x00 } };
uint8_t revs108[][4] = { { 0x80, 0x00, 0x10, 0x01 } };
uint8_t revs204[][4] = { { 0x00, 0x02, 0x00, 0x08 }, { 0x00, 0x02, 0x00, 0x09 }, { 0x00, 0x04, 0x05, 0x00 } };
int i;
ATCAIfaceCfg discoverCfg = {
.iface_type = ATCA_I2C_IFACE,
.devtype = ATECC508A,
.atcai2c.slave_address = 0x07,
.atcai2c.bus = bus_num,
.atcai2c.baud = 400000,
.wake_delay = 800,
.rx_retries = 3
};
if (bus_num < 0)
{
return ATCA_COMM_FAIL;
}
#ifdef ATCA_NO_HEAP
disc_device.mCommands = &disc_command;
disc_device.mIface = &disc_iface;
status = initATCADevice(&discoverCfg, &disc_device);
if (status != ATCA_SUCCESS)
{
return status;
}
device = &disc_device;
#else
device = newATCADevice(&discoverCfg);
if (device == NULL)
{
return ATCA_COMM_FAIL;
}
#endif
for (slaveAddress = 0x07; slaveAddress <= 0x78; slaveAddress++)
{
discoverCfg.atcai2c.slave_address = slaveAddress << 1;
memset(packet.data, 0x00, sizeof(packet.data));
packet.param1 = INFO_MODE_REVISION;
packet.param2 = 0;
atInfo(device->mCommands, &packet);
if ((status = atca_execute_command(&packet, device)) != ATCA_SUCCESS)
{
continue;
}
discoverCfg.devtype = ATCA_DEV_UNKNOWN;
for (i = 0; i < (int)sizeof(revs608) / 4; i++)
{
if (memcmp(&packet.data[1], &revs608[i], 4) == 0)
{
discoverCfg.devtype = ATECC608A;
break;
}
}
for (i = 0; i < (int)sizeof(revs508) / 4; i++)
{
if (memcmp(&packet.data[1], &revs508[i], 4) == 0)
{
discoverCfg.devtype = ATECC508A;
break;
}
}
for (i = 0; i < (int)sizeof(revs204) / 4; i++)
{
if (memcmp(&packet.data[1], &revs204[i], 4) == 0)
{
discoverCfg.devtype = ATSHA204A;
break;
}
}
for (i = 0; i < (int)sizeof(revs108) / 4; i++)
{
if (memcmp(&packet.data[1], &revs108[i], 4) == 0)
{
discoverCfg.devtype = ATECC108A;
break;
}
}
if (discoverCfg.devtype != ATCA_DEV_UNKNOWN)
{
(*found)++;
memcpy( (uint8_t*)head, (uint8_t*)&discoverCfg, sizeof(ATCAIfaceCfg));
head->devtype = discoverCfg.devtype;
head++;
}
atca_delay_ms(15);
}
#ifdef ATCA_NO_HEAP
releaseATCADevice(device);
#else
deleteATCADevice(&device);
#endif
return ATCA_SUCCESS;
}
ATCA_STATUS hal_i2c_init(void *hal, ATCAIfaceCfg *cfg)
{
if (cfg->atcai2c.bus >= MAX_I2C_BUSES)
{
return ATCA_COMM_FAIL;
}
ATCAI2CMaster_t* data = &i2c_hal_data[cfg->atcai2c.bus];
if (data->ref_ct <= 0)
{
switch (cfg->atcai2c.bus)
{
case 0:
data->twi_id = ID_TWI0;
data->twi_master_instance = TWI0;
break;
case 1:
data->twi_id = ID_TWI1;
data->twi_master_instance = TWI1;
gpio_configure_pin(PIO_PB4_IDX, (PIO_PERIPH_A | PIO_PULLUP));
gpio_configure_pin(PIO_PB5_IDX, (PIO_PERIPH_A | PIO_PULLUP));
MATRIX->CCFG_SYSIO |= (1 << 4) | (1 << 5);
break;
default:
return ATCA_COMM_FAIL;
}
pmc_enable_periph_clk(data->twi_id);
opt_twi_master.master_clk = sysclk_get_cpu_hz();
opt_twi_master.speed = cfg->atcai2c.baud;
opt_twi_master.smbus = 0;
twi_master_init(data->twi_master_instance, &opt_twi_master);
data->bus_index = cfg->atcai2c.bus;
data->ref_ct = 1;
}
else
{
data->ref_ct++;
}
((ATCAHAL_t*)hal)->hal_data = data;
return ATCA_SUCCESS;
}
ATCA_STATUS hal_i2c_post_init(ATCAIface iface)
{
return ATCA_SUCCESS;
}
ATCA_STATUS hal_i2c_send(ATCAIface iface, uint8_t *txdata, int txlength)
{
#ifdef DEBUG_HAL
printf("hal_i2c_send()\r\n");
printf("\r\nCommand Packet (size:0x%.8x)\r\n", (uint32_t)txlength);
printf("Count : %.2x\r\n", txdata[1]);
printf("Opcode : %.2x\r\n", txdata[2]);
printf("Param1 : %.2x\r\n", txdata[3]);
printf("Param2 : "); print_array(&txdata[4], 2);
if (txdata[1] > 7)
{
printf("Data : "); print_array(&txdata[6], txdata[1] - 7);
}
printf("CRC : "); print_array(&txdata[txdata[1] - 1], 2);
printf("\r\n");
#endif
ATCAIfaceCfg *cfg = atgetifacecfg(iface);
txdata[0] = 0x03; txlength++;
twi_package_t packet = {
.chip = cfg->atcai2c.slave_address >> 1,
.addr = { 0 },
.addr_length = 0,
.buffer = (void*)txdata,
.length = (uint32_t)txlength };
if (twi_master_write(i2c_hal_data[cfg->atcai2c.bus].twi_master_instance, &packet) != TWI_SUCCESS)
{
return ATCA_COMM_FAIL;
}
return ATCA_SUCCESS;
}
ATCA_STATUS hal_i2c_receive(ATCAIface iface, uint8_t *rxdata, uint16_t *rxlength)
{
#ifdef DEBUG_HAL
printf("hal_i2c_receive()\r\n");
#endif
ATCAIfaceCfg *cfg = atgetifacecfg(iface);
int retries = cfg->rx_retries;
uint32_t status = !ATCA_SUCCESS;
uint16_t rxdata_max_size = *rxlength;
twi_package_t packet = {
.chip = cfg->atcai2c.slave_address >> 1,
.addr = { 0 },
.addr_length = 0,
.buffer = (void*)rxdata,
.length = (uint32_t)1
};
*rxlength = 0;
if (rxdata_max_size < 1)
{
return ATCA_SMALL_BUFFER;
}
while (retries-- > 0 && status != ATCA_SUCCESS)
{
if (twi_master_read(i2c_hal_data[cfg->atcai2c.bus].twi_master_instance, &packet) != TWI_SUCCESS)
{
status = ATCA_COMM_FAIL;
}
else
{
status = ATCA_SUCCESS;
}
}
if (status != ATCA_SUCCESS)
{
return status;
}
if (rxdata[0] < ATCA_RSP_SIZE_MIN)
{
return ATCA_INVALID_SIZE;
}
if (rxdata[0] > rxdata_max_size)
{
return ATCA_SMALL_BUFFER;
}
packet.length = rxdata[0] - 1;
packet.buffer = &rxdata[1];
if (twi_master_read(i2c_hal_data[cfg->atcai2c.bus].twi_master_instance, &packet) != TWI_SUCCESS)
{
status = ATCA_COMM_FAIL;
}
else
{
status = ATCA_SUCCESS;
}
if (status != ATCA_SUCCESS)
{
return status;
}
*rxlength = rxdata[0];
#ifdef DEBUG_HAL
printf("\r\nResponse Packet (size:0x%.4x)\r\n", rxlength);
printf("Count : %.2x\r\n", rxdata[0]);
if (rxdata[0] > 3)
{
printf("Data : "); print_array(&rxdata[1], rxdata[0] - 3);
printf("CRC : "); print_array(&rxdata[rxdata[0] - 2], 2);
}
printf("\r\n");
#endif
return ATCA_SUCCESS;
}
void change_i2c_speed(ATCAIface iface, uint32_t speed)
{
ATCAIfaceCfg *cfg = atgetifacecfg(iface);
pmc_enable_periph_clk(i2c_hal_data[cfg->atcai2c.bus].twi_id);
opt_twi_master.master_clk = sysclk_get_cpu_hz();
opt_twi_master.speed = speed;
opt_twi_master.smbus = 0;
twi_master_init(i2c_hal_data[cfg->atcai2c.bus].twi_master_instance, &opt_twi_master);
}
ATCA_STATUS hal_i2c_wake(ATCAIface iface)
{
ATCAIfaceCfg *cfg = atgetifacecfg(iface);
int retries = cfg->rx_retries;
uint32_t bdrt = cfg->atcai2c.baud;
int status = !TWI_SUCCESS;
uint8_t data[4];
if (bdrt != 100000)
{
change_i2c_speed(iface, 100000);
}
twi_write_byte(i2c_hal_data[cfg->atcai2c.bus].twi_master_instance, 0x00);
atca_delay_ms(((uint32_t)cfg->wake_delay + (1000 - 1)) / 1000);
twi_package_t packet = {
.chip = cfg->atcai2c.slave_address >> 1,
.addr = { 0 },
.addr_length = 0,
.buffer = (void*)data,
.length = 4
};
if (bdrt != 100000)
{
change_i2c_speed(iface, bdrt);
}
while (retries-- > 0 && status != TWI_SUCCESS)
{
status = twi_master_read(i2c_hal_data[cfg->atcai2c.bus].twi_master_instance, &packet);
}
if (status != TWI_SUCCESS)
{
return ATCA_COMM_FAIL;
}
return hal_check_wake(data, 4);
}
ATCA_STATUS hal_i2c_idle(ATCAIface iface)
{
ATCAIfaceCfg *cfg = atgetifacecfg(iface);
uint8_t data[4];
data[0] = 0x02; twi_package_t packet = {
.chip = cfg->atcai2c.slave_address >> 1,
.addr = { 0 },
.addr_length = 0,
.buffer = (void*)data,
.length = 1
};
if (twi_master_write(i2c_hal_data[cfg->atcai2c.bus].twi_master_instance, &packet) != TWI_SUCCESS)
{
return ATCA_COMM_FAIL;
}
return ATCA_SUCCESS;
}
ATCA_STATUS hal_i2c_sleep(ATCAIface iface)
{
ATCAIfaceCfg *cfg = atgetifacecfg(iface);
uint8_t data[4];
data[0] = 0x01; twi_package_t packet = {
.chip = cfg->atcai2c.slave_address >> 1,
.addr = { 0 },
.addr_length = 0,
.buffer = (void*)data,
.length = 1
};
if (twi_master_write(i2c_hal_data[cfg->atcai2c.bus].twi_master_instance, &packet) != TWI_SUCCESS)
{
return ATCA_COMM_FAIL;
}
return ATCA_SUCCESS;
}
ATCA_STATUS hal_i2c_release(void *hal_data)
{
ATCAI2CMaster_t *hal = (ATCAI2CMaster_t*)hal_data;
if (hal && --(hal->ref_ct) <= 0)
{
twi_reset(hal->twi_master_instance);
hal->ref_ct = 0;
}
return ATCA_SUCCESS;
}