core-s3 0.2.0

Board support crate for the M5Stack CoreS3 ESP32-S3 kit.
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

use crate::{devices, pins};

/// Static description of the M5Stack CoreS3 board variant supported by this BSP.
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub struct Board {
    pub name: &'static str,
    pub chip: &'static str,
    pub psram: MemorySize,
    pub flash: MemorySize,
    pub display: DisplaySpec,
    pub i2c: pins::I2cBusPins,
    pub spi_display: pins::SpiDisplayPins,
    pub camera: pins::CameraPins,
    pub i2s: pins::I2sAudioPins,
}

#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub struct MemorySize {
    pub bytes: usize,
}

impl MemorySize {
    pub const fn mib(mib: usize) -> Self {
        Self {
            bytes: mib * 1024 * 1024,
        }
    }
}

#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub struct DisplaySpec {
    pub width: u16,
    pub height: u16,
    pub controller: &'static str,
    pub color_order: ColorOrder,
}

#[derive(Clone, Copy, Debug, Eq, PartialEq)]
pub enum ColorOrder {
    Rgb,
    Bgr,
}

/// M5Stack CoreS3 K128 board constants.
pub struct CoreS3;

impl CoreS3 {
    pub const BOARD: Board = Board {
        name: "M5Stack CoreS3 K128",
        chip: "ESP32-S3R8",
        psram: MemorySize::mib(8),
        flash: MemorySize::mib(16),
        display: DisplaySpec {
            width: devices::display::WIDTH,
            height: devices::display::HEIGHT,
            controller: devices::display::CONTROLLER,
            color_order: ColorOrder::Bgr,
        },
        i2c: pins::I2cBusPins::INTERNAL,
        spi_display: pins::SpiDisplayPins::LCD,
        camera: pins::CameraPins::GC0308,
        i2s: pins::I2sAudioPins::CODECS,
    };

    pub const fn board() -> Board {
        Self::BOARD
    }
}