#![allow(non_camel_case_types)]
use crate::error::*;
use super::mnemonic::*;
use super::super::config::*;
use super::super::operand::*;
use super::super::instruction::*;
use super::super::formatter::*;
use super::super::instructions::*;
#[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Debug, Hash)]
pub enum Code {
Invalid,
ADCS_i_T1,
ADCS_r_T2,
ADCS_r_T2_RRX,
ADC_i_T1,
ADC_r_T1,
ADC_r_T2,
ADC_r_T2_RRX,
ADDS_SP_i_T3,
ADDS_SP_r_T3,
ADDS_SP_r_T3_RRX,
ADDS_i_T3,
ADDS_r_T3,
ADDS_r_T3_RRX,
ADD_ADR_T1,
ADD_ADR_T3,
ADD_SP_i_T1,
ADD_SP_i_T2,
ADD_SP_i_T3,
ADD_SP_i_T4,
ADD_SP_r_T1,
ADD_SP_r_T2,
ADD_SP_r_T3,
ADD_SP_r_T3_RRX,
ADD_i_T1,
ADD_i_T2,
ADD_i_T3,
ADD_i_T4,
ADD_r_T1,
ADD_r_T2,
ADD_r_T3,
ADD_r_T3_RRX,
ADR_T1,
ADR_T2,
ADR_T3,
ANDS_i_T1,
ANDS_r_T2,
ANDS_r_T2_RRX,
AND_i_T1,
AND_r_T1,
AND_r_T2,
AND_r_T2_RRX,
ASRS_MOVS_r_T3,
ASRS_MOVS_rr_T2,
ASRS_MOV_r_T2,
ASRS_MOV_rr_T1_ASR,
ASR_MOV_r_T2,
ASR_MOV_r_T3,
ASR_MOV_rr_T1_ASR,
ASR_MOV_rr_T2,
BFC_T1,
BFI_T1,
BICS_i_T1,
BICS_r_T2,
BICS_r_T2_RRX,
BIC_i_T1,
BIC_r_T1,
BIC_r_T2,
BIC_r_T2_RRX,
BKPT_T1,
BLX_r_T1,
BL_i_T1,
BL_i_T2,
BXJ_T1,
BX_T1,
B_T1,
B_T2,
B_T3,
B_T4,
CBNZ_T1,
CBZ_T1,
CLRBHB_T1,
CLREX_T1,
CLZ_T1,
CMN_i_T1,
CMN_r_T1,
CMN_r_T2,
CMN_r_T2_RRX,
CMP_i_T1,
CMP_i_T2,
CMP_r_T1,
CMP_r_T2,
CMP_r_T3,
CMP_r_T3_RRX,
CPSID_T1_AS,
CPSID_T2_AS,
CPSID_T2_ASM,
CPSIE_T1_AS,
CPSIE_T2_AS,
CPSIE_T2_ASM,
CPS_T2_AS,
CRC32B_T1,
CRC32CB_T1,
CRC32CH_T1,
CRC32CW_T1,
CRC32H_T1,
CRC32W_T1,
CSDB_T1,
DBG_T1,
DCPS1_T1,
DCPS2_T1,
DCPS3_T1,
DMB_T1,
DSB_T1,
EORS_i_T1,
EORS_r_T2,
EORS_r_T2_RRX,
EOR_i_T1,
EOR_r_T1,
EOR_r_T2,
EOR_r_T2_RRX,
ERET_T1,
ESB_T1,
HLT_T1,
HVC_T1,
ISB_T1,
IT_T1,
LDAB_T1,
LDAEXB_T1,
LDAEXD_T1,
LDAEXH_T1,
LDAEX_T1,
LDAH_T1,
LDA_T1,
LDC_i_T1_off,
LDC_i_T1_post,
LDC_i_T1_pre,
LDC_i_T1_unind,
LDC_l_T1_off,
LDC_l_T1_post,
LDC_l_T1_pre,
LDC_l_T1_unind,
LDMDB_T1,
LDM_T1,
LDM_T2,
LDRBT_T1,
LDRB_i_T1,
LDRB_i_T2,
LDRB_i_T3_off,
LDRB_i_T3_post,
LDRB_i_T3_pre,
LDRB_l_T1,
LDRB_r_T1,
LDRB_r_T2,
LDRD_i_T1_off,
LDRD_i_T1_post,
LDRD_i_T1_pre,
LDRD_l_T1_off,
LDRD_l_T1_post,
LDRD_l_T1_pre,
LDREXB_T1,
LDREXD_T1,
LDREXH_T1,
LDREX_T1,
LDRHT_T1,
LDRH_i_T1,
LDRH_i_T2,
LDRH_i_T3_off,
LDRH_i_T3_post,
LDRH_i_T3_pre,
LDRH_l_T1,
LDRH_r_T1,
LDRH_r_T2,
LDRSBT_T1,
LDRSB_i_T1,
LDRSB_i_T2_off,
LDRSB_i_T2_post,
LDRSB_i_T2_pre,
LDRSB_l_T1,
LDRSB_r_T1,
LDRSB_r_T2,
LDRSHT_T1,
LDRSH_i_T1,
LDRSH_i_T2_off,
LDRSH_i_T2_post,
LDRSH_i_T2_pre,
LDRSH_l_T1,
LDRSH_r_T1,
LDRSH_r_T2,
LDRT_T1,
LDR_i_T1,
LDR_i_T2,
LDR_i_T3,
LDR_i_T4_off,
LDR_i_T4_post,
LDR_i_T4_pre,
LDR_l_T2,
LDR_r_T1,
LDR_r_T2,
LSLS_MOVS_r_T3,
LSLS_MOVS_rr_T2,
LSLS_MOV_r_T2,
LSLS_MOV_rr_T1_LSL,
LSL_MOV_r_T2,
LSL_MOV_r_T3,
LSL_MOV_rr_T1_LSL,
LSL_MOV_rr_T2,
LSRS_MOVS_r_T3,
LSRS_MOVS_rr_T2,
LSRS_MOV_r_T2,
LSRS_MOV_rr_T1_LSR,
LSR_MOV_r_T2,
LSR_MOV_r_T3,
LSR_MOV_rr_T1_LSR,
LSR_MOV_rr_T2,
MCRR_T1,
MCR_T1,
MLA_T1,
MLS_T1,
MOVS_i_T2,
MOVS_r_T3,
MOVS_r_T3_RRX,
MOVS_rr_T2,
MOVT_T1,
MOV_i_T1,
MOV_i_T2,
MOV_i_T3,
MOV_r_T1,
MOV_r_T2,
MOV_r_T3,
MOV_r_T3_RRX,
MOV_rr_T1_ASR,
MOV_rr_T1_LSL,
MOV_rr_T1_LSR,
MOV_rr_T1_ROR,
MOV_rr_T2,
MRC_T1,
MRRC_T1,
MRS_T1_AS,
MRS_br_T1_AS,
MSR_br_T1_AS,
MSR_r_T1_AS,
MUL_T1,
MUL_T2,
MVNS_i_T1,
MVNS_r_T2,
MVNS_r_T2_RRX,
MVN_i_T1,
MVN_r_T1,
MVN_r_T2,
MVN_r_T2_RRX,
NOP_T1,
NOP_T2,
ORNS_i_T1,
ORNS_r_T1,
ORNS_r_T1_RRX,
ORN_i_T1,
ORN_r_T1,
ORN_r_T1_RRX,
ORRS_i_T1,
ORRS_r_T2,
ORRS_r_T2_RRX,
ORR_i_T1,
ORR_r_T1,
ORR_r_T2,
ORR_r_T2_RRX,
PKHBT_T1,
PKHTB_T1,
PLDW_i_T1,
PLDW_i_T2,
PLDW_r_T1,
PLD_i_T1,
PLD_i_T2,
PLD_l_T1,
PLD_r_T1,
PLI_i_T1,
PLI_i_T2,
PLI_i_T3,
PLI_r_T1,
POP_LDM_T2,
POP_LDR_i_T4_post,
POP_T1,
PSSBB_T1,
PUSH_STMDB_T1,
PUSH_STR_i_T4_pre,
PUSH_T1,
QADD16_T1,
QADD8_T1,
QADD_T1,
QASX_T1,
QDADD_T1,
QDSUB_T1,
QSAX_T1,
QSUB16_T1,
QSUB8_T1,
QSUB_T1,
RBIT_T1,
REV16_T1,
REV16_T2,
REVSH_T1,
REVSH_T2,
REV_T1,
REV_T2,
RFE_T1_AS,
RFE_T2_AS,
RORS_MOVS_r_T3,
RORS_MOVS_rr_T2,
RORS_MOV_rr_T1_ROR,
ROR_MOV_r_T3,
ROR_MOV_rr_T1_ROR,
ROR_MOV_rr_T2,
RRXS_MOVS_r_T3_RRX,
RRX_MOV_r_T3_RRX,
RSBS_i_T2,
RSBS_r_T1,
RSBS_r_T1_RRX,
RSB_i_T1,
RSB_i_T2,
RSB_r_T1,
RSB_r_T1_RRX,
SADD16_T1,
SADD8_T1,
SASX_T1,
SBCS_i_T1,
SBCS_r_T2,
SBCS_r_T2_RRX,
SBC_i_T1,
SBC_r_T1,
SBC_r_T2,
SBC_r_T2_RRX,
SBFX_T1,
SB_T1,
SDIV_T1,
SEL_T1,
SETEND_T1,
SETPAN_T1,
SEVL_T1,
SEVL_T2,
SEV_T1,
SEV_T2,
SHADD16_T1,
SHADD8_T1,
SHASX_T1,
SHSAX_T1,
SHSUB16_T1,
SHSUB8_T1,
SMC_T1_AS,
SMLABB_T1,
SMLABT_T1,
SMLADX_T1,
SMLAD_T1,
SMLALBB_T1,
SMLALBT_T1,
SMLALDX_T1,
SMLALD_T1,
SMLALTB_T1,
SMLALTT_T1,
SMLAL_T1,
SMLATB_T1,
SMLATT_T1,
SMLAWB_T1,
SMLAWT_T1,
SMLSDX_T1,
SMLSD_T1,
SMLSLDX_T1,
SMLSLD_T1,
SMMLAR_T1,
SMMLA_T1,
SMMLSR_T1,
SMMLS_T1,
SMMULR_T1,
SMMUL_T1,
SMUADX_T1,
SMUAD_T1,
SMULBB_T1,
SMULBT_T1,
SMULL_T1,
SMULTB_T1,
SMULTT_T1,
SMULWB_T1,
SMULWT_T1,
SMUSDX_T1,
SMUSD_T1,
SRS_T1_AS,
SRS_T2_AS,
SSAT16_T1,
SSAT_T1_ASR,
SSAT_T1_LSL,
SSAX_T1,
SSBB_T1,
SSUB16_T1,
SSUB8_T1,
STC_T1_off,
STC_T1_post,
STC_T1_pre,
STC_T1_unind,
STLB_T1,
STLEXB_T1,
STLEXD_T1,
STLEXH_T1,
STLEX_T1,
STLH_T1,
STL_T1,
STMDB_T1,
STM_T1,
STM_T2,
STRBT_T1,
STRB_i_T1,
STRB_i_T2,
STRB_i_T3_offn,
STRB_i_T3_post,
STRB_i_T3_pre,
STRB_r_T1,
STRB_r_T2,
STRD_i_T1_off,
STRD_i_T1_post,
STRD_i_T1_pre,
STREXB_T1,
STREXD_T1,
STREXH_T1,
STREX_T1,
STRHT_T1,
STRH_i_T1,
STRH_i_T2,
STRH_i_T3_offn,
STRH_i_T3_post,
STRH_i_T3_pre,
STRH_r_T1,
STRH_r_T2,
STRT_T1,
STR_i_T1,
STR_i_T2,
STR_i_T3,
STR_i_T4_off,
STR_i_T4_post,
STR_i_T4_pre,
STR_r_T1,
STR_r_T2,
SUBS_PC_T5_AS,
SUBS_SP_i_T2,
SUBS_SP_r_T1,
SUBS_SP_r_T1_RRX,
SUBS_i_T3,
SUBS_r_T2,
SUBS_r_T2_RRX,
SUB_ADR_T2,
SUB_SP_i_T1,
SUB_SP_i_T2,
SUB_SP_i_T3,
SUB_SP_r_T1,
SUB_SP_r_T1_RRX,
SUB_i_T1,
SUB_i_T2,
SUB_i_T3,
SUB_i_T4,
SUB_r_T1,
SUB_r_T2,
SUB_r_T2_RRX,
SVC_T1,
SXTAB16_T1,
SXTAB_T1,
SXTAH_T1,
SXTB16_T1,
SXTB_T1,
SXTB_T2,
SXTH_T1,
SXTH_T2,
TBB_T1,
TBH_T1,
TEQ_i_T1,
TEQ_r_T1,
TEQ_r_T1_RRX,
TSB_T1,
TST_i_T1,
TST_r_T1,
TST_r_T2,
TST_r_T2_RRX,
UADD16_T1,
UADD8_T1,
UASX_T1,
UBFX_T1,
UDF_T1,
UDF_T2,
UDIV_T1,
UHADD16_T1,
UHADD8_T1,
UHASX_T1,
UHSAX_T1,
UHSUB16_T1,
UHSUB8_T1,
UMAAL_T1,
UMLAL_T1,
UMULL_T1,
UQADD16_T1,
UQADD8_T1,
UQASX_T1,
UQSAX_T1,
UQSUB16_T1,
UQSUB8_T1,
USAD8_T1,
USADA8_T1,
USAT16_T1,
USAT_T1_ASR,
USAT_T1_LSL,
USAX_T1,
USUB16_T1,
USUB8_T1,
UXTAB16_T1,
UXTAB_T1,
UXTAH_T1,
UXTB16_T1,
UXTB_T1,
UXTB_T2,
UXTH_T1,
UXTH_T2,
WFE_T1,
WFE_T2,
WFI_T1,
WFI_T2,
YIELD_T1,
YIELD_T2,
}
impl Code {
pub fn mnemonic(&self, instr: &Instruction) -> Mnemonic {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::mnemonic(instr),
Code::ADCS_r_T2 => AdcsRT2::mnemonic(instr),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::mnemonic(instr),
Code::ADC_i_T1 => AdcIT1::mnemonic(instr),
Code::ADC_r_T1 => AdcRT1::mnemonic(instr),
Code::ADC_r_T2 => AdcRT2::mnemonic(instr),
Code::ADC_r_T2_RRX => AdcRT2Rrx::mnemonic(instr),
Code::ADDS_SP_i_T3 => AddsSpIT3::mnemonic(instr),
Code::ADDS_SP_r_T3 => AddsSpRT3::mnemonic(instr),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::mnemonic(instr),
Code::ADDS_i_T3 => AddsIT3::mnemonic(instr),
Code::ADDS_r_T3 => AddsRT3::mnemonic(instr),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::mnemonic(instr),
Code::ADD_ADR_T1 => AddAdrT1::mnemonic(instr),
Code::ADD_ADR_T3 => AddAdrT3::mnemonic(instr),
Code::ADD_SP_i_T1 => AddSpIT1::mnemonic(instr),
Code::ADD_SP_i_T2 => AddSpIT2::mnemonic(instr),
Code::ADD_SP_i_T3 => AddSpIT3::mnemonic(instr),
Code::ADD_SP_i_T4 => AddSpIT4::mnemonic(instr),
Code::ADD_SP_r_T1 => AddSpRT1::mnemonic(instr),
Code::ADD_SP_r_T2 => AddSpRT2::mnemonic(instr),
Code::ADD_SP_r_T3 => AddSpRT3::mnemonic(instr),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::mnemonic(instr),
Code::ADD_i_T1 => AddIT1::mnemonic(instr),
Code::ADD_i_T2 => AddIT2::mnemonic(instr),
Code::ADD_i_T3 => AddIT3::mnemonic(instr),
Code::ADD_i_T4 => AddIT4::mnemonic(instr),
Code::ADD_r_T1 => AddRT1::mnemonic(instr),
Code::ADD_r_T2 => AddRT2::mnemonic(instr),
Code::ADD_r_T3 => AddRT3::mnemonic(instr),
Code::ADD_r_T3_RRX => AddRT3Rrx::mnemonic(instr),
Code::ADR_T1 => AdrT1::mnemonic(instr),
Code::ADR_T2 => AdrT2::mnemonic(instr),
Code::ADR_T3 => AdrT3::mnemonic(instr),
Code::ANDS_i_T1 => AndsIT1::mnemonic(instr),
Code::ANDS_r_T2 => AndsRT2::mnemonic(instr),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::mnemonic(instr),
Code::AND_i_T1 => AndIT1::mnemonic(instr),
Code::AND_r_T1 => AndRT1::mnemonic(instr),
Code::AND_r_T2 => AndRT2::mnemonic(instr),
Code::AND_r_T2_RRX => AndRT2Rrx::mnemonic(instr),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::mnemonic(instr),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::mnemonic(instr),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::mnemonic(instr),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::mnemonic(instr),
Code::ASR_MOV_r_T2 => AsrMovRT2::mnemonic(instr),
Code::ASR_MOV_r_T3 => AsrMovRT3::mnemonic(instr),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::mnemonic(instr),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::mnemonic(instr),
Code::BFC_T1 => BfcT1::mnemonic(instr),
Code::BFI_T1 => BfiT1::mnemonic(instr),
Code::BICS_i_T1 => BicsIT1::mnemonic(instr),
Code::BICS_r_T2 => BicsRT2::mnemonic(instr),
Code::BICS_r_T2_RRX => BicsRT2Rrx::mnemonic(instr),
Code::BIC_i_T1 => BicIT1::mnemonic(instr),
Code::BIC_r_T1 => BicRT1::mnemonic(instr),
Code::BIC_r_T2 => BicRT2::mnemonic(instr),
Code::BIC_r_T2_RRX => BicRT2Rrx::mnemonic(instr),
Code::BKPT_T1 => BkptT1::mnemonic(instr),
Code::BLX_r_T1 => BlxRT1::mnemonic(instr),
Code::BL_i_T1 => BlIT1::mnemonic(instr),
Code::BL_i_T2 => BlIT2::mnemonic(instr),
Code::BXJ_T1 => BxjT1::mnemonic(instr),
Code::BX_T1 => BxT1::mnemonic(instr),
Code::B_T1 => BT1::mnemonic(instr),
Code::B_T2 => BT2::mnemonic(instr),
Code::B_T3 => BT3::mnemonic(instr),
Code::B_T4 => BT4::mnemonic(instr),
Code::CBNZ_T1 => CbnzT1::mnemonic(instr),
Code::CBZ_T1 => CbzT1::mnemonic(instr),
Code::CLRBHB_T1 => ClrbhbT1::mnemonic(instr),
Code::CLREX_T1 => ClrexT1::mnemonic(instr),
Code::CLZ_T1 => ClzT1::mnemonic(instr),
Code::CMN_i_T1 => CmnIT1::mnemonic(instr),
Code::CMN_r_T1 => CmnRT1::mnemonic(instr),
Code::CMN_r_T2 => CmnRT2::mnemonic(instr),
Code::CMN_r_T2_RRX => CmnRT2Rrx::mnemonic(instr),
Code::CMP_i_T1 => CmpIT1::mnemonic(instr),
Code::CMP_i_T2 => CmpIT2::mnemonic(instr),
Code::CMP_r_T1 => CmpRT1::mnemonic(instr),
Code::CMP_r_T2 => CmpRT2::mnemonic(instr),
Code::CMP_r_T3 => CmpRT3::mnemonic(instr),
Code::CMP_r_T3_RRX => CmpRT3Rrx::mnemonic(instr),
Code::CPSID_T1_AS => CpsidT1As::mnemonic(instr),
Code::CPSID_T2_AS => CpsidT2As::mnemonic(instr),
Code::CPSID_T2_ASM => CpsidT2Asm::mnemonic(instr),
Code::CPSIE_T1_AS => CpsieT1As::mnemonic(instr),
Code::CPSIE_T2_AS => CpsieT2As::mnemonic(instr),
Code::CPSIE_T2_ASM => CpsieT2Asm::mnemonic(instr),
Code::CPS_T2_AS => CpsT2As::mnemonic(instr),
Code::CRC32B_T1 => Crc32bT1::mnemonic(instr),
Code::CRC32CB_T1 => Crc32cbT1::mnemonic(instr),
Code::CRC32CH_T1 => Crc32chT1::mnemonic(instr),
Code::CRC32CW_T1 => Crc32cwT1::mnemonic(instr),
Code::CRC32H_T1 => Crc32hT1::mnemonic(instr),
Code::CRC32W_T1 => Crc32wT1::mnemonic(instr),
Code::CSDB_T1 => CsdbT1::mnemonic(instr),
Code::DBG_T1 => DbgT1::mnemonic(instr),
Code::DCPS1_T1 => Dcps1T1::mnemonic(instr),
Code::DCPS2_T1 => Dcps2T1::mnemonic(instr),
Code::DCPS3_T1 => Dcps3T1::mnemonic(instr),
Code::DMB_T1 => DmbT1::mnemonic(instr),
Code::DSB_T1 => DsbT1::mnemonic(instr),
Code::EORS_i_T1 => EorsIT1::mnemonic(instr),
Code::EORS_r_T2 => EorsRT2::mnemonic(instr),
Code::EORS_r_T2_RRX => EorsRT2Rrx::mnemonic(instr),
Code::EOR_i_T1 => EorIT1::mnemonic(instr),
Code::EOR_r_T1 => EorRT1::mnemonic(instr),
Code::EOR_r_T2 => EorRT2::mnemonic(instr),
Code::EOR_r_T2_RRX => EorRT2Rrx::mnemonic(instr),
Code::ERET_T1 => EretT1::mnemonic(instr),
Code::ESB_T1 => EsbT1::mnemonic(instr),
Code::HLT_T1 => HltT1::mnemonic(instr),
Code::HVC_T1 => HvcT1::mnemonic(instr),
Code::ISB_T1 => IsbT1::mnemonic(instr),
Code::IT_T1 => ItT1::mnemonic(instr),
Code::LDAB_T1 => LdabT1::mnemonic(instr),
Code::LDAEXB_T1 => LdaexbT1::mnemonic(instr),
Code::LDAEXD_T1 => LdaexdT1::mnemonic(instr),
Code::LDAEXH_T1 => LdaexhT1::mnemonic(instr),
Code::LDAEX_T1 => LdaexT1::mnemonic(instr),
Code::LDAH_T1 => LdahT1::mnemonic(instr),
Code::LDA_T1 => LdaT1::mnemonic(instr),
Code::LDC_i_T1_off => LdcIT1Off::mnemonic(instr),
Code::LDC_i_T1_post => LdcIT1Post::mnemonic(instr),
Code::LDC_i_T1_pre => LdcIT1Pre::mnemonic(instr),
Code::LDC_i_T1_unind => LdcIT1Unind::mnemonic(instr),
Code::LDC_l_T1_off => LdcLT1Off::mnemonic(instr),
Code::LDC_l_T1_post => LdcLT1Post::mnemonic(instr),
Code::LDC_l_T1_pre => LdcLT1Pre::mnemonic(instr),
Code::LDC_l_T1_unind => LdcLT1Unind::mnemonic(instr),
Code::LDMDB_T1 => LdmdbT1::mnemonic(instr),
Code::LDM_T1 => LdmT1::mnemonic(instr),
Code::LDM_T2 => LdmT2::mnemonic(instr),
Code::LDRBT_T1 => LdrbtT1::mnemonic(instr),
Code::LDRB_i_T1 => LdrbIT1::mnemonic(instr),
Code::LDRB_i_T2 => LdrbIT2::mnemonic(instr),
Code::LDRB_i_T3_off => LdrbIT3Off::mnemonic(instr),
Code::LDRB_i_T3_post => LdrbIT3Post::mnemonic(instr),
Code::LDRB_i_T3_pre => LdrbIT3Pre::mnemonic(instr),
Code::LDRB_l_T1 => LdrbLT1::mnemonic(instr),
Code::LDRB_r_T1 => LdrbRT1::mnemonic(instr),
Code::LDRB_r_T2 => LdrbRT2::mnemonic(instr),
Code::LDRD_i_T1_off => LdrdIT1Off::mnemonic(instr),
Code::LDRD_i_T1_post => LdrdIT1Post::mnemonic(instr),
Code::LDRD_i_T1_pre => LdrdIT1Pre::mnemonic(instr),
Code::LDRD_l_T1_off => LdrdLT1Off::mnemonic(instr),
Code::LDRD_l_T1_post => LdrdLT1Post::mnemonic(instr),
Code::LDRD_l_T1_pre => LdrdLT1Pre::mnemonic(instr),
Code::LDREXB_T1 => LdrexbT1::mnemonic(instr),
Code::LDREXD_T1 => LdrexdT1::mnemonic(instr),
Code::LDREXH_T1 => LdrexhT1::mnemonic(instr),
Code::LDREX_T1 => LdrexT1::mnemonic(instr),
Code::LDRHT_T1 => LdrhtT1::mnemonic(instr),
Code::LDRH_i_T1 => LdrhIT1::mnemonic(instr),
Code::LDRH_i_T2 => LdrhIT2::mnemonic(instr),
Code::LDRH_i_T3_off => LdrhIT3Off::mnemonic(instr),
Code::LDRH_i_T3_post => LdrhIT3Post::mnemonic(instr),
Code::LDRH_i_T3_pre => LdrhIT3Pre::mnemonic(instr),
Code::LDRH_l_T1 => LdrhLT1::mnemonic(instr),
Code::LDRH_r_T1 => LdrhRT1::mnemonic(instr),
Code::LDRH_r_T2 => LdrhRT2::mnemonic(instr),
Code::LDRSBT_T1 => LdrsbtT1::mnemonic(instr),
Code::LDRSB_i_T1 => LdrsbIT1::mnemonic(instr),
Code::LDRSB_i_T2_off => LdrsbIT2Off::mnemonic(instr),
Code::LDRSB_i_T2_post => LdrsbIT2Post::mnemonic(instr),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::mnemonic(instr),
Code::LDRSB_l_T1 => LdrsbLT1::mnemonic(instr),
Code::LDRSB_r_T1 => LdrsbRT1::mnemonic(instr),
Code::LDRSB_r_T2 => LdrsbRT2::mnemonic(instr),
Code::LDRSHT_T1 => LdrshtT1::mnemonic(instr),
Code::LDRSH_i_T1 => LdrshIT1::mnemonic(instr),
Code::LDRSH_i_T2_off => LdrshIT2Off::mnemonic(instr),
Code::LDRSH_i_T2_post => LdrshIT2Post::mnemonic(instr),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::mnemonic(instr),
Code::LDRSH_l_T1 => LdrshLT1::mnemonic(instr),
Code::LDRSH_r_T1 => LdrshRT1::mnemonic(instr),
Code::LDRSH_r_T2 => LdrshRT2::mnemonic(instr),
Code::LDRT_T1 => LdrtT1::mnemonic(instr),
Code::LDR_i_T1 => LdrIT1::mnemonic(instr),
Code::LDR_i_T2 => LdrIT2::mnemonic(instr),
Code::LDR_i_T3 => LdrIT3::mnemonic(instr),
Code::LDR_i_T4_off => LdrIT4Off::mnemonic(instr),
Code::LDR_i_T4_post => LdrIT4Post::mnemonic(instr),
Code::LDR_i_T4_pre => LdrIT4Pre::mnemonic(instr),
Code::LDR_l_T2 => LdrLT2::mnemonic(instr),
Code::LDR_r_T1 => LdrRT1::mnemonic(instr),
Code::LDR_r_T2 => LdrRT2::mnemonic(instr),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::mnemonic(instr),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::mnemonic(instr),
Code::LSLS_MOV_r_T2 => LslsMovRT2::mnemonic(instr),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::mnemonic(instr),
Code::LSL_MOV_r_T2 => LslMovRT2::mnemonic(instr),
Code::LSL_MOV_r_T3 => LslMovRT3::mnemonic(instr),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::mnemonic(instr),
Code::LSL_MOV_rr_T2 => LslMovRrT2::mnemonic(instr),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::mnemonic(instr),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::mnemonic(instr),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::mnemonic(instr),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::mnemonic(instr),
Code::LSR_MOV_r_T2 => LsrMovRT2::mnemonic(instr),
Code::LSR_MOV_r_T3 => LsrMovRT3::mnemonic(instr),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::mnemonic(instr),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::mnemonic(instr),
Code::MCRR_T1 => McrrT1::mnemonic(instr),
Code::MCR_T1 => McrT1::mnemonic(instr),
Code::MLA_T1 => MlaT1::mnemonic(instr),
Code::MLS_T1 => MlsT1::mnemonic(instr),
Code::MOVS_i_T2 => MovsIT2::mnemonic(instr),
Code::MOVS_r_T3 => MovsRT3::mnemonic(instr),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::mnemonic(instr),
Code::MOVS_rr_T2 => MovsRrT2::mnemonic(instr),
Code::MOVT_T1 => MovtT1::mnemonic(instr),
Code::MOV_i_T1 => MovIT1::mnemonic(instr),
Code::MOV_i_T2 => MovIT2::mnemonic(instr),
Code::MOV_i_T3 => MovIT3::mnemonic(instr),
Code::MOV_r_T1 => MovRT1::mnemonic(instr),
Code::MOV_r_T2 => MovRT2::mnemonic(instr),
Code::MOV_r_T3 => MovRT3::mnemonic(instr),
Code::MOV_r_T3_RRX => MovRT3Rrx::mnemonic(instr),
Code::MOV_rr_T1_ASR => MovRrT1Asr::mnemonic(instr),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::mnemonic(instr),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::mnemonic(instr),
Code::MOV_rr_T1_ROR => MovRrT1Ror::mnemonic(instr),
Code::MOV_rr_T2 => MovRrT2::mnemonic(instr),
Code::MRC_T1 => MrcT1::mnemonic(instr),
Code::MRRC_T1 => MrrcT1::mnemonic(instr),
Code::MRS_T1_AS => MrsT1As::mnemonic(instr),
Code::MRS_br_T1_AS => MrsBrT1As::mnemonic(instr),
Code::MSR_br_T1_AS => MsrBrT1As::mnemonic(instr),
Code::MSR_r_T1_AS => MsrRT1As::mnemonic(instr),
Code::MUL_T1 => MulT1::mnemonic(instr),
Code::MUL_T2 => MulT2::mnemonic(instr),
Code::MVNS_i_T1 => MvnsIT1::mnemonic(instr),
Code::MVNS_r_T2 => MvnsRT2::mnemonic(instr),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::mnemonic(instr),
Code::MVN_i_T1 => MvnIT1::mnemonic(instr),
Code::MVN_r_T1 => MvnRT1::mnemonic(instr),
Code::MVN_r_T2 => MvnRT2::mnemonic(instr),
Code::MVN_r_T2_RRX => MvnRT2Rrx::mnemonic(instr),
Code::NOP_T1 => NopT1::mnemonic(instr),
Code::NOP_T2 => NopT2::mnemonic(instr),
Code::ORNS_i_T1 => OrnsIT1::mnemonic(instr),
Code::ORNS_r_T1 => OrnsRT1::mnemonic(instr),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::mnemonic(instr),
Code::ORN_i_T1 => OrnIT1::mnemonic(instr),
Code::ORN_r_T1 => OrnRT1::mnemonic(instr),
Code::ORN_r_T1_RRX => OrnRT1Rrx::mnemonic(instr),
Code::ORRS_i_T1 => OrrsIT1::mnemonic(instr),
Code::ORRS_r_T2 => OrrsRT2::mnemonic(instr),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::mnemonic(instr),
Code::ORR_i_T1 => OrrIT1::mnemonic(instr),
Code::ORR_r_T1 => OrrRT1::mnemonic(instr),
Code::ORR_r_T2 => OrrRT2::mnemonic(instr),
Code::ORR_r_T2_RRX => OrrRT2Rrx::mnemonic(instr),
Code::PKHBT_T1 => PkhbtT1::mnemonic(instr),
Code::PKHTB_T1 => PkhtbT1::mnemonic(instr),
Code::PLDW_i_T1 => PldwIT1::mnemonic(instr),
Code::PLDW_i_T2 => PldwIT2::mnemonic(instr),
Code::PLDW_r_T1 => PldwRT1::mnemonic(instr),
Code::PLD_i_T1 => PldIT1::mnemonic(instr),
Code::PLD_i_T2 => PldIT2::mnemonic(instr),
Code::PLD_l_T1 => PldLT1::mnemonic(instr),
Code::PLD_r_T1 => PldRT1::mnemonic(instr),
Code::PLI_i_T1 => PliIT1::mnemonic(instr),
Code::PLI_i_T2 => PliIT2::mnemonic(instr),
Code::PLI_i_T3 => PliIT3::mnemonic(instr),
Code::PLI_r_T1 => PliRT1::mnemonic(instr),
Code::POP_LDM_T2 => PopLdmT2::mnemonic(instr),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::mnemonic(instr),
Code::POP_T1 => PopT1::mnemonic(instr),
Code::PSSBB_T1 => PssbbT1::mnemonic(instr),
Code::PUSH_STMDB_T1 => PushStmdbT1::mnemonic(instr),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::mnemonic(instr),
Code::PUSH_T1 => PushT1::mnemonic(instr),
Code::QADD16_T1 => Qadd16T1::mnemonic(instr),
Code::QADD8_T1 => Qadd8T1::mnemonic(instr),
Code::QADD_T1 => QaddT1::mnemonic(instr),
Code::QASX_T1 => QasxT1::mnemonic(instr),
Code::QDADD_T1 => QdaddT1::mnemonic(instr),
Code::QDSUB_T1 => QdsubT1::mnemonic(instr),
Code::QSAX_T1 => QsaxT1::mnemonic(instr),
Code::QSUB16_T1 => Qsub16T1::mnemonic(instr),
Code::QSUB8_T1 => Qsub8T1::mnemonic(instr),
Code::QSUB_T1 => QsubT1::mnemonic(instr),
Code::RBIT_T1 => RbitT1::mnemonic(instr),
Code::REV16_T1 => Rev16T1::mnemonic(instr),
Code::REV16_T2 => Rev16T2::mnemonic(instr),
Code::REVSH_T1 => RevshT1::mnemonic(instr),
Code::REVSH_T2 => RevshT2::mnemonic(instr),
Code::REV_T1 => RevT1::mnemonic(instr),
Code::REV_T2 => RevT2::mnemonic(instr),
Code::RFE_T1_AS => RfeT1As::mnemonic(instr),
Code::RFE_T2_AS => RfeT2As::mnemonic(instr),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::mnemonic(instr),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::mnemonic(instr),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::mnemonic(instr),
Code::ROR_MOV_r_T3 => RorMovRT3::mnemonic(instr),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::mnemonic(instr),
Code::ROR_MOV_rr_T2 => RorMovRrT2::mnemonic(instr),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::mnemonic(instr),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::mnemonic(instr),
Code::RSBS_i_T2 => RsbsIT2::mnemonic(instr),
Code::RSBS_r_T1 => RsbsRT1::mnemonic(instr),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::mnemonic(instr),
Code::RSB_i_T1 => RsbIT1::mnemonic(instr),
Code::RSB_i_T2 => RsbIT2::mnemonic(instr),
Code::RSB_r_T1 => RsbRT1::mnemonic(instr),
Code::RSB_r_T1_RRX => RsbRT1Rrx::mnemonic(instr),
Code::SADD16_T1 => Sadd16T1::mnemonic(instr),
Code::SADD8_T1 => Sadd8T1::mnemonic(instr),
Code::SASX_T1 => SasxT1::mnemonic(instr),
Code::SBCS_i_T1 => SbcsIT1::mnemonic(instr),
Code::SBCS_r_T2 => SbcsRT2::mnemonic(instr),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::mnemonic(instr),
Code::SBC_i_T1 => SbcIT1::mnemonic(instr),
Code::SBC_r_T1 => SbcRT1::mnemonic(instr),
Code::SBC_r_T2 => SbcRT2::mnemonic(instr),
Code::SBC_r_T2_RRX => SbcRT2Rrx::mnemonic(instr),
Code::SBFX_T1 => SbfxT1::mnemonic(instr),
Code::SB_T1 => SbT1::mnemonic(instr),
Code::SDIV_T1 => SdivT1::mnemonic(instr),
Code::SEL_T1 => SelT1::mnemonic(instr),
Code::SETEND_T1 => SetendT1::mnemonic(instr),
Code::SETPAN_T1 => SetpanT1::mnemonic(instr),
Code::SEVL_T1 => SevlT1::mnemonic(instr),
Code::SEVL_T2 => SevlT2::mnemonic(instr),
Code::SEV_T1 => SevT1::mnemonic(instr),
Code::SEV_T2 => SevT2::mnemonic(instr),
Code::SHADD16_T1 => Shadd16T1::mnemonic(instr),
Code::SHADD8_T1 => Shadd8T1::mnemonic(instr),
Code::SHASX_T1 => ShasxT1::mnemonic(instr),
Code::SHSAX_T1 => ShsaxT1::mnemonic(instr),
Code::SHSUB16_T1 => Shsub16T1::mnemonic(instr),
Code::SHSUB8_T1 => Shsub8T1::mnemonic(instr),
Code::SMC_T1_AS => SmcT1As::mnemonic(instr),
Code::SMLABB_T1 => SmlabbT1::mnemonic(instr),
Code::SMLABT_T1 => SmlabtT1::mnemonic(instr),
Code::SMLADX_T1 => SmladxT1::mnemonic(instr),
Code::SMLAD_T1 => SmladT1::mnemonic(instr),
Code::SMLALBB_T1 => SmlalbbT1::mnemonic(instr),
Code::SMLALBT_T1 => SmlalbtT1::mnemonic(instr),
Code::SMLALDX_T1 => SmlaldxT1::mnemonic(instr),
Code::SMLALD_T1 => SmlaldT1::mnemonic(instr),
Code::SMLALTB_T1 => SmlaltbT1::mnemonic(instr),
Code::SMLALTT_T1 => SmlalttT1::mnemonic(instr),
Code::SMLAL_T1 => SmlalT1::mnemonic(instr),
Code::SMLATB_T1 => SmlatbT1::mnemonic(instr),
Code::SMLATT_T1 => SmlattT1::mnemonic(instr),
Code::SMLAWB_T1 => SmlawbT1::mnemonic(instr),
Code::SMLAWT_T1 => SmlawtT1::mnemonic(instr),
Code::SMLSDX_T1 => SmlsdxT1::mnemonic(instr),
Code::SMLSD_T1 => SmlsdT1::mnemonic(instr),
Code::SMLSLDX_T1 => SmlsldxT1::mnemonic(instr),
Code::SMLSLD_T1 => SmlsldT1::mnemonic(instr),
Code::SMMLAR_T1 => SmmlarT1::mnemonic(instr),
Code::SMMLA_T1 => SmmlaT1::mnemonic(instr),
Code::SMMLSR_T1 => SmmlsrT1::mnemonic(instr),
Code::SMMLS_T1 => SmmlsT1::mnemonic(instr),
Code::SMMULR_T1 => SmmulrT1::mnemonic(instr),
Code::SMMUL_T1 => SmmulT1::mnemonic(instr),
Code::SMUADX_T1 => SmuadxT1::mnemonic(instr),
Code::SMUAD_T1 => SmuadT1::mnemonic(instr),
Code::SMULBB_T1 => SmulbbT1::mnemonic(instr),
Code::SMULBT_T1 => SmulbtT1::mnemonic(instr),
Code::SMULL_T1 => SmullT1::mnemonic(instr),
Code::SMULTB_T1 => SmultbT1::mnemonic(instr),
Code::SMULTT_T1 => SmulttT1::mnemonic(instr),
Code::SMULWB_T1 => SmulwbT1::mnemonic(instr),
Code::SMULWT_T1 => SmulwtT1::mnemonic(instr),
Code::SMUSDX_T1 => SmusdxT1::mnemonic(instr),
Code::SMUSD_T1 => SmusdT1::mnemonic(instr),
Code::SRS_T1_AS => SrsT1As::mnemonic(instr),
Code::SRS_T2_AS => SrsT2As::mnemonic(instr),
Code::SSAT16_T1 => Ssat16T1::mnemonic(instr),
Code::SSAT_T1_ASR => SsatT1Asr::mnemonic(instr),
Code::SSAT_T1_LSL => SsatT1Lsl::mnemonic(instr),
Code::SSAX_T1 => SsaxT1::mnemonic(instr),
Code::SSBB_T1 => SsbbT1::mnemonic(instr),
Code::SSUB16_T1 => Ssub16T1::mnemonic(instr),
Code::SSUB8_T1 => Ssub8T1::mnemonic(instr),
Code::STC_T1_off => StcT1Off::mnemonic(instr),
Code::STC_T1_post => StcT1Post::mnemonic(instr),
Code::STC_T1_pre => StcT1Pre::mnemonic(instr),
Code::STC_T1_unind => StcT1Unind::mnemonic(instr),
Code::STLB_T1 => StlbT1::mnemonic(instr),
Code::STLEXB_T1 => StlexbT1::mnemonic(instr),
Code::STLEXD_T1 => StlexdT1::mnemonic(instr),
Code::STLEXH_T1 => StlexhT1::mnemonic(instr),
Code::STLEX_T1 => StlexT1::mnemonic(instr),
Code::STLH_T1 => StlhT1::mnemonic(instr),
Code::STL_T1 => StlT1::mnemonic(instr),
Code::STMDB_T1 => StmdbT1::mnemonic(instr),
Code::STM_T1 => StmT1::mnemonic(instr),
Code::STM_T2 => StmT2::mnemonic(instr),
Code::STRBT_T1 => StrbtT1::mnemonic(instr),
Code::STRB_i_T1 => StrbIT1::mnemonic(instr),
Code::STRB_i_T2 => StrbIT2::mnemonic(instr),
Code::STRB_i_T3_offn => StrbIT3Offn::mnemonic(instr),
Code::STRB_i_T3_post => StrbIT3Post::mnemonic(instr),
Code::STRB_i_T3_pre => StrbIT3Pre::mnemonic(instr),
Code::STRB_r_T1 => StrbRT1::mnemonic(instr),
Code::STRB_r_T2 => StrbRT2::mnemonic(instr),
Code::STRD_i_T1_off => StrdIT1Off::mnemonic(instr),
Code::STRD_i_T1_post => StrdIT1Post::mnemonic(instr),
Code::STRD_i_T1_pre => StrdIT1Pre::mnemonic(instr),
Code::STREXB_T1 => StrexbT1::mnemonic(instr),
Code::STREXD_T1 => StrexdT1::mnemonic(instr),
Code::STREXH_T1 => StrexhT1::mnemonic(instr),
Code::STREX_T1 => StrexT1::mnemonic(instr),
Code::STRHT_T1 => StrhtT1::mnemonic(instr),
Code::STRH_i_T1 => StrhIT1::mnemonic(instr),
Code::STRH_i_T2 => StrhIT2::mnemonic(instr),
Code::STRH_i_T3_offn => StrhIT3Offn::mnemonic(instr),
Code::STRH_i_T3_post => StrhIT3Post::mnemonic(instr),
Code::STRH_i_T3_pre => StrhIT3Pre::mnemonic(instr),
Code::STRH_r_T1 => StrhRT1::mnemonic(instr),
Code::STRH_r_T2 => StrhRT2::mnemonic(instr),
Code::STRT_T1 => StrtT1::mnemonic(instr),
Code::STR_i_T1 => StrIT1::mnemonic(instr),
Code::STR_i_T2 => StrIT2::mnemonic(instr),
Code::STR_i_T3 => StrIT3::mnemonic(instr),
Code::STR_i_T4_off => StrIT4Off::mnemonic(instr),
Code::STR_i_T4_post => StrIT4Post::mnemonic(instr),
Code::STR_i_T4_pre => StrIT4Pre::mnemonic(instr),
Code::STR_r_T1 => StrRT1::mnemonic(instr),
Code::STR_r_T2 => StrRT2::mnemonic(instr),
Code::SUBS_PC_T5_AS => SubsPcT5As::mnemonic(instr),
Code::SUBS_SP_i_T2 => SubsSpIT2::mnemonic(instr),
Code::SUBS_SP_r_T1 => SubsSpRT1::mnemonic(instr),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::mnemonic(instr),
Code::SUBS_i_T3 => SubsIT3::mnemonic(instr),
Code::SUBS_r_T2 => SubsRT2::mnemonic(instr),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::mnemonic(instr),
Code::SUB_ADR_T2 => SubAdrT2::mnemonic(instr),
Code::SUB_SP_i_T1 => SubSpIT1::mnemonic(instr),
Code::SUB_SP_i_T2 => SubSpIT2::mnemonic(instr),
Code::SUB_SP_i_T3 => SubSpIT3::mnemonic(instr),
Code::SUB_SP_r_T1 => SubSpRT1::mnemonic(instr),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::mnemonic(instr),
Code::SUB_i_T1 => SubIT1::mnemonic(instr),
Code::SUB_i_T2 => SubIT2::mnemonic(instr),
Code::SUB_i_T3 => SubIT3::mnemonic(instr),
Code::SUB_i_T4 => SubIT4::mnemonic(instr),
Code::SUB_r_T1 => SubRT1::mnemonic(instr),
Code::SUB_r_T2 => SubRT2::mnemonic(instr),
Code::SUB_r_T2_RRX => SubRT2Rrx::mnemonic(instr),
Code::SVC_T1 => SvcT1::mnemonic(instr),
Code::SXTAB16_T1 => Sxtab16T1::mnemonic(instr),
Code::SXTAB_T1 => SxtabT1::mnemonic(instr),
Code::SXTAH_T1 => SxtahT1::mnemonic(instr),
Code::SXTB16_T1 => Sxtb16T1::mnemonic(instr),
Code::SXTB_T1 => SxtbT1::mnemonic(instr),
Code::SXTB_T2 => SxtbT2::mnemonic(instr),
Code::SXTH_T1 => SxthT1::mnemonic(instr),
Code::SXTH_T2 => SxthT2::mnemonic(instr),
Code::TBB_T1 => TbbT1::mnemonic(instr),
Code::TBH_T1 => TbhT1::mnemonic(instr),
Code::TEQ_i_T1 => TeqIT1::mnemonic(instr),
Code::TEQ_r_T1 => TeqRT1::mnemonic(instr),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::mnemonic(instr),
Code::TSB_T1 => TsbT1::mnemonic(instr),
Code::TST_i_T1 => TstIT1::mnemonic(instr),
Code::TST_r_T1 => TstRT1::mnemonic(instr),
Code::TST_r_T2 => TstRT2::mnemonic(instr),
Code::TST_r_T2_RRX => TstRT2Rrx::mnemonic(instr),
Code::UADD16_T1 => Uadd16T1::mnemonic(instr),
Code::UADD8_T1 => Uadd8T1::mnemonic(instr),
Code::UASX_T1 => UasxT1::mnemonic(instr),
Code::UBFX_T1 => UbfxT1::mnemonic(instr),
Code::UDF_T1 => UdfT1::mnemonic(instr),
Code::UDF_T2 => UdfT2::mnemonic(instr),
Code::UDIV_T1 => UdivT1::mnemonic(instr),
Code::UHADD16_T1 => Uhadd16T1::mnemonic(instr),
Code::UHADD8_T1 => Uhadd8T1::mnemonic(instr),
Code::UHASX_T1 => UhasxT1::mnemonic(instr),
Code::UHSAX_T1 => UhsaxT1::mnemonic(instr),
Code::UHSUB16_T1 => Uhsub16T1::mnemonic(instr),
Code::UHSUB8_T1 => Uhsub8T1::mnemonic(instr),
Code::UMAAL_T1 => UmaalT1::mnemonic(instr),
Code::UMLAL_T1 => UmlalT1::mnemonic(instr),
Code::UMULL_T1 => UmullT1::mnemonic(instr),
Code::UQADD16_T1 => Uqadd16T1::mnemonic(instr),
Code::UQADD8_T1 => Uqadd8T1::mnemonic(instr),
Code::UQASX_T1 => UqasxT1::mnemonic(instr),
Code::UQSAX_T1 => UqsaxT1::mnemonic(instr),
Code::UQSUB16_T1 => Uqsub16T1::mnemonic(instr),
Code::UQSUB8_T1 => Uqsub8T1::mnemonic(instr),
Code::USAD8_T1 => Usad8T1::mnemonic(instr),
Code::USADA8_T1 => Usada8T1::mnemonic(instr),
Code::USAT16_T1 => Usat16T1::mnemonic(instr),
Code::USAT_T1_ASR => UsatT1Asr::mnemonic(instr),
Code::USAT_T1_LSL => UsatT1Lsl::mnemonic(instr),
Code::USAX_T1 => UsaxT1::mnemonic(instr),
Code::USUB16_T1 => Usub16T1::mnemonic(instr),
Code::USUB8_T1 => Usub8T1::mnemonic(instr),
Code::UXTAB16_T1 => Uxtab16T1::mnemonic(instr),
Code::UXTAB_T1 => UxtabT1::mnemonic(instr),
Code::UXTAH_T1 => UxtahT1::mnemonic(instr),
Code::UXTB16_T1 => Uxtb16T1::mnemonic(instr),
Code::UXTB_T1 => UxtbT1::mnemonic(instr),
Code::UXTB_T2 => UxtbT2::mnemonic(instr),
Code::UXTH_T1 => UxthT1::mnemonic(instr),
Code::UXTH_T2 => UxthT2::mnemonic(instr),
Code::WFE_T1 => WfeT1::mnemonic(instr),
Code::WFE_T2 => WfeT2::mnemonic(instr),
Code::WFI_T1 => WfiT1::mnemonic(instr),
Code::WFI_T2 => WfiT2::mnemonic(instr),
Code::YIELD_T1 => YieldT1::mnemonic(instr),
Code::YIELD_T2 => YieldT2::mnemonic(instr),
}
}
pub fn size(&self, instr: &Instruction) -> usize {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::size(instr),
Code::ADCS_r_T2 => AdcsRT2::size(instr),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::size(instr),
Code::ADC_i_T1 => AdcIT1::size(instr),
Code::ADC_r_T1 => AdcRT1::size(instr),
Code::ADC_r_T2 => AdcRT2::size(instr),
Code::ADC_r_T2_RRX => AdcRT2Rrx::size(instr),
Code::ADDS_SP_i_T3 => AddsSpIT3::size(instr),
Code::ADDS_SP_r_T3 => AddsSpRT3::size(instr),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::size(instr),
Code::ADDS_i_T3 => AddsIT3::size(instr),
Code::ADDS_r_T3 => AddsRT3::size(instr),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::size(instr),
Code::ADD_ADR_T1 => AddAdrT1::size(instr),
Code::ADD_ADR_T3 => AddAdrT3::size(instr),
Code::ADD_SP_i_T1 => AddSpIT1::size(instr),
Code::ADD_SP_i_T2 => AddSpIT2::size(instr),
Code::ADD_SP_i_T3 => AddSpIT3::size(instr),
Code::ADD_SP_i_T4 => AddSpIT4::size(instr),
Code::ADD_SP_r_T1 => AddSpRT1::size(instr),
Code::ADD_SP_r_T2 => AddSpRT2::size(instr),
Code::ADD_SP_r_T3 => AddSpRT3::size(instr),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::size(instr),
Code::ADD_i_T1 => AddIT1::size(instr),
Code::ADD_i_T2 => AddIT2::size(instr),
Code::ADD_i_T3 => AddIT3::size(instr),
Code::ADD_i_T4 => AddIT4::size(instr),
Code::ADD_r_T1 => AddRT1::size(instr),
Code::ADD_r_T2 => AddRT2::size(instr),
Code::ADD_r_T3 => AddRT3::size(instr),
Code::ADD_r_T3_RRX => AddRT3Rrx::size(instr),
Code::ADR_T1 => AdrT1::size(instr),
Code::ADR_T2 => AdrT2::size(instr),
Code::ADR_T3 => AdrT3::size(instr),
Code::ANDS_i_T1 => AndsIT1::size(instr),
Code::ANDS_r_T2 => AndsRT2::size(instr),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::size(instr),
Code::AND_i_T1 => AndIT1::size(instr),
Code::AND_r_T1 => AndRT1::size(instr),
Code::AND_r_T2 => AndRT2::size(instr),
Code::AND_r_T2_RRX => AndRT2Rrx::size(instr),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::size(instr),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::size(instr),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::size(instr),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::size(instr),
Code::ASR_MOV_r_T2 => AsrMovRT2::size(instr),
Code::ASR_MOV_r_T3 => AsrMovRT3::size(instr),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::size(instr),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::size(instr),
Code::BFC_T1 => BfcT1::size(instr),
Code::BFI_T1 => BfiT1::size(instr),
Code::BICS_i_T1 => BicsIT1::size(instr),
Code::BICS_r_T2 => BicsRT2::size(instr),
Code::BICS_r_T2_RRX => BicsRT2Rrx::size(instr),
Code::BIC_i_T1 => BicIT1::size(instr),
Code::BIC_r_T1 => BicRT1::size(instr),
Code::BIC_r_T2 => BicRT2::size(instr),
Code::BIC_r_T2_RRX => BicRT2Rrx::size(instr),
Code::BKPT_T1 => BkptT1::size(instr),
Code::BLX_r_T1 => BlxRT1::size(instr),
Code::BL_i_T1 => BlIT1::size(instr),
Code::BL_i_T2 => BlIT2::size(instr),
Code::BXJ_T1 => BxjT1::size(instr),
Code::BX_T1 => BxT1::size(instr),
Code::B_T1 => BT1::size(instr),
Code::B_T2 => BT2::size(instr),
Code::B_T3 => BT3::size(instr),
Code::B_T4 => BT4::size(instr),
Code::CBNZ_T1 => CbnzT1::size(instr),
Code::CBZ_T1 => CbzT1::size(instr),
Code::CLRBHB_T1 => ClrbhbT1::size(instr),
Code::CLREX_T1 => ClrexT1::size(instr),
Code::CLZ_T1 => ClzT1::size(instr),
Code::CMN_i_T1 => CmnIT1::size(instr),
Code::CMN_r_T1 => CmnRT1::size(instr),
Code::CMN_r_T2 => CmnRT2::size(instr),
Code::CMN_r_T2_RRX => CmnRT2Rrx::size(instr),
Code::CMP_i_T1 => CmpIT1::size(instr),
Code::CMP_i_T2 => CmpIT2::size(instr),
Code::CMP_r_T1 => CmpRT1::size(instr),
Code::CMP_r_T2 => CmpRT2::size(instr),
Code::CMP_r_T3 => CmpRT3::size(instr),
Code::CMP_r_T3_RRX => CmpRT3Rrx::size(instr),
Code::CPSID_T1_AS => CpsidT1As::size(instr),
Code::CPSID_T2_AS => CpsidT2As::size(instr),
Code::CPSID_T2_ASM => CpsidT2Asm::size(instr),
Code::CPSIE_T1_AS => CpsieT1As::size(instr),
Code::CPSIE_T2_AS => CpsieT2As::size(instr),
Code::CPSIE_T2_ASM => CpsieT2Asm::size(instr),
Code::CPS_T2_AS => CpsT2As::size(instr),
Code::CRC32B_T1 => Crc32bT1::size(instr),
Code::CRC32CB_T1 => Crc32cbT1::size(instr),
Code::CRC32CH_T1 => Crc32chT1::size(instr),
Code::CRC32CW_T1 => Crc32cwT1::size(instr),
Code::CRC32H_T1 => Crc32hT1::size(instr),
Code::CRC32W_T1 => Crc32wT1::size(instr),
Code::CSDB_T1 => CsdbT1::size(instr),
Code::DBG_T1 => DbgT1::size(instr),
Code::DCPS1_T1 => Dcps1T1::size(instr),
Code::DCPS2_T1 => Dcps2T1::size(instr),
Code::DCPS3_T1 => Dcps3T1::size(instr),
Code::DMB_T1 => DmbT1::size(instr),
Code::DSB_T1 => DsbT1::size(instr),
Code::EORS_i_T1 => EorsIT1::size(instr),
Code::EORS_r_T2 => EorsRT2::size(instr),
Code::EORS_r_T2_RRX => EorsRT2Rrx::size(instr),
Code::EOR_i_T1 => EorIT1::size(instr),
Code::EOR_r_T1 => EorRT1::size(instr),
Code::EOR_r_T2 => EorRT2::size(instr),
Code::EOR_r_T2_RRX => EorRT2Rrx::size(instr),
Code::ERET_T1 => EretT1::size(instr),
Code::ESB_T1 => EsbT1::size(instr),
Code::HLT_T1 => HltT1::size(instr),
Code::HVC_T1 => HvcT1::size(instr),
Code::ISB_T1 => IsbT1::size(instr),
Code::IT_T1 => ItT1::size(instr),
Code::LDAB_T1 => LdabT1::size(instr),
Code::LDAEXB_T1 => LdaexbT1::size(instr),
Code::LDAEXD_T1 => LdaexdT1::size(instr),
Code::LDAEXH_T1 => LdaexhT1::size(instr),
Code::LDAEX_T1 => LdaexT1::size(instr),
Code::LDAH_T1 => LdahT1::size(instr),
Code::LDA_T1 => LdaT1::size(instr),
Code::LDC_i_T1_off => LdcIT1Off::size(instr),
Code::LDC_i_T1_post => LdcIT1Post::size(instr),
Code::LDC_i_T1_pre => LdcIT1Pre::size(instr),
Code::LDC_i_T1_unind => LdcIT1Unind::size(instr),
Code::LDC_l_T1_off => LdcLT1Off::size(instr),
Code::LDC_l_T1_post => LdcLT1Post::size(instr),
Code::LDC_l_T1_pre => LdcLT1Pre::size(instr),
Code::LDC_l_T1_unind => LdcLT1Unind::size(instr),
Code::LDMDB_T1 => LdmdbT1::size(instr),
Code::LDM_T1 => LdmT1::size(instr),
Code::LDM_T2 => LdmT2::size(instr),
Code::LDRBT_T1 => LdrbtT1::size(instr),
Code::LDRB_i_T1 => LdrbIT1::size(instr),
Code::LDRB_i_T2 => LdrbIT2::size(instr),
Code::LDRB_i_T3_off => LdrbIT3Off::size(instr),
Code::LDRB_i_T3_post => LdrbIT3Post::size(instr),
Code::LDRB_i_T3_pre => LdrbIT3Pre::size(instr),
Code::LDRB_l_T1 => LdrbLT1::size(instr),
Code::LDRB_r_T1 => LdrbRT1::size(instr),
Code::LDRB_r_T2 => LdrbRT2::size(instr),
Code::LDRD_i_T1_off => LdrdIT1Off::size(instr),
Code::LDRD_i_T1_post => LdrdIT1Post::size(instr),
Code::LDRD_i_T1_pre => LdrdIT1Pre::size(instr),
Code::LDRD_l_T1_off => LdrdLT1Off::size(instr),
Code::LDRD_l_T1_post => LdrdLT1Post::size(instr),
Code::LDRD_l_T1_pre => LdrdLT1Pre::size(instr),
Code::LDREXB_T1 => LdrexbT1::size(instr),
Code::LDREXD_T1 => LdrexdT1::size(instr),
Code::LDREXH_T1 => LdrexhT1::size(instr),
Code::LDREX_T1 => LdrexT1::size(instr),
Code::LDRHT_T1 => LdrhtT1::size(instr),
Code::LDRH_i_T1 => LdrhIT1::size(instr),
Code::LDRH_i_T2 => LdrhIT2::size(instr),
Code::LDRH_i_T3_off => LdrhIT3Off::size(instr),
Code::LDRH_i_T3_post => LdrhIT3Post::size(instr),
Code::LDRH_i_T3_pre => LdrhIT3Pre::size(instr),
Code::LDRH_l_T1 => LdrhLT1::size(instr),
Code::LDRH_r_T1 => LdrhRT1::size(instr),
Code::LDRH_r_T2 => LdrhRT2::size(instr),
Code::LDRSBT_T1 => LdrsbtT1::size(instr),
Code::LDRSB_i_T1 => LdrsbIT1::size(instr),
Code::LDRSB_i_T2_off => LdrsbIT2Off::size(instr),
Code::LDRSB_i_T2_post => LdrsbIT2Post::size(instr),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::size(instr),
Code::LDRSB_l_T1 => LdrsbLT1::size(instr),
Code::LDRSB_r_T1 => LdrsbRT1::size(instr),
Code::LDRSB_r_T2 => LdrsbRT2::size(instr),
Code::LDRSHT_T1 => LdrshtT1::size(instr),
Code::LDRSH_i_T1 => LdrshIT1::size(instr),
Code::LDRSH_i_T2_off => LdrshIT2Off::size(instr),
Code::LDRSH_i_T2_post => LdrshIT2Post::size(instr),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::size(instr),
Code::LDRSH_l_T1 => LdrshLT1::size(instr),
Code::LDRSH_r_T1 => LdrshRT1::size(instr),
Code::LDRSH_r_T2 => LdrshRT2::size(instr),
Code::LDRT_T1 => LdrtT1::size(instr),
Code::LDR_i_T1 => LdrIT1::size(instr),
Code::LDR_i_T2 => LdrIT2::size(instr),
Code::LDR_i_T3 => LdrIT3::size(instr),
Code::LDR_i_T4_off => LdrIT4Off::size(instr),
Code::LDR_i_T4_post => LdrIT4Post::size(instr),
Code::LDR_i_T4_pre => LdrIT4Pre::size(instr),
Code::LDR_l_T2 => LdrLT2::size(instr),
Code::LDR_r_T1 => LdrRT1::size(instr),
Code::LDR_r_T2 => LdrRT2::size(instr),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::size(instr),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::size(instr),
Code::LSLS_MOV_r_T2 => LslsMovRT2::size(instr),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::size(instr),
Code::LSL_MOV_r_T2 => LslMovRT2::size(instr),
Code::LSL_MOV_r_T3 => LslMovRT3::size(instr),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::size(instr),
Code::LSL_MOV_rr_T2 => LslMovRrT2::size(instr),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::size(instr),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::size(instr),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::size(instr),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::size(instr),
Code::LSR_MOV_r_T2 => LsrMovRT2::size(instr),
Code::LSR_MOV_r_T3 => LsrMovRT3::size(instr),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::size(instr),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::size(instr),
Code::MCRR_T1 => McrrT1::size(instr),
Code::MCR_T1 => McrT1::size(instr),
Code::MLA_T1 => MlaT1::size(instr),
Code::MLS_T1 => MlsT1::size(instr),
Code::MOVS_i_T2 => MovsIT2::size(instr),
Code::MOVS_r_T3 => MovsRT3::size(instr),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::size(instr),
Code::MOVS_rr_T2 => MovsRrT2::size(instr),
Code::MOVT_T1 => MovtT1::size(instr),
Code::MOV_i_T1 => MovIT1::size(instr),
Code::MOV_i_T2 => MovIT2::size(instr),
Code::MOV_i_T3 => MovIT3::size(instr),
Code::MOV_r_T1 => MovRT1::size(instr),
Code::MOV_r_T2 => MovRT2::size(instr),
Code::MOV_r_T3 => MovRT3::size(instr),
Code::MOV_r_T3_RRX => MovRT3Rrx::size(instr),
Code::MOV_rr_T1_ASR => MovRrT1Asr::size(instr),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::size(instr),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::size(instr),
Code::MOV_rr_T1_ROR => MovRrT1Ror::size(instr),
Code::MOV_rr_T2 => MovRrT2::size(instr),
Code::MRC_T1 => MrcT1::size(instr),
Code::MRRC_T1 => MrrcT1::size(instr),
Code::MRS_T1_AS => MrsT1As::size(instr),
Code::MRS_br_T1_AS => MrsBrT1As::size(instr),
Code::MSR_br_T1_AS => MsrBrT1As::size(instr),
Code::MSR_r_T1_AS => MsrRT1As::size(instr),
Code::MUL_T1 => MulT1::size(instr),
Code::MUL_T2 => MulT2::size(instr),
Code::MVNS_i_T1 => MvnsIT1::size(instr),
Code::MVNS_r_T2 => MvnsRT2::size(instr),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::size(instr),
Code::MVN_i_T1 => MvnIT1::size(instr),
Code::MVN_r_T1 => MvnRT1::size(instr),
Code::MVN_r_T2 => MvnRT2::size(instr),
Code::MVN_r_T2_RRX => MvnRT2Rrx::size(instr),
Code::NOP_T1 => NopT1::size(instr),
Code::NOP_T2 => NopT2::size(instr),
Code::ORNS_i_T1 => OrnsIT1::size(instr),
Code::ORNS_r_T1 => OrnsRT1::size(instr),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::size(instr),
Code::ORN_i_T1 => OrnIT1::size(instr),
Code::ORN_r_T1 => OrnRT1::size(instr),
Code::ORN_r_T1_RRX => OrnRT1Rrx::size(instr),
Code::ORRS_i_T1 => OrrsIT1::size(instr),
Code::ORRS_r_T2 => OrrsRT2::size(instr),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::size(instr),
Code::ORR_i_T1 => OrrIT1::size(instr),
Code::ORR_r_T1 => OrrRT1::size(instr),
Code::ORR_r_T2 => OrrRT2::size(instr),
Code::ORR_r_T2_RRX => OrrRT2Rrx::size(instr),
Code::PKHBT_T1 => PkhbtT1::size(instr),
Code::PKHTB_T1 => PkhtbT1::size(instr),
Code::PLDW_i_T1 => PldwIT1::size(instr),
Code::PLDW_i_T2 => PldwIT2::size(instr),
Code::PLDW_r_T1 => PldwRT1::size(instr),
Code::PLD_i_T1 => PldIT1::size(instr),
Code::PLD_i_T2 => PldIT2::size(instr),
Code::PLD_l_T1 => PldLT1::size(instr),
Code::PLD_r_T1 => PldRT1::size(instr),
Code::PLI_i_T1 => PliIT1::size(instr),
Code::PLI_i_T2 => PliIT2::size(instr),
Code::PLI_i_T3 => PliIT3::size(instr),
Code::PLI_r_T1 => PliRT1::size(instr),
Code::POP_LDM_T2 => PopLdmT2::size(instr),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::size(instr),
Code::POP_T1 => PopT1::size(instr),
Code::PSSBB_T1 => PssbbT1::size(instr),
Code::PUSH_STMDB_T1 => PushStmdbT1::size(instr),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::size(instr),
Code::PUSH_T1 => PushT1::size(instr),
Code::QADD16_T1 => Qadd16T1::size(instr),
Code::QADD8_T1 => Qadd8T1::size(instr),
Code::QADD_T1 => QaddT1::size(instr),
Code::QASX_T1 => QasxT1::size(instr),
Code::QDADD_T1 => QdaddT1::size(instr),
Code::QDSUB_T1 => QdsubT1::size(instr),
Code::QSAX_T1 => QsaxT1::size(instr),
Code::QSUB16_T1 => Qsub16T1::size(instr),
Code::QSUB8_T1 => Qsub8T1::size(instr),
Code::QSUB_T1 => QsubT1::size(instr),
Code::RBIT_T1 => RbitT1::size(instr),
Code::REV16_T1 => Rev16T1::size(instr),
Code::REV16_T2 => Rev16T2::size(instr),
Code::REVSH_T1 => RevshT1::size(instr),
Code::REVSH_T2 => RevshT2::size(instr),
Code::REV_T1 => RevT1::size(instr),
Code::REV_T2 => RevT2::size(instr),
Code::RFE_T1_AS => RfeT1As::size(instr),
Code::RFE_T2_AS => RfeT2As::size(instr),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::size(instr),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::size(instr),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::size(instr),
Code::ROR_MOV_r_T3 => RorMovRT3::size(instr),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::size(instr),
Code::ROR_MOV_rr_T2 => RorMovRrT2::size(instr),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::size(instr),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::size(instr),
Code::RSBS_i_T2 => RsbsIT2::size(instr),
Code::RSBS_r_T1 => RsbsRT1::size(instr),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::size(instr),
Code::RSB_i_T1 => RsbIT1::size(instr),
Code::RSB_i_T2 => RsbIT2::size(instr),
Code::RSB_r_T1 => RsbRT1::size(instr),
Code::RSB_r_T1_RRX => RsbRT1Rrx::size(instr),
Code::SADD16_T1 => Sadd16T1::size(instr),
Code::SADD8_T1 => Sadd8T1::size(instr),
Code::SASX_T1 => SasxT1::size(instr),
Code::SBCS_i_T1 => SbcsIT1::size(instr),
Code::SBCS_r_T2 => SbcsRT2::size(instr),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::size(instr),
Code::SBC_i_T1 => SbcIT1::size(instr),
Code::SBC_r_T1 => SbcRT1::size(instr),
Code::SBC_r_T2 => SbcRT2::size(instr),
Code::SBC_r_T2_RRX => SbcRT2Rrx::size(instr),
Code::SBFX_T1 => SbfxT1::size(instr),
Code::SB_T1 => SbT1::size(instr),
Code::SDIV_T1 => SdivT1::size(instr),
Code::SEL_T1 => SelT1::size(instr),
Code::SETEND_T1 => SetendT1::size(instr),
Code::SETPAN_T1 => SetpanT1::size(instr),
Code::SEVL_T1 => SevlT1::size(instr),
Code::SEVL_T2 => SevlT2::size(instr),
Code::SEV_T1 => SevT1::size(instr),
Code::SEV_T2 => SevT2::size(instr),
Code::SHADD16_T1 => Shadd16T1::size(instr),
Code::SHADD8_T1 => Shadd8T1::size(instr),
Code::SHASX_T1 => ShasxT1::size(instr),
Code::SHSAX_T1 => ShsaxT1::size(instr),
Code::SHSUB16_T1 => Shsub16T1::size(instr),
Code::SHSUB8_T1 => Shsub8T1::size(instr),
Code::SMC_T1_AS => SmcT1As::size(instr),
Code::SMLABB_T1 => SmlabbT1::size(instr),
Code::SMLABT_T1 => SmlabtT1::size(instr),
Code::SMLADX_T1 => SmladxT1::size(instr),
Code::SMLAD_T1 => SmladT1::size(instr),
Code::SMLALBB_T1 => SmlalbbT1::size(instr),
Code::SMLALBT_T1 => SmlalbtT1::size(instr),
Code::SMLALDX_T1 => SmlaldxT1::size(instr),
Code::SMLALD_T1 => SmlaldT1::size(instr),
Code::SMLALTB_T1 => SmlaltbT1::size(instr),
Code::SMLALTT_T1 => SmlalttT1::size(instr),
Code::SMLAL_T1 => SmlalT1::size(instr),
Code::SMLATB_T1 => SmlatbT1::size(instr),
Code::SMLATT_T1 => SmlattT1::size(instr),
Code::SMLAWB_T1 => SmlawbT1::size(instr),
Code::SMLAWT_T1 => SmlawtT1::size(instr),
Code::SMLSDX_T1 => SmlsdxT1::size(instr),
Code::SMLSD_T1 => SmlsdT1::size(instr),
Code::SMLSLDX_T1 => SmlsldxT1::size(instr),
Code::SMLSLD_T1 => SmlsldT1::size(instr),
Code::SMMLAR_T1 => SmmlarT1::size(instr),
Code::SMMLA_T1 => SmmlaT1::size(instr),
Code::SMMLSR_T1 => SmmlsrT1::size(instr),
Code::SMMLS_T1 => SmmlsT1::size(instr),
Code::SMMULR_T1 => SmmulrT1::size(instr),
Code::SMMUL_T1 => SmmulT1::size(instr),
Code::SMUADX_T1 => SmuadxT1::size(instr),
Code::SMUAD_T1 => SmuadT1::size(instr),
Code::SMULBB_T1 => SmulbbT1::size(instr),
Code::SMULBT_T1 => SmulbtT1::size(instr),
Code::SMULL_T1 => SmullT1::size(instr),
Code::SMULTB_T1 => SmultbT1::size(instr),
Code::SMULTT_T1 => SmulttT1::size(instr),
Code::SMULWB_T1 => SmulwbT1::size(instr),
Code::SMULWT_T1 => SmulwtT1::size(instr),
Code::SMUSDX_T1 => SmusdxT1::size(instr),
Code::SMUSD_T1 => SmusdT1::size(instr),
Code::SRS_T1_AS => SrsT1As::size(instr),
Code::SRS_T2_AS => SrsT2As::size(instr),
Code::SSAT16_T1 => Ssat16T1::size(instr),
Code::SSAT_T1_ASR => SsatT1Asr::size(instr),
Code::SSAT_T1_LSL => SsatT1Lsl::size(instr),
Code::SSAX_T1 => SsaxT1::size(instr),
Code::SSBB_T1 => SsbbT1::size(instr),
Code::SSUB16_T1 => Ssub16T1::size(instr),
Code::SSUB8_T1 => Ssub8T1::size(instr),
Code::STC_T1_off => StcT1Off::size(instr),
Code::STC_T1_post => StcT1Post::size(instr),
Code::STC_T1_pre => StcT1Pre::size(instr),
Code::STC_T1_unind => StcT1Unind::size(instr),
Code::STLB_T1 => StlbT1::size(instr),
Code::STLEXB_T1 => StlexbT1::size(instr),
Code::STLEXD_T1 => StlexdT1::size(instr),
Code::STLEXH_T1 => StlexhT1::size(instr),
Code::STLEX_T1 => StlexT1::size(instr),
Code::STLH_T1 => StlhT1::size(instr),
Code::STL_T1 => StlT1::size(instr),
Code::STMDB_T1 => StmdbT1::size(instr),
Code::STM_T1 => StmT1::size(instr),
Code::STM_T2 => StmT2::size(instr),
Code::STRBT_T1 => StrbtT1::size(instr),
Code::STRB_i_T1 => StrbIT1::size(instr),
Code::STRB_i_T2 => StrbIT2::size(instr),
Code::STRB_i_T3_offn => StrbIT3Offn::size(instr),
Code::STRB_i_T3_post => StrbIT3Post::size(instr),
Code::STRB_i_T3_pre => StrbIT3Pre::size(instr),
Code::STRB_r_T1 => StrbRT1::size(instr),
Code::STRB_r_T2 => StrbRT2::size(instr),
Code::STRD_i_T1_off => StrdIT1Off::size(instr),
Code::STRD_i_T1_post => StrdIT1Post::size(instr),
Code::STRD_i_T1_pre => StrdIT1Pre::size(instr),
Code::STREXB_T1 => StrexbT1::size(instr),
Code::STREXD_T1 => StrexdT1::size(instr),
Code::STREXH_T1 => StrexhT1::size(instr),
Code::STREX_T1 => StrexT1::size(instr),
Code::STRHT_T1 => StrhtT1::size(instr),
Code::STRH_i_T1 => StrhIT1::size(instr),
Code::STRH_i_T2 => StrhIT2::size(instr),
Code::STRH_i_T3_offn => StrhIT3Offn::size(instr),
Code::STRH_i_T3_post => StrhIT3Post::size(instr),
Code::STRH_i_T3_pre => StrhIT3Pre::size(instr),
Code::STRH_r_T1 => StrhRT1::size(instr),
Code::STRH_r_T2 => StrhRT2::size(instr),
Code::STRT_T1 => StrtT1::size(instr),
Code::STR_i_T1 => StrIT1::size(instr),
Code::STR_i_T2 => StrIT2::size(instr),
Code::STR_i_T3 => StrIT3::size(instr),
Code::STR_i_T4_off => StrIT4Off::size(instr),
Code::STR_i_T4_post => StrIT4Post::size(instr),
Code::STR_i_T4_pre => StrIT4Pre::size(instr),
Code::STR_r_T1 => StrRT1::size(instr),
Code::STR_r_T2 => StrRT2::size(instr),
Code::SUBS_PC_T5_AS => SubsPcT5As::size(instr),
Code::SUBS_SP_i_T2 => SubsSpIT2::size(instr),
Code::SUBS_SP_r_T1 => SubsSpRT1::size(instr),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::size(instr),
Code::SUBS_i_T3 => SubsIT3::size(instr),
Code::SUBS_r_T2 => SubsRT2::size(instr),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::size(instr),
Code::SUB_ADR_T2 => SubAdrT2::size(instr),
Code::SUB_SP_i_T1 => SubSpIT1::size(instr),
Code::SUB_SP_i_T2 => SubSpIT2::size(instr),
Code::SUB_SP_i_T3 => SubSpIT3::size(instr),
Code::SUB_SP_r_T1 => SubSpRT1::size(instr),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::size(instr),
Code::SUB_i_T1 => SubIT1::size(instr),
Code::SUB_i_T2 => SubIT2::size(instr),
Code::SUB_i_T3 => SubIT3::size(instr),
Code::SUB_i_T4 => SubIT4::size(instr),
Code::SUB_r_T1 => SubRT1::size(instr),
Code::SUB_r_T2 => SubRT2::size(instr),
Code::SUB_r_T2_RRX => SubRT2Rrx::size(instr),
Code::SVC_T1 => SvcT1::size(instr),
Code::SXTAB16_T1 => Sxtab16T1::size(instr),
Code::SXTAB_T1 => SxtabT1::size(instr),
Code::SXTAH_T1 => SxtahT1::size(instr),
Code::SXTB16_T1 => Sxtb16T1::size(instr),
Code::SXTB_T1 => SxtbT1::size(instr),
Code::SXTB_T2 => SxtbT2::size(instr),
Code::SXTH_T1 => SxthT1::size(instr),
Code::SXTH_T2 => SxthT2::size(instr),
Code::TBB_T1 => TbbT1::size(instr),
Code::TBH_T1 => TbhT1::size(instr),
Code::TEQ_i_T1 => TeqIT1::size(instr),
Code::TEQ_r_T1 => TeqRT1::size(instr),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::size(instr),
Code::TSB_T1 => TsbT1::size(instr),
Code::TST_i_T1 => TstIT1::size(instr),
Code::TST_r_T1 => TstRT1::size(instr),
Code::TST_r_T2 => TstRT2::size(instr),
Code::TST_r_T2_RRX => TstRT2Rrx::size(instr),
Code::UADD16_T1 => Uadd16T1::size(instr),
Code::UADD8_T1 => Uadd8T1::size(instr),
Code::UASX_T1 => UasxT1::size(instr),
Code::UBFX_T1 => UbfxT1::size(instr),
Code::UDF_T1 => UdfT1::size(instr),
Code::UDF_T2 => UdfT2::size(instr),
Code::UDIV_T1 => UdivT1::size(instr),
Code::UHADD16_T1 => Uhadd16T1::size(instr),
Code::UHADD8_T1 => Uhadd8T1::size(instr),
Code::UHASX_T1 => UhasxT1::size(instr),
Code::UHSAX_T1 => UhsaxT1::size(instr),
Code::UHSUB16_T1 => Uhsub16T1::size(instr),
Code::UHSUB8_T1 => Uhsub8T1::size(instr),
Code::UMAAL_T1 => UmaalT1::size(instr),
Code::UMLAL_T1 => UmlalT1::size(instr),
Code::UMULL_T1 => UmullT1::size(instr),
Code::UQADD16_T1 => Uqadd16T1::size(instr),
Code::UQADD8_T1 => Uqadd8T1::size(instr),
Code::UQASX_T1 => UqasxT1::size(instr),
Code::UQSAX_T1 => UqsaxT1::size(instr),
Code::UQSUB16_T1 => Uqsub16T1::size(instr),
Code::UQSUB8_T1 => Uqsub8T1::size(instr),
Code::USAD8_T1 => Usad8T1::size(instr),
Code::USADA8_T1 => Usada8T1::size(instr),
Code::USAT16_T1 => Usat16T1::size(instr),
Code::USAT_T1_ASR => UsatT1Asr::size(instr),
Code::USAT_T1_LSL => UsatT1Lsl::size(instr),
Code::USAX_T1 => UsaxT1::size(instr),
Code::USUB16_T1 => Usub16T1::size(instr),
Code::USUB8_T1 => Usub8T1::size(instr),
Code::UXTAB16_T1 => Uxtab16T1::size(instr),
Code::UXTAB_T1 => UxtabT1::size(instr),
Code::UXTAH_T1 => UxtahT1::size(instr),
Code::UXTB16_T1 => Uxtb16T1::size(instr),
Code::UXTB_T1 => UxtbT1::size(instr),
Code::UXTB_T2 => UxtbT2::size(instr),
Code::UXTH_T1 => UxthT1::size(instr),
Code::UXTH_T2 => UxthT2::size(instr),
Code::WFE_T1 => WfeT1::size(instr),
Code::WFE_T2 => WfeT2::size(instr),
Code::WFI_T1 => WfiT1::size(instr),
Code::WFI_T2 => WfiT2::size(instr),
Code::YIELD_T1 => YieldT1::size(instr),
Code::YIELD_T2 => YieldT2::size(instr),
}
}
pub fn condition(&self, instr: &Instruction) -> ConditionalInstruction {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::condition(instr),
Code::ADCS_r_T2 => AdcsRT2::condition(instr),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::condition(instr),
Code::ADC_i_T1 => AdcIT1::condition(instr),
Code::ADC_r_T1 => AdcRT1::condition(instr),
Code::ADC_r_T2 => AdcRT2::condition(instr),
Code::ADC_r_T2_RRX => AdcRT2Rrx::condition(instr),
Code::ADDS_SP_i_T3 => AddsSpIT3::condition(instr),
Code::ADDS_SP_r_T3 => AddsSpRT3::condition(instr),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::condition(instr),
Code::ADDS_i_T3 => AddsIT3::condition(instr),
Code::ADDS_r_T3 => AddsRT3::condition(instr),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::condition(instr),
Code::ADD_ADR_T1 => AddAdrT1::condition(instr),
Code::ADD_ADR_T3 => AddAdrT3::condition(instr),
Code::ADD_SP_i_T1 => AddSpIT1::condition(instr),
Code::ADD_SP_i_T2 => AddSpIT2::condition(instr),
Code::ADD_SP_i_T3 => AddSpIT3::condition(instr),
Code::ADD_SP_i_T4 => AddSpIT4::condition(instr),
Code::ADD_SP_r_T1 => AddSpRT1::condition(instr),
Code::ADD_SP_r_T2 => AddSpRT2::condition(instr),
Code::ADD_SP_r_T3 => AddSpRT3::condition(instr),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::condition(instr),
Code::ADD_i_T1 => AddIT1::condition(instr),
Code::ADD_i_T2 => AddIT2::condition(instr),
Code::ADD_i_T3 => AddIT3::condition(instr),
Code::ADD_i_T4 => AddIT4::condition(instr),
Code::ADD_r_T1 => AddRT1::condition(instr),
Code::ADD_r_T2 => AddRT2::condition(instr),
Code::ADD_r_T3 => AddRT3::condition(instr),
Code::ADD_r_T3_RRX => AddRT3Rrx::condition(instr),
Code::ADR_T1 => AdrT1::condition(instr),
Code::ADR_T2 => AdrT2::condition(instr),
Code::ADR_T3 => AdrT3::condition(instr),
Code::ANDS_i_T1 => AndsIT1::condition(instr),
Code::ANDS_r_T2 => AndsRT2::condition(instr),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::condition(instr),
Code::AND_i_T1 => AndIT1::condition(instr),
Code::AND_r_T1 => AndRT1::condition(instr),
Code::AND_r_T2 => AndRT2::condition(instr),
Code::AND_r_T2_RRX => AndRT2Rrx::condition(instr),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::condition(instr),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::condition(instr),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::condition(instr),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::condition(instr),
Code::ASR_MOV_r_T2 => AsrMovRT2::condition(instr),
Code::ASR_MOV_r_T3 => AsrMovRT3::condition(instr),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::condition(instr),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::condition(instr),
Code::BFC_T1 => BfcT1::condition(instr),
Code::BFI_T1 => BfiT1::condition(instr),
Code::BICS_i_T1 => BicsIT1::condition(instr),
Code::BICS_r_T2 => BicsRT2::condition(instr),
Code::BICS_r_T2_RRX => BicsRT2Rrx::condition(instr),
Code::BIC_i_T1 => BicIT1::condition(instr),
Code::BIC_r_T1 => BicRT1::condition(instr),
Code::BIC_r_T2 => BicRT2::condition(instr),
Code::BIC_r_T2_RRX => BicRT2Rrx::condition(instr),
Code::BKPT_T1 => BkptT1::condition(instr),
Code::BLX_r_T1 => BlxRT1::condition(instr),
Code::BL_i_T1 => BlIT1::condition(instr),
Code::BL_i_T2 => BlIT2::condition(instr),
Code::BXJ_T1 => BxjT1::condition(instr),
Code::BX_T1 => BxT1::condition(instr),
Code::B_T1 => BT1::condition(instr),
Code::B_T2 => BT2::condition(instr),
Code::B_T3 => BT3::condition(instr),
Code::B_T4 => BT4::condition(instr),
Code::CBNZ_T1 => CbnzT1::condition(instr),
Code::CBZ_T1 => CbzT1::condition(instr),
Code::CLRBHB_T1 => ClrbhbT1::condition(instr),
Code::CLREX_T1 => ClrexT1::condition(instr),
Code::CLZ_T1 => ClzT1::condition(instr),
Code::CMN_i_T1 => CmnIT1::condition(instr),
Code::CMN_r_T1 => CmnRT1::condition(instr),
Code::CMN_r_T2 => CmnRT2::condition(instr),
Code::CMN_r_T2_RRX => CmnRT2Rrx::condition(instr),
Code::CMP_i_T1 => CmpIT1::condition(instr),
Code::CMP_i_T2 => CmpIT2::condition(instr),
Code::CMP_r_T1 => CmpRT1::condition(instr),
Code::CMP_r_T2 => CmpRT2::condition(instr),
Code::CMP_r_T3 => CmpRT3::condition(instr),
Code::CMP_r_T3_RRX => CmpRT3Rrx::condition(instr),
Code::CPSID_T1_AS => CpsidT1As::condition(instr),
Code::CPSID_T2_AS => CpsidT2As::condition(instr),
Code::CPSID_T2_ASM => CpsidT2Asm::condition(instr),
Code::CPSIE_T1_AS => CpsieT1As::condition(instr),
Code::CPSIE_T2_AS => CpsieT2As::condition(instr),
Code::CPSIE_T2_ASM => CpsieT2Asm::condition(instr),
Code::CPS_T2_AS => CpsT2As::condition(instr),
Code::CRC32B_T1 => Crc32bT1::condition(instr),
Code::CRC32CB_T1 => Crc32cbT1::condition(instr),
Code::CRC32CH_T1 => Crc32chT1::condition(instr),
Code::CRC32CW_T1 => Crc32cwT1::condition(instr),
Code::CRC32H_T1 => Crc32hT1::condition(instr),
Code::CRC32W_T1 => Crc32wT1::condition(instr),
Code::CSDB_T1 => CsdbT1::condition(instr),
Code::DBG_T1 => DbgT1::condition(instr),
Code::DCPS1_T1 => Dcps1T1::condition(instr),
Code::DCPS2_T1 => Dcps2T1::condition(instr),
Code::DCPS3_T1 => Dcps3T1::condition(instr),
Code::DMB_T1 => DmbT1::condition(instr),
Code::DSB_T1 => DsbT1::condition(instr),
Code::EORS_i_T1 => EorsIT1::condition(instr),
Code::EORS_r_T2 => EorsRT2::condition(instr),
Code::EORS_r_T2_RRX => EorsRT2Rrx::condition(instr),
Code::EOR_i_T1 => EorIT1::condition(instr),
Code::EOR_r_T1 => EorRT1::condition(instr),
Code::EOR_r_T2 => EorRT2::condition(instr),
Code::EOR_r_T2_RRX => EorRT2Rrx::condition(instr),
Code::ERET_T1 => EretT1::condition(instr),
Code::ESB_T1 => EsbT1::condition(instr),
Code::HLT_T1 => HltT1::condition(instr),
Code::HVC_T1 => HvcT1::condition(instr),
Code::ISB_T1 => IsbT1::condition(instr),
Code::IT_T1 => ItT1::condition(instr),
Code::LDAB_T1 => LdabT1::condition(instr),
Code::LDAEXB_T1 => LdaexbT1::condition(instr),
Code::LDAEXD_T1 => LdaexdT1::condition(instr),
Code::LDAEXH_T1 => LdaexhT1::condition(instr),
Code::LDAEX_T1 => LdaexT1::condition(instr),
Code::LDAH_T1 => LdahT1::condition(instr),
Code::LDA_T1 => LdaT1::condition(instr),
Code::LDC_i_T1_off => LdcIT1Off::condition(instr),
Code::LDC_i_T1_post => LdcIT1Post::condition(instr),
Code::LDC_i_T1_pre => LdcIT1Pre::condition(instr),
Code::LDC_i_T1_unind => LdcIT1Unind::condition(instr),
Code::LDC_l_T1_off => LdcLT1Off::condition(instr),
Code::LDC_l_T1_post => LdcLT1Post::condition(instr),
Code::LDC_l_T1_pre => LdcLT1Pre::condition(instr),
Code::LDC_l_T1_unind => LdcLT1Unind::condition(instr),
Code::LDMDB_T1 => LdmdbT1::condition(instr),
Code::LDM_T1 => LdmT1::condition(instr),
Code::LDM_T2 => LdmT2::condition(instr),
Code::LDRBT_T1 => LdrbtT1::condition(instr),
Code::LDRB_i_T1 => LdrbIT1::condition(instr),
Code::LDRB_i_T2 => LdrbIT2::condition(instr),
Code::LDRB_i_T3_off => LdrbIT3Off::condition(instr),
Code::LDRB_i_T3_post => LdrbIT3Post::condition(instr),
Code::LDRB_i_T3_pre => LdrbIT3Pre::condition(instr),
Code::LDRB_l_T1 => LdrbLT1::condition(instr),
Code::LDRB_r_T1 => LdrbRT1::condition(instr),
Code::LDRB_r_T2 => LdrbRT2::condition(instr),
Code::LDRD_i_T1_off => LdrdIT1Off::condition(instr),
Code::LDRD_i_T1_post => LdrdIT1Post::condition(instr),
Code::LDRD_i_T1_pre => LdrdIT1Pre::condition(instr),
Code::LDRD_l_T1_off => LdrdLT1Off::condition(instr),
Code::LDRD_l_T1_post => LdrdLT1Post::condition(instr),
Code::LDRD_l_T1_pre => LdrdLT1Pre::condition(instr),
Code::LDREXB_T1 => LdrexbT1::condition(instr),
Code::LDREXD_T1 => LdrexdT1::condition(instr),
Code::LDREXH_T1 => LdrexhT1::condition(instr),
Code::LDREX_T1 => LdrexT1::condition(instr),
Code::LDRHT_T1 => LdrhtT1::condition(instr),
Code::LDRH_i_T1 => LdrhIT1::condition(instr),
Code::LDRH_i_T2 => LdrhIT2::condition(instr),
Code::LDRH_i_T3_off => LdrhIT3Off::condition(instr),
Code::LDRH_i_T3_post => LdrhIT3Post::condition(instr),
Code::LDRH_i_T3_pre => LdrhIT3Pre::condition(instr),
Code::LDRH_l_T1 => LdrhLT1::condition(instr),
Code::LDRH_r_T1 => LdrhRT1::condition(instr),
Code::LDRH_r_T2 => LdrhRT2::condition(instr),
Code::LDRSBT_T1 => LdrsbtT1::condition(instr),
Code::LDRSB_i_T1 => LdrsbIT1::condition(instr),
Code::LDRSB_i_T2_off => LdrsbIT2Off::condition(instr),
Code::LDRSB_i_T2_post => LdrsbIT2Post::condition(instr),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::condition(instr),
Code::LDRSB_l_T1 => LdrsbLT1::condition(instr),
Code::LDRSB_r_T1 => LdrsbRT1::condition(instr),
Code::LDRSB_r_T2 => LdrsbRT2::condition(instr),
Code::LDRSHT_T1 => LdrshtT1::condition(instr),
Code::LDRSH_i_T1 => LdrshIT1::condition(instr),
Code::LDRSH_i_T2_off => LdrshIT2Off::condition(instr),
Code::LDRSH_i_T2_post => LdrshIT2Post::condition(instr),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::condition(instr),
Code::LDRSH_l_T1 => LdrshLT1::condition(instr),
Code::LDRSH_r_T1 => LdrshRT1::condition(instr),
Code::LDRSH_r_T2 => LdrshRT2::condition(instr),
Code::LDRT_T1 => LdrtT1::condition(instr),
Code::LDR_i_T1 => LdrIT1::condition(instr),
Code::LDR_i_T2 => LdrIT2::condition(instr),
Code::LDR_i_T3 => LdrIT3::condition(instr),
Code::LDR_i_T4_off => LdrIT4Off::condition(instr),
Code::LDR_i_T4_post => LdrIT4Post::condition(instr),
Code::LDR_i_T4_pre => LdrIT4Pre::condition(instr),
Code::LDR_l_T2 => LdrLT2::condition(instr),
Code::LDR_r_T1 => LdrRT1::condition(instr),
Code::LDR_r_T2 => LdrRT2::condition(instr),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::condition(instr),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::condition(instr),
Code::LSLS_MOV_r_T2 => LslsMovRT2::condition(instr),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::condition(instr),
Code::LSL_MOV_r_T2 => LslMovRT2::condition(instr),
Code::LSL_MOV_r_T3 => LslMovRT3::condition(instr),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::condition(instr),
Code::LSL_MOV_rr_T2 => LslMovRrT2::condition(instr),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::condition(instr),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::condition(instr),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::condition(instr),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::condition(instr),
Code::LSR_MOV_r_T2 => LsrMovRT2::condition(instr),
Code::LSR_MOV_r_T3 => LsrMovRT3::condition(instr),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::condition(instr),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::condition(instr),
Code::MCRR_T1 => McrrT1::condition(instr),
Code::MCR_T1 => McrT1::condition(instr),
Code::MLA_T1 => MlaT1::condition(instr),
Code::MLS_T1 => MlsT1::condition(instr),
Code::MOVS_i_T2 => MovsIT2::condition(instr),
Code::MOVS_r_T3 => MovsRT3::condition(instr),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::condition(instr),
Code::MOVS_rr_T2 => MovsRrT2::condition(instr),
Code::MOVT_T1 => MovtT1::condition(instr),
Code::MOV_i_T1 => MovIT1::condition(instr),
Code::MOV_i_T2 => MovIT2::condition(instr),
Code::MOV_i_T3 => MovIT3::condition(instr),
Code::MOV_r_T1 => MovRT1::condition(instr),
Code::MOV_r_T2 => MovRT2::condition(instr),
Code::MOV_r_T3 => MovRT3::condition(instr),
Code::MOV_r_T3_RRX => MovRT3Rrx::condition(instr),
Code::MOV_rr_T1_ASR => MovRrT1Asr::condition(instr),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::condition(instr),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::condition(instr),
Code::MOV_rr_T1_ROR => MovRrT1Ror::condition(instr),
Code::MOV_rr_T2 => MovRrT2::condition(instr),
Code::MRC_T1 => MrcT1::condition(instr),
Code::MRRC_T1 => MrrcT1::condition(instr),
Code::MRS_T1_AS => MrsT1As::condition(instr),
Code::MRS_br_T1_AS => MrsBrT1As::condition(instr),
Code::MSR_br_T1_AS => MsrBrT1As::condition(instr),
Code::MSR_r_T1_AS => MsrRT1As::condition(instr),
Code::MUL_T1 => MulT1::condition(instr),
Code::MUL_T2 => MulT2::condition(instr),
Code::MVNS_i_T1 => MvnsIT1::condition(instr),
Code::MVNS_r_T2 => MvnsRT2::condition(instr),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::condition(instr),
Code::MVN_i_T1 => MvnIT1::condition(instr),
Code::MVN_r_T1 => MvnRT1::condition(instr),
Code::MVN_r_T2 => MvnRT2::condition(instr),
Code::MVN_r_T2_RRX => MvnRT2Rrx::condition(instr),
Code::NOP_T1 => NopT1::condition(instr),
Code::NOP_T2 => NopT2::condition(instr),
Code::ORNS_i_T1 => OrnsIT1::condition(instr),
Code::ORNS_r_T1 => OrnsRT1::condition(instr),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::condition(instr),
Code::ORN_i_T1 => OrnIT1::condition(instr),
Code::ORN_r_T1 => OrnRT1::condition(instr),
Code::ORN_r_T1_RRX => OrnRT1Rrx::condition(instr),
Code::ORRS_i_T1 => OrrsIT1::condition(instr),
Code::ORRS_r_T2 => OrrsRT2::condition(instr),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::condition(instr),
Code::ORR_i_T1 => OrrIT1::condition(instr),
Code::ORR_r_T1 => OrrRT1::condition(instr),
Code::ORR_r_T2 => OrrRT2::condition(instr),
Code::ORR_r_T2_RRX => OrrRT2Rrx::condition(instr),
Code::PKHBT_T1 => PkhbtT1::condition(instr),
Code::PKHTB_T1 => PkhtbT1::condition(instr),
Code::PLDW_i_T1 => PldwIT1::condition(instr),
Code::PLDW_i_T2 => PldwIT2::condition(instr),
Code::PLDW_r_T1 => PldwRT1::condition(instr),
Code::PLD_i_T1 => PldIT1::condition(instr),
Code::PLD_i_T2 => PldIT2::condition(instr),
Code::PLD_l_T1 => PldLT1::condition(instr),
Code::PLD_r_T1 => PldRT1::condition(instr),
Code::PLI_i_T1 => PliIT1::condition(instr),
Code::PLI_i_T2 => PliIT2::condition(instr),
Code::PLI_i_T3 => PliIT3::condition(instr),
Code::PLI_r_T1 => PliRT1::condition(instr),
Code::POP_LDM_T2 => PopLdmT2::condition(instr),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::condition(instr),
Code::POP_T1 => PopT1::condition(instr),
Code::PSSBB_T1 => PssbbT1::condition(instr),
Code::PUSH_STMDB_T1 => PushStmdbT1::condition(instr),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::condition(instr),
Code::PUSH_T1 => PushT1::condition(instr),
Code::QADD16_T1 => Qadd16T1::condition(instr),
Code::QADD8_T1 => Qadd8T1::condition(instr),
Code::QADD_T1 => QaddT1::condition(instr),
Code::QASX_T1 => QasxT1::condition(instr),
Code::QDADD_T1 => QdaddT1::condition(instr),
Code::QDSUB_T1 => QdsubT1::condition(instr),
Code::QSAX_T1 => QsaxT1::condition(instr),
Code::QSUB16_T1 => Qsub16T1::condition(instr),
Code::QSUB8_T1 => Qsub8T1::condition(instr),
Code::QSUB_T1 => QsubT1::condition(instr),
Code::RBIT_T1 => RbitT1::condition(instr),
Code::REV16_T1 => Rev16T1::condition(instr),
Code::REV16_T2 => Rev16T2::condition(instr),
Code::REVSH_T1 => RevshT1::condition(instr),
Code::REVSH_T2 => RevshT2::condition(instr),
Code::REV_T1 => RevT1::condition(instr),
Code::REV_T2 => RevT2::condition(instr),
Code::RFE_T1_AS => RfeT1As::condition(instr),
Code::RFE_T2_AS => RfeT2As::condition(instr),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::condition(instr),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::condition(instr),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::condition(instr),
Code::ROR_MOV_r_T3 => RorMovRT3::condition(instr),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::condition(instr),
Code::ROR_MOV_rr_T2 => RorMovRrT2::condition(instr),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::condition(instr),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::condition(instr),
Code::RSBS_i_T2 => RsbsIT2::condition(instr),
Code::RSBS_r_T1 => RsbsRT1::condition(instr),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::condition(instr),
Code::RSB_i_T1 => RsbIT1::condition(instr),
Code::RSB_i_T2 => RsbIT2::condition(instr),
Code::RSB_r_T1 => RsbRT1::condition(instr),
Code::RSB_r_T1_RRX => RsbRT1Rrx::condition(instr),
Code::SADD16_T1 => Sadd16T1::condition(instr),
Code::SADD8_T1 => Sadd8T1::condition(instr),
Code::SASX_T1 => SasxT1::condition(instr),
Code::SBCS_i_T1 => SbcsIT1::condition(instr),
Code::SBCS_r_T2 => SbcsRT2::condition(instr),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::condition(instr),
Code::SBC_i_T1 => SbcIT1::condition(instr),
Code::SBC_r_T1 => SbcRT1::condition(instr),
Code::SBC_r_T2 => SbcRT2::condition(instr),
Code::SBC_r_T2_RRX => SbcRT2Rrx::condition(instr),
Code::SBFX_T1 => SbfxT1::condition(instr),
Code::SB_T1 => SbT1::condition(instr),
Code::SDIV_T1 => SdivT1::condition(instr),
Code::SEL_T1 => SelT1::condition(instr),
Code::SETEND_T1 => SetendT1::condition(instr),
Code::SETPAN_T1 => SetpanT1::condition(instr),
Code::SEVL_T1 => SevlT1::condition(instr),
Code::SEVL_T2 => SevlT2::condition(instr),
Code::SEV_T1 => SevT1::condition(instr),
Code::SEV_T2 => SevT2::condition(instr),
Code::SHADD16_T1 => Shadd16T1::condition(instr),
Code::SHADD8_T1 => Shadd8T1::condition(instr),
Code::SHASX_T1 => ShasxT1::condition(instr),
Code::SHSAX_T1 => ShsaxT1::condition(instr),
Code::SHSUB16_T1 => Shsub16T1::condition(instr),
Code::SHSUB8_T1 => Shsub8T1::condition(instr),
Code::SMC_T1_AS => SmcT1As::condition(instr),
Code::SMLABB_T1 => SmlabbT1::condition(instr),
Code::SMLABT_T1 => SmlabtT1::condition(instr),
Code::SMLADX_T1 => SmladxT1::condition(instr),
Code::SMLAD_T1 => SmladT1::condition(instr),
Code::SMLALBB_T1 => SmlalbbT1::condition(instr),
Code::SMLALBT_T1 => SmlalbtT1::condition(instr),
Code::SMLALDX_T1 => SmlaldxT1::condition(instr),
Code::SMLALD_T1 => SmlaldT1::condition(instr),
Code::SMLALTB_T1 => SmlaltbT1::condition(instr),
Code::SMLALTT_T1 => SmlalttT1::condition(instr),
Code::SMLAL_T1 => SmlalT1::condition(instr),
Code::SMLATB_T1 => SmlatbT1::condition(instr),
Code::SMLATT_T1 => SmlattT1::condition(instr),
Code::SMLAWB_T1 => SmlawbT1::condition(instr),
Code::SMLAWT_T1 => SmlawtT1::condition(instr),
Code::SMLSDX_T1 => SmlsdxT1::condition(instr),
Code::SMLSD_T1 => SmlsdT1::condition(instr),
Code::SMLSLDX_T1 => SmlsldxT1::condition(instr),
Code::SMLSLD_T1 => SmlsldT1::condition(instr),
Code::SMMLAR_T1 => SmmlarT1::condition(instr),
Code::SMMLA_T1 => SmmlaT1::condition(instr),
Code::SMMLSR_T1 => SmmlsrT1::condition(instr),
Code::SMMLS_T1 => SmmlsT1::condition(instr),
Code::SMMULR_T1 => SmmulrT1::condition(instr),
Code::SMMUL_T1 => SmmulT1::condition(instr),
Code::SMUADX_T1 => SmuadxT1::condition(instr),
Code::SMUAD_T1 => SmuadT1::condition(instr),
Code::SMULBB_T1 => SmulbbT1::condition(instr),
Code::SMULBT_T1 => SmulbtT1::condition(instr),
Code::SMULL_T1 => SmullT1::condition(instr),
Code::SMULTB_T1 => SmultbT1::condition(instr),
Code::SMULTT_T1 => SmulttT1::condition(instr),
Code::SMULWB_T1 => SmulwbT1::condition(instr),
Code::SMULWT_T1 => SmulwtT1::condition(instr),
Code::SMUSDX_T1 => SmusdxT1::condition(instr),
Code::SMUSD_T1 => SmusdT1::condition(instr),
Code::SRS_T1_AS => SrsT1As::condition(instr),
Code::SRS_T2_AS => SrsT2As::condition(instr),
Code::SSAT16_T1 => Ssat16T1::condition(instr),
Code::SSAT_T1_ASR => SsatT1Asr::condition(instr),
Code::SSAT_T1_LSL => SsatT1Lsl::condition(instr),
Code::SSAX_T1 => SsaxT1::condition(instr),
Code::SSBB_T1 => SsbbT1::condition(instr),
Code::SSUB16_T1 => Ssub16T1::condition(instr),
Code::SSUB8_T1 => Ssub8T1::condition(instr),
Code::STC_T1_off => StcT1Off::condition(instr),
Code::STC_T1_post => StcT1Post::condition(instr),
Code::STC_T1_pre => StcT1Pre::condition(instr),
Code::STC_T1_unind => StcT1Unind::condition(instr),
Code::STLB_T1 => StlbT1::condition(instr),
Code::STLEXB_T1 => StlexbT1::condition(instr),
Code::STLEXD_T1 => StlexdT1::condition(instr),
Code::STLEXH_T1 => StlexhT1::condition(instr),
Code::STLEX_T1 => StlexT1::condition(instr),
Code::STLH_T1 => StlhT1::condition(instr),
Code::STL_T1 => StlT1::condition(instr),
Code::STMDB_T1 => StmdbT1::condition(instr),
Code::STM_T1 => StmT1::condition(instr),
Code::STM_T2 => StmT2::condition(instr),
Code::STRBT_T1 => StrbtT1::condition(instr),
Code::STRB_i_T1 => StrbIT1::condition(instr),
Code::STRB_i_T2 => StrbIT2::condition(instr),
Code::STRB_i_T3_offn => StrbIT3Offn::condition(instr),
Code::STRB_i_T3_post => StrbIT3Post::condition(instr),
Code::STRB_i_T3_pre => StrbIT3Pre::condition(instr),
Code::STRB_r_T1 => StrbRT1::condition(instr),
Code::STRB_r_T2 => StrbRT2::condition(instr),
Code::STRD_i_T1_off => StrdIT1Off::condition(instr),
Code::STRD_i_T1_post => StrdIT1Post::condition(instr),
Code::STRD_i_T1_pre => StrdIT1Pre::condition(instr),
Code::STREXB_T1 => StrexbT1::condition(instr),
Code::STREXD_T1 => StrexdT1::condition(instr),
Code::STREXH_T1 => StrexhT1::condition(instr),
Code::STREX_T1 => StrexT1::condition(instr),
Code::STRHT_T1 => StrhtT1::condition(instr),
Code::STRH_i_T1 => StrhIT1::condition(instr),
Code::STRH_i_T2 => StrhIT2::condition(instr),
Code::STRH_i_T3_offn => StrhIT3Offn::condition(instr),
Code::STRH_i_T3_post => StrhIT3Post::condition(instr),
Code::STRH_i_T3_pre => StrhIT3Pre::condition(instr),
Code::STRH_r_T1 => StrhRT1::condition(instr),
Code::STRH_r_T2 => StrhRT2::condition(instr),
Code::STRT_T1 => StrtT1::condition(instr),
Code::STR_i_T1 => StrIT1::condition(instr),
Code::STR_i_T2 => StrIT2::condition(instr),
Code::STR_i_T3 => StrIT3::condition(instr),
Code::STR_i_T4_off => StrIT4Off::condition(instr),
Code::STR_i_T4_post => StrIT4Post::condition(instr),
Code::STR_i_T4_pre => StrIT4Pre::condition(instr),
Code::STR_r_T1 => StrRT1::condition(instr),
Code::STR_r_T2 => StrRT2::condition(instr),
Code::SUBS_PC_T5_AS => SubsPcT5As::condition(instr),
Code::SUBS_SP_i_T2 => SubsSpIT2::condition(instr),
Code::SUBS_SP_r_T1 => SubsSpRT1::condition(instr),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::condition(instr),
Code::SUBS_i_T3 => SubsIT3::condition(instr),
Code::SUBS_r_T2 => SubsRT2::condition(instr),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::condition(instr),
Code::SUB_ADR_T2 => SubAdrT2::condition(instr),
Code::SUB_SP_i_T1 => SubSpIT1::condition(instr),
Code::SUB_SP_i_T2 => SubSpIT2::condition(instr),
Code::SUB_SP_i_T3 => SubSpIT3::condition(instr),
Code::SUB_SP_r_T1 => SubSpRT1::condition(instr),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::condition(instr),
Code::SUB_i_T1 => SubIT1::condition(instr),
Code::SUB_i_T2 => SubIT2::condition(instr),
Code::SUB_i_T3 => SubIT3::condition(instr),
Code::SUB_i_T4 => SubIT4::condition(instr),
Code::SUB_r_T1 => SubRT1::condition(instr),
Code::SUB_r_T2 => SubRT2::condition(instr),
Code::SUB_r_T2_RRX => SubRT2Rrx::condition(instr),
Code::SVC_T1 => SvcT1::condition(instr),
Code::SXTAB16_T1 => Sxtab16T1::condition(instr),
Code::SXTAB_T1 => SxtabT1::condition(instr),
Code::SXTAH_T1 => SxtahT1::condition(instr),
Code::SXTB16_T1 => Sxtb16T1::condition(instr),
Code::SXTB_T1 => SxtbT1::condition(instr),
Code::SXTB_T2 => SxtbT2::condition(instr),
Code::SXTH_T1 => SxthT1::condition(instr),
Code::SXTH_T2 => SxthT2::condition(instr),
Code::TBB_T1 => TbbT1::condition(instr),
Code::TBH_T1 => TbhT1::condition(instr),
Code::TEQ_i_T1 => TeqIT1::condition(instr),
Code::TEQ_r_T1 => TeqRT1::condition(instr),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::condition(instr),
Code::TSB_T1 => TsbT1::condition(instr),
Code::TST_i_T1 => TstIT1::condition(instr),
Code::TST_r_T1 => TstRT1::condition(instr),
Code::TST_r_T2 => TstRT2::condition(instr),
Code::TST_r_T2_RRX => TstRT2Rrx::condition(instr),
Code::UADD16_T1 => Uadd16T1::condition(instr),
Code::UADD8_T1 => Uadd8T1::condition(instr),
Code::UASX_T1 => UasxT1::condition(instr),
Code::UBFX_T1 => UbfxT1::condition(instr),
Code::UDF_T1 => UdfT1::condition(instr),
Code::UDF_T2 => UdfT2::condition(instr),
Code::UDIV_T1 => UdivT1::condition(instr),
Code::UHADD16_T1 => Uhadd16T1::condition(instr),
Code::UHADD8_T1 => Uhadd8T1::condition(instr),
Code::UHASX_T1 => UhasxT1::condition(instr),
Code::UHSAX_T1 => UhsaxT1::condition(instr),
Code::UHSUB16_T1 => Uhsub16T1::condition(instr),
Code::UHSUB8_T1 => Uhsub8T1::condition(instr),
Code::UMAAL_T1 => UmaalT1::condition(instr),
Code::UMLAL_T1 => UmlalT1::condition(instr),
Code::UMULL_T1 => UmullT1::condition(instr),
Code::UQADD16_T1 => Uqadd16T1::condition(instr),
Code::UQADD8_T1 => Uqadd8T1::condition(instr),
Code::UQASX_T1 => UqasxT1::condition(instr),
Code::UQSAX_T1 => UqsaxT1::condition(instr),
Code::UQSUB16_T1 => Uqsub16T1::condition(instr),
Code::UQSUB8_T1 => Uqsub8T1::condition(instr),
Code::USAD8_T1 => Usad8T1::condition(instr),
Code::USADA8_T1 => Usada8T1::condition(instr),
Code::USAT16_T1 => Usat16T1::condition(instr),
Code::USAT_T1_ASR => UsatT1Asr::condition(instr),
Code::USAT_T1_LSL => UsatT1Lsl::condition(instr),
Code::USAX_T1 => UsaxT1::condition(instr),
Code::USUB16_T1 => Usub16T1::condition(instr),
Code::USUB8_T1 => Usub8T1::condition(instr),
Code::UXTAB16_T1 => Uxtab16T1::condition(instr),
Code::UXTAB_T1 => UxtabT1::condition(instr),
Code::UXTAH_T1 => UxtahT1::condition(instr),
Code::UXTB16_T1 => Uxtb16T1::condition(instr),
Code::UXTB_T1 => UxtbT1::condition(instr),
Code::UXTB_T2 => UxtbT2::condition(instr),
Code::UXTH_T1 => UxthT1::condition(instr),
Code::UXTH_T2 => UxthT2::condition(instr),
Code::WFE_T1 => WfeT1::condition(instr),
Code::WFE_T2 => WfeT2::condition(instr),
Code::WFI_T1 => WfiT1::condition(instr),
Code::WFI_T2 => WfiT2::condition(instr),
Code::YIELD_T1 => YieldT1::condition(instr),
Code::YIELD_T2 => YieldT2::condition(instr),
}
}
pub fn check_op(&self, index: usize, instr: &Instruction, op: &Operand) -> Result<()> {
match index {
0 => self.check_op0(instr, op),
1 => self.check_op1(instr, op),
2 => self.check_op2(instr, op),
3 => self.check_op3(instr, op),
4 => self.check_op4(instr, op),
5 => self.check_op5(instr, op),
6 => self.check_op6(instr, op),
_ => todo!(),
}
}
pub fn check_op0(&self, instr: &Instruction, op: &Operand) -> Result<()> {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::check_op0(instr, op),
Code::ADCS_r_T2 => AdcsRT2::check_op0(instr, op),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::check_op0(instr, op),
Code::ADC_i_T1 => AdcIT1::check_op0(instr, op),
Code::ADC_r_T1 => AdcRT1::check_op0(instr, op),
Code::ADC_r_T2 => AdcRT2::check_op0(instr, op),
Code::ADC_r_T2_RRX => AdcRT2Rrx::check_op0(instr, op),
Code::ADDS_SP_i_T3 => AddsSpIT3::check_op0(instr, op),
Code::ADDS_SP_r_T3 => AddsSpRT3::check_op0(instr, op),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::check_op0(instr, op),
Code::ADDS_i_T3 => AddsIT3::check_op0(instr, op),
Code::ADDS_r_T3 => AddsRT3::check_op0(instr, op),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::check_op0(instr, op),
Code::ADD_ADR_T1 => AddAdrT1::check_op0(instr, op),
Code::ADD_ADR_T3 => AddAdrT3::check_op0(instr, op),
Code::ADD_SP_i_T1 => AddSpIT1::check_op0(instr, op),
Code::ADD_SP_i_T2 => AddSpIT2::check_op0(instr, op),
Code::ADD_SP_i_T3 => AddSpIT3::check_op0(instr, op),
Code::ADD_SP_i_T4 => AddSpIT4::check_op0(instr, op),
Code::ADD_SP_r_T1 => AddSpRT1::check_op0(instr, op),
Code::ADD_SP_r_T2 => AddSpRT2::check_op0(instr, op),
Code::ADD_SP_r_T3 => AddSpRT3::check_op0(instr, op),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::check_op0(instr, op),
Code::ADD_i_T1 => AddIT1::check_op0(instr, op),
Code::ADD_i_T2 => AddIT2::check_op0(instr, op),
Code::ADD_i_T3 => AddIT3::check_op0(instr, op),
Code::ADD_i_T4 => AddIT4::check_op0(instr, op),
Code::ADD_r_T1 => AddRT1::check_op0(instr, op),
Code::ADD_r_T2 => AddRT2::check_op0(instr, op),
Code::ADD_r_T3 => AddRT3::check_op0(instr, op),
Code::ADD_r_T3_RRX => AddRT3Rrx::check_op0(instr, op),
Code::ADR_T1 => AdrT1::check_op0(instr, op),
Code::ADR_T2 => AdrT2::check_op0(instr, op),
Code::ADR_T3 => AdrT3::check_op0(instr, op),
Code::ANDS_i_T1 => AndsIT1::check_op0(instr, op),
Code::ANDS_r_T2 => AndsRT2::check_op0(instr, op),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::check_op0(instr, op),
Code::AND_i_T1 => AndIT1::check_op0(instr, op),
Code::AND_r_T1 => AndRT1::check_op0(instr, op),
Code::AND_r_T2 => AndRT2::check_op0(instr, op),
Code::AND_r_T2_RRX => AndRT2Rrx::check_op0(instr, op),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::check_op0(instr, op),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::check_op0(instr, op),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::check_op0(instr, op),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::check_op0(instr, op),
Code::ASR_MOV_r_T2 => AsrMovRT2::check_op0(instr, op),
Code::ASR_MOV_r_T3 => AsrMovRT3::check_op0(instr, op),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::check_op0(instr, op),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::check_op0(instr, op),
Code::BFC_T1 => BfcT1::check_op0(instr, op),
Code::BFI_T1 => BfiT1::check_op0(instr, op),
Code::BICS_i_T1 => BicsIT1::check_op0(instr, op),
Code::BICS_r_T2 => BicsRT2::check_op0(instr, op),
Code::BICS_r_T2_RRX => BicsRT2Rrx::check_op0(instr, op),
Code::BIC_i_T1 => BicIT1::check_op0(instr, op),
Code::BIC_r_T1 => BicRT1::check_op0(instr, op),
Code::BIC_r_T2 => BicRT2::check_op0(instr, op),
Code::BIC_r_T2_RRX => BicRT2Rrx::check_op0(instr, op),
Code::BKPT_T1 => BkptT1::check_op0(instr, op),
Code::BLX_r_T1 => BlxRT1::check_op0(instr, op),
Code::BL_i_T1 => BlIT1::check_op0(instr, op),
Code::BL_i_T2 => BlIT2::check_op0(instr, op),
Code::BXJ_T1 => BxjT1::check_op0(instr, op),
Code::BX_T1 => BxT1::check_op0(instr, op),
Code::B_T1 => BT1::check_op0(instr, op),
Code::B_T2 => BT2::check_op0(instr, op),
Code::B_T3 => BT3::check_op0(instr, op),
Code::B_T4 => BT4::check_op0(instr, op),
Code::CBNZ_T1 => CbnzT1::check_op0(instr, op),
Code::CBZ_T1 => CbzT1::check_op0(instr, op),
Code::CLRBHB_T1 => ClrbhbT1::check_op0(instr, op),
Code::CLREX_T1 => ClrexT1::check_op0(instr, op),
Code::CLZ_T1 => ClzT1::check_op0(instr, op),
Code::CMN_i_T1 => CmnIT1::check_op0(instr, op),
Code::CMN_r_T1 => CmnRT1::check_op0(instr, op),
Code::CMN_r_T2 => CmnRT2::check_op0(instr, op),
Code::CMN_r_T2_RRX => CmnRT2Rrx::check_op0(instr, op),
Code::CMP_i_T1 => CmpIT1::check_op0(instr, op),
Code::CMP_i_T2 => CmpIT2::check_op0(instr, op),
Code::CMP_r_T1 => CmpRT1::check_op0(instr, op),
Code::CMP_r_T2 => CmpRT2::check_op0(instr, op),
Code::CMP_r_T3 => CmpRT3::check_op0(instr, op),
Code::CMP_r_T3_RRX => CmpRT3Rrx::check_op0(instr, op),
Code::CPSID_T1_AS => CpsidT1As::check_op0(instr, op),
Code::CPSID_T2_AS => CpsidT2As::check_op0(instr, op),
Code::CPSID_T2_ASM => CpsidT2Asm::check_op0(instr, op),
Code::CPSIE_T1_AS => CpsieT1As::check_op0(instr, op),
Code::CPSIE_T2_AS => CpsieT2As::check_op0(instr, op),
Code::CPSIE_T2_ASM => CpsieT2Asm::check_op0(instr, op),
Code::CPS_T2_AS => CpsT2As::check_op0(instr, op),
Code::CRC32B_T1 => Crc32bT1::check_op0(instr, op),
Code::CRC32CB_T1 => Crc32cbT1::check_op0(instr, op),
Code::CRC32CH_T1 => Crc32chT1::check_op0(instr, op),
Code::CRC32CW_T1 => Crc32cwT1::check_op0(instr, op),
Code::CRC32H_T1 => Crc32hT1::check_op0(instr, op),
Code::CRC32W_T1 => Crc32wT1::check_op0(instr, op),
Code::CSDB_T1 => CsdbT1::check_op0(instr, op),
Code::DBG_T1 => DbgT1::check_op0(instr, op),
Code::DCPS1_T1 => Dcps1T1::check_op0(instr, op),
Code::DCPS2_T1 => Dcps2T1::check_op0(instr, op),
Code::DCPS3_T1 => Dcps3T1::check_op0(instr, op),
Code::DMB_T1 => DmbT1::check_op0(instr, op),
Code::DSB_T1 => DsbT1::check_op0(instr, op),
Code::EORS_i_T1 => EorsIT1::check_op0(instr, op),
Code::EORS_r_T2 => EorsRT2::check_op0(instr, op),
Code::EORS_r_T2_RRX => EorsRT2Rrx::check_op0(instr, op),
Code::EOR_i_T1 => EorIT1::check_op0(instr, op),
Code::EOR_r_T1 => EorRT1::check_op0(instr, op),
Code::EOR_r_T2 => EorRT2::check_op0(instr, op),
Code::EOR_r_T2_RRX => EorRT2Rrx::check_op0(instr, op),
Code::ERET_T1 => EretT1::check_op0(instr, op),
Code::ESB_T1 => EsbT1::check_op0(instr, op),
Code::HLT_T1 => HltT1::check_op0(instr, op),
Code::HVC_T1 => HvcT1::check_op0(instr, op),
Code::ISB_T1 => IsbT1::check_op0(instr, op),
Code::IT_T1 => ItT1::check_op0(instr, op),
Code::LDAB_T1 => LdabT1::check_op0(instr, op),
Code::LDAEXB_T1 => LdaexbT1::check_op0(instr, op),
Code::LDAEXD_T1 => LdaexdT1::check_op0(instr, op),
Code::LDAEXH_T1 => LdaexhT1::check_op0(instr, op),
Code::LDAEX_T1 => LdaexT1::check_op0(instr, op),
Code::LDAH_T1 => LdahT1::check_op0(instr, op),
Code::LDA_T1 => LdaT1::check_op0(instr, op),
Code::LDC_i_T1_off => LdcIT1Off::check_op0(instr, op),
Code::LDC_i_T1_post => LdcIT1Post::check_op0(instr, op),
Code::LDC_i_T1_pre => LdcIT1Pre::check_op0(instr, op),
Code::LDC_i_T1_unind => LdcIT1Unind::check_op0(instr, op),
Code::LDC_l_T1_off => LdcLT1Off::check_op0(instr, op),
Code::LDC_l_T1_post => LdcLT1Post::check_op0(instr, op),
Code::LDC_l_T1_pre => LdcLT1Pre::check_op0(instr, op),
Code::LDC_l_T1_unind => LdcLT1Unind::check_op0(instr, op),
Code::LDMDB_T1 => LdmdbT1::check_op0(instr, op),
Code::LDM_T1 => LdmT1::check_op0(instr, op),
Code::LDM_T2 => LdmT2::check_op0(instr, op),
Code::LDRBT_T1 => LdrbtT1::check_op0(instr, op),
Code::LDRB_i_T1 => LdrbIT1::check_op0(instr, op),
Code::LDRB_i_T2 => LdrbIT2::check_op0(instr, op),
Code::LDRB_i_T3_off => LdrbIT3Off::check_op0(instr, op),
Code::LDRB_i_T3_post => LdrbIT3Post::check_op0(instr, op),
Code::LDRB_i_T3_pre => LdrbIT3Pre::check_op0(instr, op),
Code::LDRB_l_T1 => LdrbLT1::check_op0(instr, op),
Code::LDRB_r_T1 => LdrbRT1::check_op0(instr, op),
Code::LDRB_r_T2 => LdrbRT2::check_op0(instr, op),
Code::LDRD_i_T1_off => LdrdIT1Off::check_op0(instr, op),
Code::LDRD_i_T1_post => LdrdIT1Post::check_op0(instr, op),
Code::LDRD_i_T1_pre => LdrdIT1Pre::check_op0(instr, op),
Code::LDRD_l_T1_off => LdrdLT1Off::check_op0(instr, op),
Code::LDRD_l_T1_post => LdrdLT1Post::check_op0(instr, op),
Code::LDRD_l_T1_pre => LdrdLT1Pre::check_op0(instr, op),
Code::LDREXB_T1 => LdrexbT1::check_op0(instr, op),
Code::LDREXD_T1 => LdrexdT1::check_op0(instr, op),
Code::LDREXH_T1 => LdrexhT1::check_op0(instr, op),
Code::LDREX_T1 => LdrexT1::check_op0(instr, op),
Code::LDRHT_T1 => LdrhtT1::check_op0(instr, op),
Code::LDRH_i_T1 => LdrhIT1::check_op0(instr, op),
Code::LDRH_i_T2 => LdrhIT2::check_op0(instr, op),
Code::LDRH_i_T3_off => LdrhIT3Off::check_op0(instr, op),
Code::LDRH_i_T3_post => LdrhIT3Post::check_op0(instr, op),
Code::LDRH_i_T3_pre => LdrhIT3Pre::check_op0(instr, op),
Code::LDRH_l_T1 => LdrhLT1::check_op0(instr, op),
Code::LDRH_r_T1 => LdrhRT1::check_op0(instr, op),
Code::LDRH_r_T2 => LdrhRT2::check_op0(instr, op),
Code::LDRSBT_T1 => LdrsbtT1::check_op0(instr, op),
Code::LDRSB_i_T1 => LdrsbIT1::check_op0(instr, op),
Code::LDRSB_i_T2_off => LdrsbIT2Off::check_op0(instr, op),
Code::LDRSB_i_T2_post => LdrsbIT2Post::check_op0(instr, op),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::check_op0(instr, op),
Code::LDRSB_l_T1 => LdrsbLT1::check_op0(instr, op),
Code::LDRSB_r_T1 => LdrsbRT1::check_op0(instr, op),
Code::LDRSB_r_T2 => LdrsbRT2::check_op0(instr, op),
Code::LDRSHT_T1 => LdrshtT1::check_op0(instr, op),
Code::LDRSH_i_T1 => LdrshIT1::check_op0(instr, op),
Code::LDRSH_i_T2_off => LdrshIT2Off::check_op0(instr, op),
Code::LDRSH_i_T2_post => LdrshIT2Post::check_op0(instr, op),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::check_op0(instr, op),
Code::LDRSH_l_T1 => LdrshLT1::check_op0(instr, op),
Code::LDRSH_r_T1 => LdrshRT1::check_op0(instr, op),
Code::LDRSH_r_T2 => LdrshRT2::check_op0(instr, op),
Code::LDRT_T1 => LdrtT1::check_op0(instr, op),
Code::LDR_i_T1 => LdrIT1::check_op0(instr, op),
Code::LDR_i_T2 => LdrIT2::check_op0(instr, op),
Code::LDR_i_T3 => LdrIT3::check_op0(instr, op),
Code::LDR_i_T4_off => LdrIT4Off::check_op0(instr, op),
Code::LDR_i_T4_post => LdrIT4Post::check_op0(instr, op),
Code::LDR_i_T4_pre => LdrIT4Pre::check_op0(instr, op),
Code::LDR_l_T2 => LdrLT2::check_op0(instr, op),
Code::LDR_r_T1 => LdrRT1::check_op0(instr, op),
Code::LDR_r_T2 => LdrRT2::check_op0(instr, op),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::check_op0(instr, op),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::check_op0(instr, op),
Code::LSLS_MOV_r_T2 => LslsMovRT2::check_op0(instr, op),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::check_op0(instr, op),
Code::LSL_MOV_r_T2 => LslMovRT2::check_op0(instr, op),
Code::LSL_MOV_r_T3 => LslMovRT3::check_op0(instr, op),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::check_op0(instr, op),
Code::LSL_MOV_rr_T2 => LslMovRrT2::check_op0(instr, op),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::check_op0(instr, op),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::check_op0(instr, op),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::check_op0(instr, op),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::check_op0(instr, op),
Code::LSR_MOV_r_T2 => LsrMovRT2::check_op0(instr, op),
Code::LSR_MOV_r_T3 => LsrMovRT3::check_op0(instr, op),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::check_op0(instr, op),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::check_op0(instr, op),
Code::MCRR_T1 => McrrT1::check_op0(instr, op),
Code::MCR_T1 => McrT1::check_op0(instr, op),
Code::MLA_T1 => MlaT1::check_op0(instr, op),
Code::MLS_T1 => MlsT1::check_op0(instr, op),
Code::MOVS_i_T2 => MovsIT2::check_op0(instr, op),
Code::MOVS_r_T3 => MovsRT3::check_op0(instr, op),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::check_op0(instr, op),
Code::MOVS_rr_T2 => MovsRrT2::check_op0(instr, op),
Code::MOVT_T1 => MovtT1::check_op0(instr, op),
Code::MOV_i_T1 => MovIT1::check_op0(instr, op),
Code::MOV_i_T2 => MovIT2::check_op0(instr, op),
Code::MOV_i_T3 => MovIT3::check_op0(instr, op),
Code::MOV_r_T1 => MovRT1::check_op0(instr, op),
Code::MOV_r_T2 => MovRT2::check_op0(instr, op),
Code::MOV_r_T3 => MovRT3::check_op0(instr, op),
Code::MOV_r_T3_RRX => MovRT3Rrx::check_op0(instr, op),
Code::MOV_rr_T1_ASR => MovRrT1Asr::check_op0(instr, op),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::check_op0(instr, op),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::check_op0(instr, op),
Code::MOV_rr_T1_ROR => MovRrT1Ror::check_op0(instr, op),
Code::MOV_rr_T2 => MovRrT2::check_op0(instr, op),
Code::MRC_T1 => MrcT1::check_op0(instr, op),
Code::MRRC_T1 => MrrcT1::check_op0(instr, op),
Code::MRS_T1_AS => MrsT1As::check_op0(instr, op),
Code::MRS_br_T1_AS => MrsBrT1As::check_op0(instr, op),
Code::MSR_br_T1_AS => MsrBrT1As::check_op0(instr, op),
Code::MSR_r_T1_AS => MsrRT1As::check_op0(instr, op),
Code::MUL_T1 => MulT1::check_op0(instr, op),
Code::MUL_T2 => MulT2::check_op0(instr, op),
Code::MVNS_i_T1 => MvnsIT1::check_op0(instr, op),
Code::MVNS_r_T2 => MvnsRT2::check_op0(instr, op),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::check_op0(instr, op),
Code::MVN_i_T1 => MvnIT1::check_op0(instr, op),
Code::MVN_r_T1 => MvnRT1::check_op0(instr, op),
Code::MVN_r_T2 => MvnRT2::check_op0(instr, op),
Code::MVN_r_T2_RRX => MvnRT2Rrx::check_op0(instr, op),
Code::NOP_T1 => NopT1::check_op0(instr, op),
Code::NOP_T2 => NopT2::check_op0(instr, op),
Code::ORNS_i_T1 => OrnsIT1::check_op0(instr, op),
Code::ORNS_r_T1 => OrnsRT1::check_op0(instr, op),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::check_op0(instr, op),
Code::ORN_i_T1 => OrnIT1::check_op0(instr, op),
Code::ORN_r_T1 => OrnRT1::check_op0(instr, op),
Code::ORN_r_T1_RRX => OrnRT1Rrx::check_op0(instr, op),
Code::ORRS_i_T1 => OrrsIT1::check_op0(instr, op),
Code::ORRS_r_T2 => OrrsRT2::check_op0(instr, op),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::check_op0(instr, op),
Code::ORR_i_T1 => OrrIT1::check_op0(instr, op),
Code::ORR_r_T1 => OrrRT1::check_op0(instr, op),
Code::ORR_r_T2 => OrrRT2::check_op0(instr, op),
Code::ORR_r_T2_RRX => OrrRT2Rrx::check_op0(instr, op),
Code::PKHBT_T1 => PkhbtT1::check_op0(instr, op),
Code::PKHTB_T1 => PkhtbT1::check_op0(instr, op),
Code::PLDW_i_T1 => PldwIT1::check_op0(instr, op),
Code::PLDW_i_T2 => PldwIT2::check_op0(instr, op),
Code::PLDW_r_T1 => PldwRT1::check_op0(instr, op),
Code::PLD_i_T1 => PldIT1::check_op0(instr, op),
Code::PLD_i_T2 => PldIT2::check_op0(instr, op),
Code::PLD_l_T1 => PldLT1::check_op0(instr, op),
Code::PLD_r_T1 => PldRT1::check_op0(instr, op),
Code::PLI_i_T1 => PliIT1::check_op0(instr, op),
Code::PLI_i_T2 => PliIT2::check_op0(instr, op),
Code::PLI_i_T3 => PliIT3::check_op0(instr, op),
Code::PLI_r_T1 => PliRT1::check_op0(instr, op),
Code::POP_LDM_T2 => PopLdmT2::check_op0(instr, op),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::check_op0(instr, op),
Code::POP_T1 => PopT1::check_op0(instr, op),
Code::PSSBB_T1 => PssbbT1::check_op0(instr, op),
Code::PUSH_STMDB_T1 => PushStmdbT1::check_op0(instr, op),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::check_op0(instr, op),
Code::PUSH_T1 => PushT1::check_op0(instr, op),
Code::QADD16_T1 => Qadd16T1::check_op0(instr, op),
Code::QADD8_T1 => Qadd8T1::check_op0(instr, op),
Code::QADD_T1 => QaddT1::check_op0(instr, op),
Code::QASX_T1 => QasxT1::check_op0(instr, op),
Code::QDADD_T1 => QdaddT1::check_op0(instr, op),
Code::QDSUB_T1 => QdsubT1::check_op0(instr, op),
Code::QSAX_T1 => QsaxT1::check_op0(instr, op),
Code::QSUB16_T1 => Qsub16T1::check_op0(instr, op),
Code::QSUB8_T1 => Qsub8T1::check_op0(instr, op),
Code::QSUB_T1 => QsubT1::check_op0(instr, op),
Code::RBIT_T1 => RbitT1::check_op0(instr, op),
Code::REV16_T1 => Rev16T1::check_op0(instr, op),
Code::REV16_T2 => Rev16T2::check_op0(instr, op),
Code::REVSH_T1 => RevshT1::check_op0(instr, op),
Code::REVSH_T2 => RevshT2::check_op0(instr, op),
Code::REV_T1 => RevT1::check_op0(instr, op),
Code::REV_T2 => RevT2::check_op0(instr, op),
Code::RFE_T1_AS => RfeT1As::check_op0(instr, op),
Code::RFE_T2_AS => RfeT2As::check_op0(instr, op),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::check_op0(instr, op),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::check_op0(instr, op),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::check_op0(instr, op),
Code::ROR_MOV_r_T3 => RorMovRT3::check_op0(instr, op),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::check_op0(instr, op),
Code::ROR_MOV_rr_T2 => RorMovRrT2::check_op0(instr, op),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::check_op0(instr, op),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::check_op0(instr, op),
Code::RSBS_i_T2 => RsbsIT2::check_op0(instr, op),
Code::RSBS_r_T1 => RsbsRT1::check_op0(instr, op),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::check_op0(instr, op),
Code::RSB_i_T1 => RsbIT1::check_op0(instr, op),
Code::RSB_i_T2 => RsbIT2::check_op0(instr, op),
Code::RSB_r_T1 => RsbRT1::check_op0(instr, op),
Code::RSB_r_T1_RRX => RsbRT1Rrx::check_op0(instr, op),
Code::SADD16_T1 => Sadd16T1::check_op0(instr, op),
Code::SADD8_T1 => Sadd8T1::check_op0(instr, op),
Code::SASX_T1 => SasxT1::check_op0(instr, op),
Code::SBCS_i_T1 => SbcsIT1::check_op0(instr, op),
Code::SBCS_r_T2 => SbcsRT2::check_op0(instr, op),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::check_op0(instr, op),
Code::SBC_i_T1 => SbcIT1::check_op0(instr, op),
Code::SBC_r_T1 => SbcRT1::check_op0(instr, op),
Code::SBC_r_T2 => SbcRT2::check_op0(instr, op),
Code::SBC_r_T2_RRX => SbcRT2Rrx::check_op0(instr, op),
Code::SBFX_T1 => SbfxT1::check_op0(instr, op),
Code::SB_T1 => SbT1::check_op0(instr, op),
Code::SDIV_T1 => SdivT1::check_op0(instr, op),
Code::SEL_T1 => SelT1::check_op0(instr, op),
Code::SETEND_T1 => SetendT1::check_op0(instr, op),
Code::SETPAN_T1 => SetpanT1::check_op0(instr, op),
Code::SEVL_T1 => SevlT1::check_op0(instr, op),
Code::SEVL_T2 => SevlT2::check_op0(instr, op),
Code::SEV_T1 => SevT1::check_op0(instr, op),
Code::SEV_T2 => SevT2::check_op0(instr, op),
Code::SHADD16_T1 => Shadd16T1::check_op0(instr, op),
Code::SHADD8_T1 => Shadd8T1::check_op0(instr, op),
Code::SHASX_T1 => ShasxT1::check_op0(instr, op),
Code::SHSAX_T1 => ShsaxT1::check_op0(instr, op),
Code::SHSUB16_T1 => Shsub16T1::check_op0(instr, op),
Code::SHSUB8_T1 => Shsub8T1::check_op0(instr, op),
Code::SMC_T1_AS => SmcT1As::check_op0(instr, op),
Code::SMLABB_T1 => SmlabbT1::check_op0(instr, op),
Code::SMLABT_T1 => SmlabtT1::check_op0(instr, op),
Code::SMLADX_T1 => SmladxT1::check_op0(instr, op),
Code::SMLAD_T1 => SmladT1::check_op0(instr, op),
Code::SMLALBB_T1 => SmlalbbT1::check_op0(instr, op),
Code::SMLALBT_T1 => SmlalbtT1::check_op0(instr, op),
Code::SMLALDX_T1 => SmlaldxT1::check_op0(instr, op),
Code::SMLALD_T1 => SmlaldT1::check_op0(instr, op),
Code::SMLALTB_T1 => SmlaltbT1::check_op0(instr, op),
Code::SMLALTT_T1 => SmlalttT1::check_op0(instr, op),
Code::SMLAL_T1 => SmlalT1::check_op0(instr, op),
Code::SMLATB_T1 => SmlatbT1::check_op0(instr, op),
Code::SMLATT_T1 => SmlattT1::check_op0(instr, op),
Code::SMLAWB_T1 => SmlawbT1::check_op0(instr, op),
Code::SMLAWT_T1 => SmlawtT1::check_op0(instr, op),
Code::SMLSDX_T1 => SmlsdxT1::check_op0(instr, op),
Code::SMLSD_T1 => SmlsdT1::check_op0(instr, op),
Code::SMLSLDX_T1 => SmlsldxT1::check_op0(instr, op),
Code::SMLSLD_T1 => SmlsldT1::check_op0(instr, op),
Code::SMMLAR_T1 => SmmlarT1::check_op0(instr, op),
Code::SMMLA_T1 => SmmlaT1::check_op0(instr, op),
Code::SMMLSR_T1 => SmmlsrT1::check_op0(instr, op),
Code::SMMLS_T1 => SmmlsT1::check_op0(instr, op),
Code::SMMULR_T1 => SmmulrT1::check_op0(instr, op),
Code::SMMUL_T1 => SmmulT1::check_op0(instr, op),
Code::SMUADX_T1 => SmuadxT1::check_op0(instr, op),
Code::SMUAD_T1 => SmuadT1::check_op0(instr, op),
Code::SMULBB_T1 => SmulbbT1::check_op0(instr, op),
Code::SMULBT_T1 => SmulbtT1::check_op0(instr, op),
Code::SMULL_T1 => SmullT1::check_op0(instr, op),
Code::SMULTB_T1 => SmultbT1::check_op0(instr, op),
Code::SMULTT_T1 => SmulttT1::check_op0(instr, op),
Code::SMULWB_T1 => SmulwbT1::check_op0(instr, op),
Code::SMULWT_T1 => SmulwtT1::check_op0(instr, op),
Code::SMUSDX_T1 => SmusdxT1::check_op0(instr, op),
Code::SMUSD_T1 => SmusdT1::check_op0(instr, op),
Code::SRS_T1_AS => SrsT1As::check_op0(instr, op),
Code::SRS_T2_AS => SrsT2As::check_op0(instr, op),
Code::SSAT16_T1 => Ssat16T1::check_op0(instr, op),
Code::SSAT_T1_ASR => SsatT1Asr::check_op0(instr, op),
Code::SSAT_T1_LSL => SsatT1Lsl::check_op0(instr, op),
Code::SSAX_T1 => SsaxT1::check_op0(instr, op),
Code::SSBB_T1 => SsbbT1::check_op0(instr, op),
Code::SSUB16_T1 => Ssub16T1::check_op0(instr, op),
Code::SSUB8_T1 => Ssub8T1::check_op0(instr, op),
Code::STC_T1_off => StcT1Off::check_op0(instr, op),
Code::STC_T1_post => StcT1Post::check_op0(instr, op),
Code::STC_T1_pre => StcT1Pre::check_op0(instr, op),
Code::STC_T1_unind => StcT1Unind::check_op0(instr, op),
Code::STLB_T1 => StlbT1::check_op0(instr, op),
Code::STLEXB_T1 => StlexbT1::check_op0(instr, op),
Code::STLEXD_T1 => StlexdT1::check_op0(instr, op),
Code::STLEXH_T1 => StlexhT1::check_op0(instr, op),
Code::STLEX_T1 => StlexT1::check_op0(instr, op),
Code::STLH_T1 => StlhT1::check_op0(instr, op),
Code::STL_T1 => StlT1::check_op0(instr, op),
Code::STMDB_T1 => StmdbT1::check_op0(instr, op),
Code::STM_T1 => StmT1::check_op0(instr, op),
Code::STM_T2 => StmT2::check_op0(instr, op),
Code::STRBT_T1 => StrbtT1::check_op0(instr, op),
Code::STRB_i_T1 => StrbIT1::check_op0(instr, op),
Code::STRB_i_T2 => StrbIT2::check_op0(instr, op),
Code::STRB_i_T3_offn => StrbIT3Offn::check_op0(instr, op),
Code::STRB_i_T3_post => StrbIT3Post::check_op0(instr, op),
Code::STRB_i_T3_pre => StrbIT3Pre::check_op0(instr, op),
Code::STRB_r_T1 => StrbRT1::check_op0(instr, op),
Code::STRB_r_T2 => StrbRT2::check_op0(instr, op),
Code::STRD_i_T1_off => StrdIT1Off::check_op0(instr, op),
Code::STRD_i_T1_post => StrdIT1Post::check_op0(instr, op),
Code::STRD_i_T1_pre => StrdIT1Pre::check_op0(instr, op),
Code::STREXB_T1 => StrexbT1::check_op0(instr, op),
Code::STREXD_T1 => StrexdT1::check_op0(instr, op),
Code::STREXH_T1 => StrexhT1::check_op0(instr, op),
Code::STREX_T1 => StrexT1::check_op0(instr, op),
Code::STRHT_T1 => StrhtT1::check_op0(instr, op),
Code::STRH_i_T1 => StrhIT1::check_op0(instr, op),
Code::STRH_i_T2 => StrhIT2::check_op0(instr, op),
Code::STRH_i_T3_offn => StrhIT3Offn::check_op0(instr, op),
Code::STRH_i_T3_post => StrhIT3Post::check_op0(instr, op),
Code::STRH_i_T3_pre => StrhIT3Pre::check_op0(instr, op),
Code::STRH_r_T1 => StrhRT1::check_op0(instr, op),
Code::STRH_r_T2 => StrhRT2::check_op0(instr, op),
Code::STRT_T1 => StrtT1::check_op0(instr, op),
Code::STR_i_T1 => StrIT1::check_op0(instr, op),
Code::STR_i_T2 => StrIT2::check_op0(instr, op),
Code::STR_i_T3 => StrIT3::check_op0(instr, op),
Code::STR_i_T4_off => StrIT4Off::check_op0(instr, op),
Code::STR_i_T4_post => StrIT4Post::check_op0(instr, op),
Code::STR_i_T4_pre => StrIT4Pre::check_op0(instr, op),
Code::STR_r_T1 => StrRT1::check_op0(instr, op),
Code::STR_r_T2 => StrRT2::check_op0(instr, op),
Code::SUBS_PC_T5_AS => SubsPcT5As::check_op0(instr, op),
Code::SUBS_SP_i_T2 => SubsSpIT2::check_op0(instr, op),
Code::SUBS_SP_r_T1 => SubsSpRT1::check_op0(instr, op),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::check_op0(instr, op),
Code::SUBS_i_T3 => SubsIT3::check_op0(instr, op),
Code::SUBS_r_T2 => SubsRT2::check_op0(instr, op),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::check_op0(instr, op),
Code::SUB_ADR_T2 => SubAdrT2::check_op0(instr, op),
Code::SUB_SP_i_T1 => SubSpIT1::check_op0(instr, op),
Code::SUB_SP_i_T2 => SubSpIT2::check_op0(instr, op),
Code::SUB_SP_i_T3 => SubSpIT3::check_op0(instr, op),
Code::SUB_SP_r_T1 => SubSpRT1::check_op0(instr, op),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::check_op0(instr, op),
Code::SUB_i_T1 => SubIT1::check_op0(instr, op),
Code::SUB_i_T2 => SubIT2::check_op0(instr, op),
Code::SUB_i_T3 => SubIT3::check_op0(instr, op),
Code::SUB_i_T4 => SubIT4::check_op0(instr, op),
Code::SUB_r_T1 => SubRT1::check_op0(instr, op),
Code::SUB_r_T2 => SubRT2::check_op0(instr, op),
Code::SUB_r_T2_RRX => SubRT2Rrx::check_op0(instr, op),
Code::SVC_T1 => SvcT1::check_op0(instr, op),
Code::SXTAB16_T1 => Sxtab16T1::check_op0(instr, op),
Code::SXTAB_T1 => SxtabT1::check_op0(instr, op),
Code::SXTAH_T1 => SxtahT1::check_op0(instr, op),
Code::SXTB16_T1 => Sxtb16T1::check_op0(instr, op),
Code::SXTB_T1 => SxtbT1::check_op0(instr, op),
Code::SXTB_T2 => SxtbT2::check_op0(instr, op),
Code::SXTH_T1 => SxthT1::check_op0(instr, op),
Code::SXTH_T2 => SxthT2::check_op0(instr, op),
Code::TBB_T1 => TbbT1::check_op0(instr, op),
Code::TBH_T1 => TbhT1::check_op0(instr, op),
Code::TEQ_i_T1 => TeqIT1::check_op0(instr, op),
Code::TEQ_r_T1 => TeqRT1::check_op0(instr, op),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::check_op0(instr, op),
Code::TSB_T1 => TsbT1::check_op0(instr, op),
Code::TST_i_T1 => TstIT1::check_op0(instr, op),
Code::TST_r_T1 => TstRT1::check_op0(instr, op),
Code::TST_r_T2 => TstRT2::check_op0(instr, op),
Code::TST_r_T2_RRX => TstRT2Rrx::check_op0(instr, op),
Code::UADD16_T1 => Uadd16T1::check_op0(instr, op),
Code::UADD8_T1 => Uadd8T1::check_op0(instr, op),
Code::UASX_T1 => UasxT1::check_op0(instr, op),
Code::UBFX_T1 => UbfxT1::check_op0(instr, op),
Code::UDF_T1 => UdfT1::check_op0(instr, op),
Code::UDF_T2 => UdfT2::check_op0(instr, op),
Code::UDIV_T1 => UdivT1::check_op0(instr, op),
Code::UHADD16_T1 => Uhadd16T1::check_op0(instr, op),
Code::UHADD8_T1 => Uhadd8T1::check_op0(instr, op),
Code::UHASX_T1 => UhasxT1::check_op0(instr, op),
Code::UHSAX_T1 => UhsaxT1::check_op0(instr, op),
Code::UHSUB16_T1 => Uhsub16T1::check_op0(instr, op),
Code::UHSUB8_T1 => Uhsub8T1::check_op0(instr, op),
Code::UMAAL_T1 => UmaalT1::check_op0(instr, op),
Code::UMLAL_T1 => UmlalT1::check_op0(instr, op),
Code::UMULL_T1 => UmullT1::check_op0(instr, op),
Code::UQADD16_T1 => Uqadd16T1::check_op0(instr, op),
Code::UQADD8_T1 => Uqadd8T1::check_op0(instr, op),
Code::UQASX_T1 => UqasxT1::check_op0(instr, op),
Code::UQSAX_T1 => UqsaxT1::check_op0(instr, op),
Code::UQSUB16_T1 => Uqsub16T1::check_op0(instr, op),
Code::UQSUB8_T1 => Uqsub8T1::check_op0(instr, op),
Code::USAD8_T1 => Usad8T1::check_op0(instr, op),
Code::USADA8_T1 => Usada8T1::check_op0(instr, op),
Code::USAT16_T1 => Usat16T1::check_op0(instr, op),
Code::USAT_T1_ASR => UsatT1Asr::check_op0(instr, op),
Code::USAT_T1_LSL => UsatT1Lsl::check_op0(instr, op),
Code::USAX_T1 => UsaxT1::check_op0(instr, op),
Code::USUB16_T1 => Usub16T1::check_op0(instr, op),
Code::USUB8_T1 => Usub8T1::check_op0(instr, op),
Code::UXTAB16_T1 => Uxtab16T1::check_op0(instr, op),
Code::UXTAB_T1 => UxtabT1::check_op0(instr, op),
Code::UXTAH_T1 => UxtahT1::check_op0(instr, op),
Code::UXTB16_T1 => Uxtb16T1::check_op0(instr, op),
Code::UXTB_T1 => UxtbT1::check_op0(instr, op),
Code::UXTB_T2 => UxtbT2::check_op0(instr, op),
Code::UXTH_T1 => UxthT1::check_op0(instr, op),
Code::UXTH_T2 => UxthT2::check_op0(instr, op),
Code::WFE_T1 => WfeT1::check_op0(instr, op),
Code::WFE_T2 => WfeT2::check_op0(instr, op),
Code::WFI_T1 => WfiT1::check_op0(instr, op),
Code::WFI_T2 => WfiT2::check_op0(instr, op),
Code::YIELD_T1 => YieldT1::check_op0(instr, op),
Code::YIELD_T2 => YieldT2::check_op0(instr, op),
}
}
pub fn check_op1(&self, instr: &Instruction, op: &Operand) -> Result<()> {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::check_op1(instr, op),
Code::ADCS_r_T2 => AdcsRT2::check_op1(instr, op),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::check_op1(instr, op),
Code::ADC_i_T1 => AdcIT1::check_op1(instr, op),
Code::ADC_r_T1 => AdcRT1::check_op1(instr, op),
Code::ADC_r_T2 => AdcRT2::check_op1(instr, op),
Code::ADC_r_T2_RRX => AdcRT2Rrx::check_op1(instr, op),
Code::ADDS_SP_i_T3 => AddsSpIT3::check_op1(instr, op),
Code::ADDS_SP_r_T3 => AddsSpRT3::check_op1(instr, op),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::check_op1(instr, op),
Code::ADDS_i_T3 => AddsIT3::check_op1(instr, op),
Code::ADDS_r_T3 => AddsRT3::check_op1(instr, op),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::check_op1(instr, op),
Code::ADD_ADR_T1 => AddAdrT1::check_op1(instr, op),
Code::ADD_ADR_T3 => AddAdrT3::check_op1(instr, op),
Code::ADD_SP_i_T1 => AddSpIT1::check_op1(instr, op),
Code::ADD_SP_i_T2 => AddSpIT2::check_op1(instr, op),
Code::ADD_SP_i_T3 => AddSpIT3::check_op1(instr, op),
Code::ADD_SP_i_T4 => AddSpIT4::check_op1(instr, op),
Code::ADD_SP_r_T1 => AddSpRT1::check_op1(instr, op),
Code::ADD_SP_r_T2 => AddSpRT2::check_op1(instr, op),
Code::ADD_SP_r_T3 => AddSpRT3::check_op1(instr, op),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::check_op1(instr, op),
Code::ADD_i_T1 => AddIT1::check_op1(instr, op),
Code::ADD_i_T2 => AddIT2::check_op1(instr, op),
Code::ADD_i_T3 => AddIT3::check_op1(instr, op),
Code::ADD_i_T4 => AddIT4::check_op1(instr, op),
Code::ADD_r_T1 => AddRT1::check_op1(instr, op),
Code::ADD_r_T2 => AddRT2::check_op1(instr, op),
Code::ADD_r_T3 => AddRT3::check_op1(instr, op),
Code::ADD_r_T3_RRX => AddRT3Rrx::check_op1(instr, op),
Code::ADR_T1 => AdrT1::check_op1(instr, op),
Code::ADR_T2 => AdrT2::check_op1(instr, op),
Code::ADR_T3 => AdrT3::check_op1(instr, op),
Code::ANDS_i_T1 => AndsIT1::check_op1(instr, op),
Code::ANDS_r_T2 => AndsRT2::check_op1(instr, op),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::check_op1(instr, op),
Code::AND_i_T1 => AndIT1::check_op1(instr, op),
Code::AND_r_T1 => AndRT1::check_op1(instr, op),
Code::AND_r_T2 => AndRT2::check_op1(instr, op),
Code::AND_r_T2_RRX => AndRT2Rrx::check_op1(instr, op),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::check_op1(instr, op),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::check_op1(instr, op),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::check_op1(instr, op),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::check_op1(instr, op),
Code::ASR_MOV_r_T2 => AsrMovRT2::check_op1(instr, op),
Code::ASR_MOV_r_T3 => AsrMovRT3::check_op1(instr, op),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::check_op1(instr, op),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::check_op1(instr, op),
Code::BFC_T1 => BfcT1::check_op1(instr, op),
Code::BFI_T1 => BfiT1::check_op1(instr, op),
Code::BICS_i_T1 => BicsIT1::check_op1(instr, op),
Code::BICS_r_T2 => BicsRT2::check_op1(instr, op),
Code::BICS_r_T2_RRX => BicsRT2Rrx::check_op1(instr, op),
Code::BIC_i_T1 => BicIT1::check_op1(instr, op),
Code::BIC_r_T1 => BicRT1::check_op1(instr, op),
Code::BIC_r_T2 => BicRT2::check_op1(instr, op),
Code::BIC_r_T2_RRX => BicRT2Rrx::check_op1(instr, op),
Code::BKPT_T1 => BkptT1::check_op1(instr, op),
Code::BLX_r_T1 => BlxRT1::check_op1(instr, op),
Code::BL_i_T1 => BlIT1::check_op1(instr, op),
Code::BL_i_T2 => BlIT2::check_op1(instr, op),
Code::BXJ_T1 => BxjT1::check_op1(instr, op),
Code::BX_T1 => BxT1::check_op1(instr, op),
Code::B_T1 => BT1::check_op1(instr, op),
Code::B_T2 => BT2::check_op1(instr, op),
Code::B_T3 => BT3::check_op1(instr, op),
Code::B_T4 => BT4::check_op1(instr, op),
Code::CBNZ_T1 => CbnzT1::check_op1(instr, op),
Code::CBZ_T1 => CbzT1::check_op1(instr, op),
Code::CLRBHB_T1 => ClrbhbT1::check_op1(instr, op),
Code::CLREX_T1 => ClrexT1::check_op1(instr, op),
Code::CLZ_T1 => ClzT1::check_op1(instr, op),
Code::CMN_i_T1 => CmnIT1::check_op1(instr, op),
Code::CMN_r_T1 => CmnRT1::check_op1(instr, op),
Code::CMN_r_T2 => CmnRT2::check_op1(instr, op),
Code::CMN_r_T2_RRX => CmnRT2Rrx::check_op1(instr, op),
Code::CMP_i_T1 => CmpIT1::check_op1(instr, op),
Code::CMP_i_T2 => CmpIT2::check_op1(instr, op),
Code::CMP_r_T1 => CmpRT1::check_op1(instr, op),
Code::CMP_r_T2 => CmpRT2::check_op1(instr, op),
Code::CMP_r_T3 => CmpRT3::check_op1(instr, op),
Code::CMP_r_T3_RRX => CmpRT3Rrx::check_op1(instr, op),
Code::CPSID_T1_AS => CpsidT1As::check_op1(instr, op),
Code::CPSID_T2_AS => CpsidT2As::check_op1(instr, op),
Code::CPSID_T2_ASM => CpsidT2Asm::check_op1(instr, op),
Code::CPSIE_T1_AS => CpsieT1As::check_op1(instr, op),
Code::CPSIE_T2_AS => CpsieT2As::check_op1(instr, op),
Code::CPSIE_T2_ASM => CpsieT2Asm::check_op1(instr, op),
Code::CPS_T2_AS => CpsT2As::check_op1(instr, op),
Code::CRC32B_T1 => Crc32bT1::check_op1(instr, op),
Code::CRC32CB_T1 => Crc32cbT1::check_op1(instr, op),
Code::CRC32CH_T1 => Crc32chT1::check_op1(instr, op),
Code::CRC32CW_T1 => Crc32cwT1::check_op1(instr, op),
Code::CRC32H_T1 => Crc32hT1::check_op1(instr, op),
Code::CRC32W_T1 => Crc32wT1::check_op1(instr, op),
Code::CSDB_T1 => CsdbT1::check_op1(instr, op),
Code::DBG_T1 => DbgT1::check_op1(instr, op),
Code::DCPS1_T1 => Dcps1T1::check_op1(instr, op),
Code::DCPS2_T1 => Dcps2T1::check_op1(instr, op),
Code::DCPS3_T1 => Dcps3T1::check_op1(instr, op),
Code::DMB_T1 => DmbT1::check_op1(instr, op),
Code::DSB_T1 => DsbT1::check_op1(instr, op),
Code::EORS_i_T1 => EorsIT1::check_op1(instr, op),
Code::EORS_r_T2 => EorsRT2::check_op1(instr, op),
Code::EORS_r_T2_RRX => EorsRT2Rrx::check_op1(instr, op),
Code::EOR_i_T1 => EorIT1::check_op1(instr, op),
Code::EOR_r_T1 => EorRT1::check_op1(instr, op),
Code::EOR_r_T2 => EorRT2::check_op1(instr, op),
Code::EOR_r_T2_RRX => EorRT2Rrx::check_op1(instr, op),
Code::ERET_T1 => EretT1::check_op1(instr, op),
Code::ESB_T1 => EsbT1::check_op1(instr, op),
Code::HLT_T1 => HltT1::check_op1(instr, op),
Code::HVC_T1 => HvcT1::check_op1(instr, op),
Code::ISB_T1 => IsbT1::check_op1(instr, op),
Code::IT_T1 => ItT1::check_op1(instr, op),
Code::LDAB_T1 => LdabT1::check_op1(instr, op),
Code::LDAEXB_T1 => LdaexbT1::check_op1(instr, op),
Code::LDAEXD_T1 => LdaexdT1::check_op1(instr, op),
Code::LDAEXH_T1 => LdaexhT1::check_op1(instr, op),
Code::LDAEX_T1 => LdaexT1::check_op1(instr, op),
Code::LDAH_T1 => LdahT1::check_op1(instr, op),
Code::LDA_T1 => LdaT1::check_op1(instr, op),
Code::LDC_i_T1_off => LdcIT1Off::check_op1(instr, op),
Code::LDC_i_T1_post => LdcIT1Post::check_op1(instr, op),
Code::LDC_i_T1_pre => LdcIT1Pre::check_op1(instr, op),
Code::LDC_i_T1_unind => LdcIT1Unind::check_op1(instr, op),
Code::LDC_l_T1_off => LdcLT1Off::check_op1(instr, op),
Code::LDC_l_T1_post => LdcLT1Post::check_op1(instr, op),
Code::LDC_l_T1_pre => LdcLT1Pre::check_op1(instr, op),
Code::LDC_l_T1_unind => LdcLT1Unind::check_op1(instr, op),
Code::LDMDB_T1 => LdmdbT1::check_op1(instr, op),
Code::LDM_T1 => LdmT1::check_op1(instr, op),
Code::LDM_T2 => LdmT2::check_op1(instr, op),
Code::LDRBT_T1 => LdrbtT1::check_op1(instr, op),
Code::LDRB_i_T1 => LdrbIT1::check_op1(instr, op),
Code::LDRB_i_T2 => LdrbIT2::check_op1(instr, op),
Code::LDRB_i_T3_off => LdrbIT3Off::check_op1(instr, op),
Code::LDRB_i_T3_post => LdrbIT3Post::check_op1(instr, op),
Code::LDRB_i_T3_pre => LdrbIT3Pre::check_op1(instr, op),
Code::LDRB_l_T1 => LdrbLT1::check_op1(instr, op),
Code::LDRB_r_T1 => LdrbRT1::check_op1(instr, op),
Code::LDRB_r_T2 => LdrbRT2::check_op1(instr, op),
Code::LDRD_i_T1_off => LdrdIT1Off::check_op1(instr, op),
Code::LDRD_i_T1_post => LdrdIT1Post::check_op1(instr, op),
Code::LDRD_i_T1_pre => LdrdIT1Pre::check_op1(instr, op),
Code::LDRD_l_T1_off => LdrdLT1Off::check_op1(instr, op),
Code::LDRD_l_T1_post => LdrdLT1Post::check_op1(instr, op),
Code::LDRD_l_T1_pre => LdrdLT1Pre::check_op1(instr, op),
Code::LDREXB_T1 => LdrexbT1::check_op1(instr, op),
Code::LDREXD_T1 => LdrexdT1::check_op1(instr, op),
Code::LDREXH_T1 => LdrexhT1::check_op1(instr, op),
Code::LDREX_T1 => LdrexT1::check_op1(instr, op),
Code::LDRHT_T1 => LdrhtT1::check_op1(instr, op),
Code::LDRH_i_T1 => LdrhIT1::check_op1(instr, op),
Code::LDRH_i_T2 => LdrhIT2::check_op1(instr, op),
Code::LDRH_i_T3_off => LdrhIT3Off::check_op1(instr, op),
Code::LDRH_i_T3_post => LdrhIT3Post::check_op1(instr, op),
Code::LDRH_i_T3_pre => LdrhIT3Pre::check_op1(instr, op),
Code::LDRH_l_T1 => LdrhLT1::check_op1(instr, op),
Code::LDRH_r_T1 => LdrhRT1::check_op1(instr, op),
Code::LDRH_r_T2 => LdrhRT2::check_op1(instr, op),
Code::LDRSBT_T1 => LdrsbtT1::check_op1(instr, op),
Code::LDRSB_i_T1 => LdrsbIT1::check_op1(instr, op),
Code::LDRSB_i_T2_off => LdrsbIT2Off::check_op1(instr, op),
Code::LDRSB_i_T2_post => LdrsbIT2Post::check_op1(instr, op),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::check_op1(instr, op),
Code::LDRSB_l_T1 => LdrsbLT1::check_op1(instr, op),
Code::LDRSB_r_T1 => LdrsbRT1::check_op1(instr, op),
Code::LDRSB_r_T2 => LdrsbRT2::check_op1(instr, op),
Code::LDRSHT_T1 => LdrshtT1::check_op1(instr, op),
Code::LDRSH_i_T1 => LdrshIT1::check_op1(instr, op),
Code::LDRSH_i_T2_off => LdrshIT2Off::check_op1(instr, op),
Code::LDRSH_i_T2_post => LdrshIT2Post::check_op1(instr, op),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::check_op1(instr, op),
Code::LDRSH_l_T1 => LdrshLT1::check_op1(instr, op),
Code::LDRSH_r_T1 => LdrshRT1::check_op1(instr, op),
Code::LDRSH_r_T2 => LdrshRT2::check_op1(instr, op),
Code::LDRT_T1 => LdrtT1::check_op1(instr, op),
Code::LDR_i_T1 => LdrIT1::check_op1(instr, op),
Code::LDR_i_T2 => LdrIT2::check_op1(instr, op),
Code::LDR_i_T3 => LdrIT3::check_op1(instr, op),
Code::LDR_i_T4_off => LdrIT4Off::check_op1(instr, op),
Code::LDR_i_T4_post => LdrIT4Post::check_op1(instr, op),
Code::LDR_i_T4_pre => LdrIT4Pre::check_op1(instr, op),
Code::LDR_l_T2 => LdrLT2::check_op1(instr, op),
Code::LDR_r_T1 => LdrRT1::check_op1(instr, op),
Code::LDR_r_T2 => LdrRT2::check_op1(instr, op),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::check_op1(instr, op),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::check_op1(instr, op),
Code::LSLS_MOV_r_T2 => LslsMovRT2::check_op1(instr, op),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::check_op1(instr, op),
Code::LSL_MOV_r_T2 => LslMovRT2::check_op1(instr, op),
Code::LSL_MOV_r_T3 => LslMovRT3::check_op1(instr, op),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::check_op1(instr, op),
Code::LSL_MOV_rr_T2 => LslMovRrT2::check_op1(instr, op),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::check_op1(instr, op),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::check_op1(instr, op),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::check_op1(instr, op),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::check_op1(instr, op),
Code::LSR_MOV_r_T2 => LsrMovRT2::check_op1(instr, op),
Code::LSR_MOV_r_T3 => LsrMovRT3::check_op1(instr, op),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::check_op1(instr, op),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::check_op1(instr, op),
Code::MCRR_T1 => McrrT1::check_op1(instr, op),
Code::MCR_T1 => McrT1::check_op1(instr, op),
Code::MLA_T1 => MlaT1::check_op1(instr, op),
Code::MLS_T1 => MlsT1::check_op1(instr, op),
Code::MOVS_i_T2 => MovsIT2::check_op1(instr, op),
Code::MOVS_r_T3 => MovsRT3::check_op1(instr, op),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::check_op1(instr, op),
Code::MOVS_rr_T2 => MovsRrT2::check_op1(instr, op),
Code::MOVT_T1 => MovtT1::check_op1(instr, op),
Code::MOV_i_T1 => MovIT1::check_op1(instr, op),
Code::MOV_i_T2 => MovIT2::check_op1(instr, op),
Code::MOV_i_T3 => MovIT3::check_op1(instr, op),
Code::MOV_r_T1 => MovRT1::check_op1(instr, op),
Code::MOV_r_T2 => MovRT2::check_op1(instr, op),
Code::MOV_r_T3 => MovRT3::check_op1(instr, op),
Code::MOV_r_T3_RRX => MovRT3Rrx::check_op1(instr, op),
Code::MOV_rr_T1_ASR => MovRrT1Asr::check_op1(instr, op),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::check_op1(instr, op),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::check_op1(instr, op),
Code::MOV_rr_T1_ROR => MovRrT1Ror::check_op1(instr, op),
Code::MOV_rr_T2 => MovRrT2::check_op1(instr, op),
Code::MRC_T1 => MrcT1::check_op1(instr, op),
Code::MRRC_T1 => MrrcT1::check_op1(instr, op),
Code::MRS_T1_AS => MrsT1As::check_op1(instr, op),
Code::MRS_br_T1_AS => MrsBrT1As::check_op1(instr, op),
Code::MSR_br_T1_AS => MsrBrT1As::check_op1(instr, op),
Code::MSR_r_T1_AS => MsrRT1As::check_op1(instr, op),
Code::MUL_T1 => MulT1::check_op1(instr, op),
Code::MUL_T2 => MulT2::check_op1(instr, op),
Code::MVNS_i_T1 => MvnsIT1::check_op1(instr, op),
Code::MVNS_r_T2 => MvnsRT2::check_op1(instr, op),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::check_op1(instr, op),
Code::MVN_i_T1 => MvnIT1::check_op1(instr, op),
Code::MVN_r_T1 => MvnRT1::check_op1(instr, op),
Code::MVN_r_T2 => MvnRT2::check_op1(instr, op),
Code::MVN_r_T2_RRX => MvnRT2Rrx::check_op1(instr, op),
Code::NOP_T1 => NopT1::check_op1(instr, op),
Code::NOP_T2 => NopT2::check_op1(instr, op),
Code::ORNS_i_T1 => OrnsIT1::check_op1(instr, op),
Code::ORNS_r_T1 => OrnsRT1::check_op1(instr, op),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::check_op1(instr, op),
Code::ORN_i_T1 => OrnIT1::check_op1(instr, op),
Code::ORN_r_T1 => OrnRT1::check_op1(instr, op),
Code::ORN_r_T1_RRX => OrnRT1Rrx::check_op1(instr, op),
Code::ORRS_i_T1 => OrrsIT1::check_op1(instr, op),
Code::ORRS_r_T2 => OrrsRT2::check_op1(instr, op),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::check_op1(instr, op),
Code::ORR_i_T1 => OrrIT1::check_op1(instr, op),
Code::ORR_r_T1 => OrrRT1::check_op1(instr, op),
Code::ORR_r_T2 => OrrRT2::check_op1(instr, op),
Code::ORR_r_T2_RRX => OrrRT2Rrx::check_op1(instr, op),
Code::PKHBT_T1 => PkhbtT1::check_op1(instr, op),
Code::PKHTB_T1 => PkhtbT1::check_op1(instr, op),
Code::PLDW_i_T1 => PldwIT1::check_op1(instr, op),
Code::PLDW_i_T2 => PldwIT2::check_op1(instr, op),
Code::PLDW_r_T1 => PldwRT1::check_op1(instr, op),
Code::PLD_i_T1 => PldIT1::check_op1(instr, op),
Code::PLD_i_T2 => PldIT2::check_op1(instr, op),
Code::PLD_l_T1 => PldLT1::check_op1(instr, op),
Code::PLD_r_T1 => PldRT1::check_op1(instr, op),
Code::PLI_i_T1 => PliIT1::check_op1(instr, op),
Code::PLI_i_T2 => PliIT2::check_op1(instr, op),
Code::PLI_i_T3 => PliIT3::check_op1(instr, op),
Code::PLI_r_T1 => PliRT1::check_op1(instr, op),
Code::POP_LDM_T2 => PopLdmT2::check_op1(instr, op),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::check_op1(instr, op),
Code::POP_T1 => PopT1::check_op1(instr, op),
Code::PSSBB_T1 => PssbbT1::check_op1(instr, op),
Code::PUSH_STMDB_T1 => PushStmdbT1::check_op1(instr, op),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::check_op1(instr, op),
Code::PUSH_T1 => PushT1::check_op1(instr, op),
Code::QADD16_T1 => Qadd16T1::check_op1(instr, op),
Code::QADD8_T1 => Qadd8T1::check_op1(instr, op),
Code::QADD_T1 => QaddT1::check_op1(instr, op),
Code::QASX_T1 => QasxT1::check_op1(instr, op),
Code::QDADD_T1 => QdaddT1::check_op1(instr, op),
Code::QDSUB_T1 => QdsubT1::check_op1(instr, op),
Code::QSAX_T1 => QsaxT1::check_op1(instr, op),
Code::QSUB16_T1 => Qsub16T1::check_op1(instr, op),
Code::QSUB8_T1 => Qsub8T1::check_op1(instr, op),
Code::QSUB_T1 => QsubT1::check_op1(instr, op),
Code::RBIT_T1 => RbitT1::check_op1(instr, op),
Code::REV16_T1 => Rev16T1::check_op1(instr, op),
Code::REV16_T2 => Rev16T2::check_op1(instr, op),
Code::REVSH_T1 => RevshT1::check_op1(instr, op),
Code::REVSH_T2 => RevshT2::check_op1(instr, op),
Code::REV_T1 => RevT1::check_op1(instr, op),
Code::REV_T2 => RevT2::check_op1(instr, op),
Code::RFE_T1_AS => RfeT1As::check_op1(instr, op),
Code::RFE_T2_AS => RfeT2As::check_op1(instr, op),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::check_op1(instr, op),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::check_op1(instr, op),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::check_op1(instr, op),
Code::ROR_MOV_r_T3 => RorMovRT3::check_op1(instr, op),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::check_op1(instr, op),
Code::ROR_MOV_rr_T2 => RorMovRrT2::check_op1(instr, op),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::check_op1(instr, op),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::check_op1(instr, op),
Code::RSBS_i_T2 => RsbsIT2::check_op1(instr, op),
Code::RSBS_r_T1 => RsbsRT1::check_op1(instr, op),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::check_op1(instr, op),
Code::RSB_i_T1 => RsbIT1::check_op1(instr, op),
Code::RSB_i_T2 => RsbIT2::check_op1(instr, op),
Code::RSB_r_T1 => RsbRT1::check_op1(instr, op),
Code::RSB_r_T1_RRX => RsbRT1Rrx::check_op1(instr, op),
Code::SADD16_T1 => Sadd16T1::check_op1(instr, op),
Code::SADD8_T1 => Sadd8T1::check_op1(instr, op),
Code::SASX_T1 => SasxT1::check_op1(instr, op),
Code::SBCS_i_T1 => SbcsIT1::check_op1(instr, op),
Code::SBCS_r_T2 => SbcsRT2::check_op1(instr, op),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::check_op1(instr, op),
Code::SBC_i_T1 => SbcIT1::check_op1(instr, op),
Code::SBC_r_T1 => SbcRT1::check_op1(instr, op),
Code::SBC_r_T2 => SbcRT2::check_op1(instr, op),
Code::SBC_r_T2_RRX => SbcRT2Rrx::check_op1(instr, op),
Code::SBFX_T1 => SbfxT1::check_op1(instr, op),
Code::SB_T1 => SbT1::check_op1(instr, op),
Code::SDIV_T1 => SdivT1::check_op1(instr, op),
Code::SEL_T1 => SelT1::check_op1(instr, op),
Code::SETEND_T1 => SetendT1::check_op1(instr, op),
Code::SETPAN_T1 => SetpanT1::check_op1(instr, op),
Code::SEVL_T1 => SevlT1::check_op1(instr, op),
Code::SEVL_T2 => SevlT2::check_op1(instr, op),
Code::SEV_T1 => SevT1::check_op1(instr, op),
Code::SEV_T2 => SevT2::check_op1(instr, op),
Code::SHADD16_T1 => Shadd16T1::check_op1(instr, op),
Code::SHADD8_T1 => Shadd8T1::check_op1(instr, op),
Code::SHASX_T1 => ShasxT1::check_op1(instr, op),
Code::SHSAX_T1 => ShsaxT1::check_op1(instr, op),
Code::SHSUB16_T1 => Shsub16T1::check_op1(instr, op),
Code::SHSUB8_T1 => Shsub8T1::check_op1(instr, op),
Code::SMC_T1_AS => SmcT1As::check_op1(instr, op),
Code::SMLABB_T1 => SmlabbT1::check_op1(instr, op),
Code::SMLABT_T1 => SmlabtT1::check_op1(instr, op),
Code::SMLADX_T1 => SmladxT1::check_op1(instr, op),
Code::SMLAD_T1 => SmladT1::check_op1(instr, op),
Code::SMLALBB_T1 => SmlalbbT1::check_op1(instr, op),
Code::SMLALBT_T1 => SmlalbtT1::check_op1(instr, op),
Code::SMLALDX_T1 => SmlaldxT1::check_op1(instr, op),
Code::SMLALD_T1 => SmlaldT1::check_op1(instr, op),
Code::SMLALTB_T1 => SmlaltbT1::check_op1(instr, op),
Code::SMLALTT_T1 => SmlalttT1::check_op1(instr, op),
Code::SMLAL_T1 => SmlalT1::check_op1(instr, op),
Code::SMLATB_T1 => SmlatbT1::check_op1(instr, op),
Code::SMLATT_T1 => SmlattT1::check_op1(instr, op),
Code::SMLAWB_T1 => SmlawbT1::check_op1(instr, op),
Code::SMLAWT_T1 => SmlawtT1::check_op1(instr, op),
Code::SMLSDX_T1 => SmlsdxT1::check_op1(instr, op),
Code::SMLSD_T1 => SmlsdT1::check_op1(instr, op),
Code::SMLSLDX_T1 => SmlsldxT1::check_op1(instr, op),
Code::SMLSLD_T1 => SmlsldT1::check_op1(instr, op),
Code::SMMLAR_T1 => SmmlarT1::check_op1(instr, op),
Code::SMMLA_T1 => SmmlaT1::check_op1(instr, op),
Code::SMMLSR_T1 => SmmlsrT1::check_op1(instr, op),
Code::SMMLS_T1 => SmmlsT1::check_op1(instr, op),
Code::SMMULR_T1 => SmmulrT1::check_op1(instr, op),
Code::SMMUL_T1 => SmmulT1::check_op1(instr, op),
Code::SMUADX_T1 => SmuadxT1::check_op1(instr, op),
Code::SMUAD_T1 => SmuadT1::check_op1(instr, op),
Code::SMULBB_T1 => SmulbbT1::check_op1(instr, op),
Code::SMULBT_T1 => SmulbtT1::check_op1(instr, op),
Code::SMULL_T1 => SmullT1::check_op1(instr, op),
Code::SMULTB_T1 => SmultbT1::check_op1(instr, op),
Code::SMULTT_T1 => SmulttT1::check_op1(instr, op),
Code::SMULWB_T1 => SmulwbT1::check_op1(instr, op),
Code::SMULWT_T1 => SmulwtT1::check_op1(instr, op),
Code::SMUSDX_T1 => SmusdxT1::check_op1(instr, op),
Code::SMUSD_T1 => SmusdT1::check_op1(instr, op),
Code::SRS_T1_AS => SrsT1As::check_op1(instr, op),
Code::SRS_T2_AS => SrsT2As::check_op1(instr, op),
Code::SSAT16_T1 => Ssat16T1::check_op1(instr, op),
Code::SSAT_T1_ASR => SsatT1Asr::check_op1(instr, op),
Code::SSAT_T1_LSL => SsatT1Lsl::check_op1(instr, op),
Code::SSAX_T1 => SsaxT1::check_op1(instr, op),
Code::SSBB_T1 => SsbbT1::check_op1(instr, op),
Code::SSUB16_T1 => Ssub16T1::check_op1(instr, op),
Code::SSUB8_T1 => Ssub8T1::check_op1(instr, op),
Code::STC_T1_off => StcT1Off::check_op1(instr, op),
Code::STC_T1_post => StcT1Post::check_op1(instr, op),
Code::STC_T1_pre => StcT1Pre::check_op1(instr, op),
Code::STC_T1_unind => StcT1Unind::check_op1(instr, op),
Code::STLB_T1 => StlbT1::check_op1(instr, op),
Code::STLEXB_T1 => StlexbT1::check_op1(instr, op),
Code::STLEXD_T1 => StlexdT1::check_op1(instr, op),
Code::STLEXH_T1 => StlexhT1::check_op1(instr, op),
Code::STLEX_T1 => StlexT1::check_op1(instr, op),
Code::STLH_T1 => StlhT1::check_op1(instr, op),
Code::STL_T1 => StlT1::check_op1(instr, op),
Code::STMDB_T1 => StmdbT1::check_op1(instr, op),
Code::STM_T1 => StmT1::check_op1(instr, op),
Code::STM_T2 => StmT2::check_op1(instr, op),
Code::STRBT_T1 => StrbtT1::check_op1(instr, op),
Code::STRB_i_T1 => StrbIT1::check_op1(instr, op),
Code::STRB_i_T2 => StrbIT2::check_op1(instr, op),
Code::STRB_i_T3_offn => StrbIT3Offn::check_op1(instr, op),
Code::STRB_i_T3_post => StrbIT3Post::check_op1(instr, op),
Code::STRB_i_T3_pre => StrbIT3Pre::check_op1(instr, op),
Code::STRB_r_T1 => StrbRT1::check_op1(instr, op),
Code::STRB_r_T2 => StrbRT2::check_op1(instr, op),
Code::STRD_i_T1_off => StrdIT1Off::check_op1(instr, op),
Code::STRD_i_T1_post => StrdIT1Post::check_op1(instr, op),
Code::STRD_i_T1_pre => StrdIT1Pre::check_op1(instr, op),
Code::STREXB_T1 => StrexbT1::check_op1(instr, op),
Code::STREXD_T1 => StrexdT1::check_op1(instr, op),
Code::STREXH_T1 => StrexhT1::check_op1(instr, op),
Code::STREX_T1 => StrexT1::check_op1(instr, op),
Code::STRHT_T1 => StrhtT1::check_op1(instr, op),
Code::STRH_i_T1 => StrhIT1::check_op1(instr, op),
Code::STRH_i_T2 => StrhIT2::check_op1(instr, op),
Code::STRH_i_T3_offn => StrhIT3Offn::check_op1(instr, op),
Code::STRH_i_T3_post => StrhIT3Post::check_op1(instr, op),
Code::STRH_i_T3_pre => StrhIT3Pre::check_op1(instr, op),
Code::STRH_r_T1 => StrhRT1::check_op1(instr, op),
Code::STRH_r_T2 => StrhRT2::check_op1(instr, op),
Code::STRT_T1 => StrtT1::check_op1(instr, op),
Code::STR_i_T1 => StrIT1::check_op1(instr, op),
Code::STR_i_T2 => StrIT2::check_op1(instr, op),
Code::STR_i_T3 => StrIT3::check_op1(instr, op),
Code::STR_i_T4_off => StrIT4Off::check_op1(instr, op),
Code::STR_i_T4_post => StrIT4Post::check_op1(instr, op),
Code::STR_i_T4_pre => StrIT4Pre::check_op1(instr, op),
Code::STR_r_T1 => StrRT1::check_op1(instr, op),
Code::STR_r_T2 => StrRT2::check_op1(instr, op),
Code::SUBS_PC_T5_AS => SubsPcT5As::check_op1(instr, op),
Code::SUBS_SP_i_T2 => SubsSpIT2::check_op1(instr, op),
Code::SUBS_SP_r_T1 => SubsSpRT1::check_op1(instr, op),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::check_op1(instr, op),
Code::SUBS_i_T3 => SubsIT3::check_op1(instr, op),
Code::SUBS_r_T2 => SubsRT2::check_op1(instr, op),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::check_op1(instr, op),
Code::SUB_ADR_T2 => SubAdrT2::check_op1(instr, op),
Code::SUB_SP_i_T1 => SubSpIT1::check_op1(instr, op),
Code::SUB_SP_i_T2 => SubSpIT2::check_op1(instr, op),
Code::SUB_SP_i_T3 => SubSpIT3::check_op1(instr, op),
Code::SUB_SP_r_T1 => SubSpRT1::check_op1(instr, op),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::check_op1(instr, op),
Code::SUB_i_T1 => SubIT1::check_op1(instr, op),
Code::SUB_i_T2 => SubIT2::check_op1(instr, op),
Code::SUB_i_T3 => SubIT3::check_op1(instr, op),
Code::SUB_i_T4 => SubIT4::check_op1(instr, op),
Code::SUB_r_T1 => SubRT1::check_op1(instr, op),
Code::SUB_r_T2 => SubRT2::check_op1(instr, op),
Code::SUB_r_T2_RRX => SubRT2Rrx::check_op1(instr, op),
Code::SVC_T1 => SvcT1::check_op1(instr, op),
Code::SXTAB16_T1 => Sxtab16T1::check_op1(instr, op),
Code::SXTAB_T1 => SxtabT1::check_op1(instr, op),
Code::SXTAH_T1 => SxtahT1::check_op1(instr, op),
Code::SXTB16_T1 => Sxtb16T1::check_op1(instr, op),
Code::SXTB_T1 => SxtbT1::check_op1(instr, op),
Code::SXTB_T2 => SxtbT2::check_op1(instr, op),
Code::SXTH_T1 => SxthT1::check_op1(instr, op),
Code::SXTH_T2 => SxthT2::check_op1(instr, op),
Code::TBB_T1 => TbbT1::check_op1(instr, op),
Code::TBH_T1 => TbhT1::check_op1(instr, op),
Code::TEQ_i_T1 => TeqIT1::check_op1(instr, op),
Code::TEQ_r_T1 => TeqRT1::check_op1(instr, op),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::check_op1(instr, op),
Code::TSB_T1 => TsbT1::check_op1(instr, op),
Code::TST_i_T1 => TstIT1::check_op1(instr, op),
Code::TST_r_T1 => TstRT1::check_op1(instr, op),
Code::TST_r_T2 => TstRT2::check_op1(instr, op),
Code::TST_r_T2_RRX => TstRT2Rrx::check_op1(instr, op),
Code::UADD16_T1 => Uadd16T1::check_op1(instr, op),
Code::UADD8_T1 => Uadd8T1::check_op1(instr, op),
Code::UASX_T1 => UasxT1::check_op1(instr, op),
Code::UBFX_T1 => UbfxT1::check_op1(instr, op),
Code::UDF_T1 => UdfT1::check_op1(instr, op),
Code::UDF_T2 => UdfT2::check_op1(instr, op),
Code::UDIV_T1 => UdivT1::check_op1(instr, op),
Code::UHADD16_T1 => Uhadd16T1::check_op1(instr, op),
Code::UHADD8_T1 => Uhadd8T1::check_op1(instr, op),
Code::UHASX_T1 => UhasxT1::check_op1(instr, op),
Code::UHSAX_T1 => UhsaxT1::check_op1(instr, op),
Code::UHSUB16_T1 => Uhsub16T1::check_op1(instr, op),
Code::UHSUB8_T1 => Uhsub8T1::check_op1(instr, op),
Code::UMAAL_T1 => UmaalT1::check_op1(instr, op),
Code::UMLAL_T1 => UmlalT1::check_op1(instr, op),
Code::UMULL_T1 => UmullT1::check_op1(instr, op),
Code::UQADD16_T1 => Uqadd16T1::check_op1(instr, op),
Code::UQADD8_T1 => Uqadd8T1::check_op1(instr, op),
Code::UQASX_T1 => UqasxT1::check_op1(instr, op),
Code::UQSAX_T1 => UqsaxT1::check_op1(instr, op),
Code::UQSUB16_T1 => Uqsub16T1::check_op1(instr, op),
Code::UQSUB8_T1 => Uqsub8T1::check_op1(instr, op),
Code::USAD8_T1 => Usad8T1::check_op1(instr, op),
Code::USADA8_T1 => Usada8T1::check_op1(instr, op),
Code::USAT16_T1 => Usat16T1::check_op1(instr, op),
Code::USAT_T1_ASR => UsatT1Asr::check_op1(instr, op),
Code::USAT_T1_LSL => UsatT1Lsl::check_op1(instr, op),
Code::USAX_T1 => UsaxT1::check_op1(instr, op),
Code::USUB16_T1 => Usub16T1::check_op1(instr, op),
Code::USUB8_T1 => Usub8T1::check_op1(instr, op),
Code::UXTAB16_T1 => Uxtab16T1::check_op1(instr, op),
Code::UXTAB_T1 => UxtabT1::check_op1(instr, op),
Code::UXTAH_T1 => UxtahT1::check_op1(instr, op),
Code::UXTB16_T1 => Uxtb16T1::check_op1(instr, op),
Code::UXTB_T1 => UxtbT1::check_op1(instr, op),
Code::UXTB_T2 => UxtbT2::check_op1(instr, op),
Code::UXTH_T1 => UxthT1::check_op1(instr, op),
Code::UXTH_T2 => UxthT2::check_op1(instr, op),
Code::WFE_T1 => WfeT1::check_op1(instr, op),
Code::WFE_T2 => WfeT2::check_op1(instr, op),
Code::WFI_T1 => WfiT1::check_op1(instr, op),
Code::WFI_T2 => WfiT2::check_op1(instr, op),
Code::YIELD_T1 => YieldT1::check_op1(instr, op),
Code::YIELD_T2 => YieldT2::check_op1(instr, op),
}
}
pub fn check_op2(&self, instr: &Instruction, op: &Operand) -> Result<()> {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::check_op2(instr, op),
Code::ADCS_r_T2 => AdcsRT2::check_op2(instr, op),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::check_op2(instr, op),
Code::ADC_i_T1 => AdcIT1::check_op2(instr, op),
Code::ADC_r_T1 => AdcRT1::check_op2(instr, op),
Code::ADC_r_T2 => AdcRT2::check_op2(instr, op),
Code::ADC_r_T2_RRX => AdcRT2Rrx::check_op2(instr, op),
Code::ADDS_SP_i_T3 => AddsSpIT3::check_op2(instr, op),
Code::ADDS_SP_r_T3 => AddsSpRT3::check_op2(instr, op),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::check_op2(instr, op),
Code::ADDS_i_T3 => AddsIT3::check_op2(instr, op),
Code::ADDS_r_T3 => AddsRT3::check_op2(instr, op),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::check_op2(instr, op),
Code::ADD_ADR_T1 => AddAdrT1::check_op2(instr, op),
Code::ADD_ADR_T3 => AddAdrT3::check_op2(instr, op),
Code::ADD_SP_i_T1 => AddSpIT1::check_op2(instr, op),
Code::ADD_SP_i_T2 => AddSpIT2::check_op2(instr, op),
Code::ADD_SP_i_T3 => AddSpIT3::check_op2(instr, op),
Code::ADD_SP_i_T4 => AddSpIT4::check_op2(instr, op),
Code::ADD_SP_r_T1 => AddSpRT1::check_op2(instr, op),
Code::ADD_SP_r_T2 => AddSpRT2::check_op2(instr, op),
Code::ADD_SP_r_T3 => AddSpRT3::check_op2(instr, op),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::check_op2(instr, op),
Code::ADD_i_T1 => AddIT1::check_op2(instr, op),
Code::ADD_i_T2 => AddIT2::check_op2(instr, op),
Code::ADD_i_T3 => AddIT3::check_op2(instr, op),
Code::ADD_i_T4 => AddIT4::check_op2(instr, op),
Code::ADD_r_T1 => AddRT1::check_op2(instr, op),
Code::ADD_r_T2 => AddRT2::check_op2(instr, op),
Code::ADD_r_T3 => AddRT3::check_op2(instr, op),
Code::ADD_r_T3_RRX => AddRT3Rrx::check_op2(instr, op),
Code::ADR_T1 => AdrT1::check_op2(instr, op),
Code::ADR_T2 => AdrT2::check_op2(instr, op),
Code::ADR_T3 => AdrT3::check_op2(instr, op),
Code::ANDS_i_T1 => AndsIT1::check_op2(instr, op),
Code::ANDS_r_T2 => AndsRT2::check_op2(instr, op),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::check_op2(instr, op),
Code::AND_i_T1 => AndIT1::check_op2(instr, op),
Code::AND_r_T1 => AndRT1::check_op2(instr, op),
Code::AND_r_T2 => AndRT2::check_op2(instr, op),
Code::AND_r_T2_RRX => AndRT2Rrx::check_op2(instr, op),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::check_op2(instr, op),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::check_op2(instr, op),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::check_op2(instr, op),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::check_op2(instr, op),
Code::ASR_MOV_r_T2 => AsrMovRT2::check_op2(instr, op),
Code::ASR_MOV_r_T3 => AsrMovRT3::check_op2(instr, op),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::check_op2(instr, op),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::check_op2(instr, op),
Code::BFC_T1 => BfcT1::check_op2(instr, op),
Code::BFI_T1 => BfiT1::check_op2(instr, op),
Code::BICS_i_T1 => BicsIT1::check_op2(instr, op),
Code::BICS_r_T2 => BicsRT2::check_op2(instr, op),
Code::BICS_r_T2_RRX => BicsRT2Rrx::check_op2(instr, op),
Code::BIC_i_T1 => BicIT1::check_op2(instr, op),
Code::BIC_r_T1 => BicRT1::check_op2(instr, op),
Code::BIC_r_T2 => BicRT2::check_op2(instr, op),
Code::BIC_r_T2_RRX => BicRT2Rrx::check_op2(instr, op),
Code::BKPT_T1 => BkptT1::check_op2(instr, op),
Code::BLX_r_T1 => BlxRT1::check_op2(instr, op),
Code::BL_i_T1 => BlIT1::check_op2(instr, op),
Code::BL_i_T2 => BlIT2::check_op2(instr, op),
Code::BXJ_T1 => BxjT1::check_op2(instr, op),
Code::BX_T1 => BxT1::check_op2(instr, op),
Code::B_T1 => BT1::check_op2(instr, op),
Code::B_T2 => BT2::check_op2(instr, op),
Code::B_T3 => BT3::check_op2(instr, op),
Code::B_T4 => BT4::check_op2(instr, op),
Code::CBNZ_T1 => CbnzT1::check_op2(instr, op),
Code::CBZ_T1 => CbzT1::check_op2(instr, op),
Code::CLRBHB_T1 => ClrbhbT1::check_op2(instr, op),
Code::CLREX_T1 => ClrexT1::check_op2(instr, op),
Code::CLZ_T1 => ClzT1::check_op2(instr, op),
Code::CMN_i_T1 => CmnIT1::check_op2(instr, op),
Code::CMN_r_T1 => CmnRT1::check_op2(instr, op),
Code::CMN_r_T2 => CmnRT2::check_op2(instr, op),
Code::CMN_r_T2_RRX => CmnRT2Rrx::check_op2(instr, op),
Code::CMP_i_T1 => CmpIT1::check_op2(instr, op),
Code::CMP_i_T2 => CmpIT2::check_op2(instr, op),
Code::CMP_r_T1 => CmpRT1::check_op2(instr, op),
Code::CMP_r_T2 => CmpRT2::check_op2(instr, op),
Code::CMP_r_T3 => CmpRT3::check_op2(instr, op),
Code::CMP_r_T3_RRX => CmpRT3Rrx::check_op2(instr, op),
Code::CPSID_T1_AS => CpsidT1As::check_op2(instr, op),
Code::CPSID_T2_AS => CpsidT2As::check_op2(instr, op),
Code::CPSID_T2_ASM => CpsidT2Asm::check_op2(instr, op),
Code::CPSIE_T1_AS => CpsieT1As::check_op2(instr, op),
Code::CPSIE_T2_AS => CpsieT2As::check_op2(instr, op),
Code::CPSIE_T2_ASM => CpsieT2Asm::check_op2(instr, op),
Code::CPS_T2_AS => CpsT2As::check_op2(instr, op),
Code::CRC32B_T1 => Crc32bT1::check_op2(instr, op),
Code::CRC32CB_T1 => Crc32cbT1::check_op2(instr, op),
Code::CRC32CH_T1 => Crc32chT1::check_op2(instr, op),
Code::CRC32CW_T1 => Crc32cwT1::check_op2(instr, op),
Code::CRC32H_T1 => Crc32hT1::check_op2(instr, op),
Code::CRC32W_T1 => Crc32wT1::check_op2(instr, op),
Code::CSDB_T1 => CsdbT1::check_op2(instr, op),
Code::DBG_T1 => DbgT1::check_op2(instr, op),
Code::DCPS1_T1 => Dcps1T1::check_op2(instr, op),
Code::DCPS2_T1 => Dcps2T1::check_op2(instr, op),
Code::DCPS3_T1 => Dcps3T1::check_op2(instr, op),
Code::DMB_T1 => DmbT1::check_op2(instr, op),
Code::DSB_T1 => DsbT1::check_op2(instr, op),
Code::EORS_i_T1 => EorsIT1::check_op2(instr, op),
Code::EORS_r_T2 => EorsRT2::check_op2(instr, op),
Code::EORS_r_T2_RRX => EorsRT2Rrx::check_op2(instr, op),
Code::EOR_i_T1 => EorIT1::check_op2(instr, op),
Code::EOR_r_T1 => EorRT1::check_op2(instr, op),
Code::EOR_r_T2 => EorRT2::check_op2(instr, op),
Code::EOR_r_T2_RRX => EorRT2Rrx::check_op2(instr, op),
Code::ERET_T1 => EretT1::check_op2(instr, op),
Code::ESB_T1 => EsbT1::check_op2(instr, op),
Code::HLT_T1 => HltT1::check_op2(instr, op),
Code::HVC_T1 => HvcT1::check_op2(instr, op),
Code::ISB_T1 => IsbT1::check_op2(instr, op),
Code::IT_T1 => ItT1::check_op2(instr, op),
Code::LDAB_T1 => LdabT1::check_op2(instr, op),
Code::LDAEXB_T1 => LdaexbT1::check_op2(instr, op),
Code::LDAEXD_T1 => LdaexdT1::check_op2(instr, op),
Code::LDAEXH_T1 => LdaexhT1::check_op2(instr, op),
Code::LDAEX_T1 => LdaexT1::check_op2(instr, op),
Code::LDAH_T1 => LdahT1::check_op2(instr, op),
Code::LDA_T1 => LdaT1::check_op2(instr, op),
Code::LDC_i_T1_off => LdcIT1Off::check_op2(instr, op),
Code::LDC_i_T1_post => LdcIT1Post::check_op2(instr, op),
Code::LDC_i_T1_pre => LdcIT1Pre::check_op2(instr, op),
Code::LDC_i_T1_unind => LdcIT1Unind::check_op2(instr, op),
Code::LDC_l_T1_off => LdcLT1Off::check_op2(instr, op),
Code::LDC_l_T1_post => LdcLT1Post::check_op2(instr, op),
Code::LDC_l_T1_pre => LdcLT1Pre::check_op2(instr, op),
Code::LDC_l_T1_unind => LdcLT1Unind::check_op2(instr, op),
Code::LDMDB_T1 => LdmdbT1::check_op2(instr, op),
Code::LDM_T1 => LdmT1::check_op2(instr, op),
Code::LDM_T2 => LdmT2::check_op2(instr, op),
Code::LDRBT_T1 => LdrbtT1::check_op2(instr, op),
Code::LDRB_i_T1 => LdrbIT1::check_op2(instr, op),
Code::LDRB_i_T2 => LdrbIT2::check_op2(instr, op),
Code::LDRB_i_T3_off => LdrbIT3Off::check_op2(instr, op),
Code::LDRB_i_T3_post => LdrbIT3Post::check_op2(instr, op),
Code::LDRB_i_T3_pre => LdrbIT3Pre::check_op2(instr, op),
Code::LDRB_l_T1 => LdrbLT1::check_op2(instr, op),
Code::LDRB_r_T1 => LdrbRT1::check_op2(instr, op),
Code::LDRB_r_T2 => LdrbRT2::check_op2(instr, op),
Code::LDRD_i_T1_off => LdrdIT1Off::check_op2(instr, op),
Code::LDRD_i_T1_post => LdrdIT1Post::check_op2(instr, op),
Code::LDRD_i_T1_pre => LdrdIT1Pre::check_op2(instr, op),
Code::LDRD_l_T1_off => LdrdLT1Off::check_op2(instr, op),
Code::LDRD_l_T1_post => LdrdLT1Post::check_op2(instr, op),
Code::LDRD_l_T1_pre => LdrdLT1Pre::check_op2(instr, op),
Code::LDREXB_T1 => LdrexbT1::check_op2(instr, op),
Code::LDREXD_T1 => LdrexdT1::check_op2(instr, op),
Code::LDREXH_T1 => LdrexhT1::check_op2(instr, op),
Code::LDREX_T1 => LdrexT1::check_op2(instr, op),
Code::LDRHT_T1 => LdrhtT1::check_op2(instr, op),
Code::LDRH_i_T1 => LdrhIT1::check_op2(instr, op),
Code::LDRH_i_T2 => LdrhIT2::check_op2(instr, op),
Code::LDRH_i_T3_off => LdrhIT3Off::check_op2(instr, op),
Code::LDRH_i_T3_post => LdrhIT3Post::check_op2(instr, op),
Code::LDRH_i_T3_pre => LdrhIT3Pre::check_op2(instr, op),
Code::LDRH_l_T1 => LdrhLT1::check_op2(instr, op),
Code::LDRH_r_T1 => LdrhRT1::check_op2(instr, op),
Code::LDRH_r_T2 => LdrhRT2::check_op2(instr, op),
Code::LDRSBT_T1 => LdrsbtT1::check_op2(instr, op),
Code::LDRSB_i_T1 => LdrsbIT1::check_op2(instr, op),
Code::LDRSB_i_T2_off => LdrsbIT2Off::check_op2(instr, op),
Code::LDRSB_i_T2_post => LdrsbIT2Post::check_op2(instr, op),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::check_op2(instr, op),
Code::LDRSB_l_T1 => LdrsbLT1::check_op2(instr, op),
Code::LDRSB_r_T1 => LdrsbRT1::check_op2(instr, op),
Code::LDRSB_r_T2 => LdrsbRT2::check_op2(instr, op),
Code::LDRSHT_T1 => LdrshtT1::check_op2(instr, op),
Code::LDRSH_i_T1 => LdrshIT1::check_op2(instr, op),
Code::LDRSH_i_T2_off => LdrshIT2Off::check_op2(instr, op),
Code::LDRSH_i_T2_post => LdrshIT2Post::check_op2(instr, op),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::check_op2(instr, op),
Code::LDRSH_l_T1 => LdrshLT1::check_op2(instr, op),
Code::LDRSH_r_T1 => LdrshRT1::check_op2(instr, op),
Code::LDRSH_r_T2 => LdrshRT2::check_op2(instr, op),
Code::LDRT_T1 => LdrtT1::check_op2(instr, op),
Code::LDR_i_T1 => LdrIT1::check_op2(instr, op),
Code::LDR_i_T2 => LdrIT2::check_op2(instr, op),
Code::LDR_i_T3 => LdrIT3::check_op2(instr, op),
Code::LDR_i_T4_off => LdrIT4Off::check_op2(instr, op),
Code::LDR_i_T4_post => LdrIT4Post::check_op2(instr, op),
Code::LDR_i_T4_pre => LdrIT4Pre::check_op2(instr, op),
Code::LDR_l_T2 => LdrLT2::check_op2(instr, op),
Code::LDR_r_T1 => LdrRT1::check_op2(instr, op),
Code::LDR_r_T2 => LdrRT2::check_op2(instr, op),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::check_op2(instr, op),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::check_op2(instr, op),
Code::LSLS_MOV_r_T2 => LslsMovRT2::check_op2(instr, op),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::check_op2(instr, op),
Code::LSL_MOV_r_T2 => LslMovRT2::check_op2(instr, op),
Code::LSL_MOV_r_T3 => LslMovRT3::check_op2(instr, op),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::check_op2(instr, op),
Code::LSL_MOV_rr_T2 => LslMovRrT2::check_op2(instr, op),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::check_op2(instr, op),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::check_op2(instr, op),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::check_op2(instr, op),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::check_op2(instr, op),
Code::LSR_MOV_r_T2 => LsrMovRT2::check_op2(instr, op),
Code::LSR_MOV_r_T3 => LsrMovRT3::check_op2(instr, op),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::check_op2(instr, op),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::check_op2(instr, op),
Code::MCRR_T1 => McrrT1::check_op2(instr, op),
Code::MCR_T1 => McrT1::check_op2(instr, op),
Code::MLA_T1 => MlaT1::check_op2(instr, op),
Code::MLS_T1 => MlsT1::check_op2(instr, op),
Code::MOVS_i_T2 => MovsIT2::check_op2(instr, op),
Code::MOVS_r_T3 => MovsRT3::check_op2(instr, op),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::check_op2(instr, op),
Code::MOVS_rr_T2 => MovsRrT2::check_op2(instr, op),
Code::MOVT_T1 => MovtT1::check_op2(instr, op),
Code::MOV_i_T1 => MovIT1::check_op2(instr, op),
Code::MOV_i_T2 => MovIT2::check_op2(instr, op),
Code::MOV_i_T3 => MovIT3::check_op2(instr, op),
Code::MOV_r_T1 => MovRT1::check_op2(instr, op),
Code::MOV_r_T2 => MovRT2::check_op2(instr, op),
Code::MOV_r_T3 => MovRT3::check_op2(instr, op),
Code::MOV_r_T3_RRX => MovRT3Rrx::check_op2(instr, op),
Code::MOV_rr_T1_ASR => MovRrT1Asr::check_op2(instr, op),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::check_op2(instr, op),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::check_op2(instr, op),
Code::MOV_rr_T1_ROR => MovRrT1Ror::check_op2(instr, op),
Code::MOV_rr_T2 => MovRrT2::check_op2(instr, op),
Code::MRC_T1 => MrcT1::check_op2(instr, op),
Code::MRRC_T1 => MrrcT1::check_op2(instr, op),
Code::MRS_T1_AS => MrsT1As::check_op2(instr, op),
Code::MRS_br_T1_AS => MrsBrT1As::check_op2(instr, op),
Code::MSR_br_T1_AS => MsrBrT1As::check_op2(instr, op),
Code::MSR_r_T1_AS => MsrRT1As::check_op2(instr, op),
Code::MUL_T1 => MulT1::check_op2(instr, op),
Code::MUL_T2 => MulT2::check_op2(instr, op),
Code::MVNS_i_T1 => MvnsIT1::check_op2(instr, op),
Code::MVNS_r_T2 => MvnsRT2::check_op2(instr, op),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::check_op2(instr, op),
Code::MVN_i_T1 => MvnIT1::check_op2(instr, op),
Code::MVN_r_T1 => MvnRT1::check_op2(instr, op),
Code::MVN_r_T2 => MvnRT2::check_op2(instr, op),
Code::MVN_r_T2_RRX => MvnRT2Rrx::check_op2(instr, op),
Code::NOP_T1 => NopT1::check_op2(instr, op),
Code::NOP_T2 => NopT2::check_op2(instr, op),
Code::ORNS_i_T1 => OrnsIT1::check_op2(instr, op),
Code::ORNS_r_T1 => OrnsRT1::check_op2(instr, op),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::check_op2(instr, op),
Code::ORN_i_T1 => OrnIT1::check_op2(instr, op),
Code::ORN_r_T1 => OrnRT1::check_op2(instr, op),
Code::ORN_r_T1_RRX => OrnRT1Rrx::check_op2(instr, op),
Code::ORRS_i_T1 => OrrsIT1::check_op2(instr, op),
Code::ORRS_r_T2 => OrrsRT2::check_op2(instr, op),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::check_op2(instr, op),
Code::ORR_i_T1 => OrrIT1::check_op2(instr, op),
Code::ORR_r_T1 => OrrRT1::check_op2(instr, op),
Code::ORR_r_T2 => OrrRT2::check_op2(instr, op),
Code::ORR_r_T2_RRX => OrrRT2Rrx::check_op2(instr, op),
Code::PKHBT_T1 => PkhbtT1::check_op2(instr, op),
Code::PKHTB_T1 => PkhtbT1::check_op2(instr, op),
Code::PLDW_i_T1 => PldwIT1::check_op2(instr, op),
Code::PLDW_i_T2 => PldwIT2::check_op2(instr, op),
Code::PLDW_r_T1 => PldwRT1::check_op2(instr, op),
Code::PLD_i_T1 => PldIT1::check_op2(instr, op),
Code::PLD_i_T2 => PldIT2::check_op2(instr, op),
Code::PLD_l_T1 => PldLT1::check_op2(instr, op),
Code::PLD_r_T1 => PldRT1::check_op2(instr, op),
Code::PLI_i_T1 => PliIT1::check_op2(instr, op),
Code::PLI_i_T2 => PliIT2::check_op2(instr, op),
Code::PLI_i_T3 => PliIT3::check_op2(instr, op),
Code::PLI_r_T1 => PliRT1::check_op2(instr, op),
Code::POP_LDM_T2 => PopLdmT2::check_op2(instr, op),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::check_op2(instr, op),
Code::POP_T1 => PopT1::check_op2(instr, op),
Code::PSSBB_T1 => PssbbT1::check_op2(instr, op),
Code::PUSH_STMDB_T1 => PushStmdbT1::check_op2(instr, op),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::check_op2(instr, op),
Code::PUSH_T1 => PushT1::check_op2(instr, op),
Code::QADD16_T1 => Qadd16T1::check_op2(instr, op),
Code::QADD8_T1 => Qadd8T1::check_op2(instr, op),
Code::QADD_T1 => QaddT1::check_op2(instr, op),
Code::QASX_T1 => QasxT1::check_op2(instr, op),
Code::QDADD_T1 => QdaddT1::check_op2(instr, op),
Code::QDSUB_T1 => QdsubT1::check_op2(instr, op),
Code::QSAX_T1 => QsaxT1::check_op2(instr, op),
Code::QSUB16_T1 => Qsub16T1::check_op2(instr, op),
Code::QSUB8_T1 => Qsub8T1::check_op2(instr, op),
Code::QSUB_T1 => QsubT1::check_op2(instr, op),
Code::RBIT_T1 => RbitT1::check_op2(instr, op),
Code::REV16_T1 => Rev16T1::check_op2(instr, op),
Code::REV16_T2 => Rev16T2::check_op2(instr, op),
Code::REVSH_T1 => RevshT1::check_op2(instr, op),
Code::REVSH_T2 => RevshT2::check_op2(instr, op),
Code::REV_T1 => RevT1::check_op2(instr, op),
Code::REV_T2 => RevT2::check_op2(instr, op),
Code::RFE_T1_AS => RfeT1As::check_op2(instr, op),
Code::RFE_T2_AS => RfeT2As::check_op2(instr, op),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::check_op2(instr, op),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::check_op2(instr, op),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::check_op2(instr, op),
Code::ROR_MOV_r_T3 => RorMovRT3::check_op2(instr, op),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::check_op2(instr, op),
Code::ROR_MOV_rr_T2 => RorMovRrT2::check_op2(instr, op),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::check_op2(instr, op),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::check_op2(instr, op),
Code::RSBS_i_T2 => RsbsIT2::check_op2(instr, op),
Code::RSBS_r_T1 => RsbsRT1::check_op2(instr, op),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::check_op2(instr, op),
Code::RSB_i_T1 => RsbIT1::check_op2(instr, op),
Code::RSB_i_T2 => RsbIT2::check_op2(instr, op),
Code::RSB_r_T1 => RsbRT1::check_op2(instr, op),
Code::RSB_r_T1_RRX => RsbRT1Rrx::check_op2(instr, op),
Code::SADD16_T1 => Sadd16T1::check_op2(instr, op),
Code::SADD8_T1 => Sadd8T1::check_op2(instr, op),
Code::SASX_T1 => SasxT1::check_op2(instr, op),
Code::SBCS_i_T1 => SbcsIT1::check_op2(instr, op),
Code::SBCS_r_T2 => SbcsRT2::check_op2(instr, op),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::check_op2(instr, op),
Code::SBC_i_T1 => SbcIT1::check_op2(instr, op),
Code::SBC_r_T1 => SbcRT1::check_op2(instr, op),
Code::SBC_r_T2 => SbcRT2::check_op2(instr, op),
Code::SBC_r_T2_RRX => SbcRT2Rrx::check_op2(instr, op),
Code::SBFX_T1 => SbfxT1::check_op2(instr, op),
Code::SB_T1 => SbT1::check_op2(instr, op),
Code::SDIV_T1 => SdivT1::check_op2(instr, op),
Code::SEL_T1 => SelT1::check_op2(instr, op),
Code::SETEND_T1 => SetendT1::check_op2(instr, op),
Code::SETPAN_T1 => SetpanT1::check_op2(instr, op),
Code::SEVL_T1 => SevlT1::check_op2(instr, op),
Code::SEVL_T2 => SevlT2::check_op2(instr, op),
Code::SEV_T1 => SevT1::check_op2(instr, op),
Code::SEV_T2 => SevT2::check_op2(instr, op),
Code::SHADD16_T1 => Shadd16T1::check_op2(instr, op),
Code::SHADD8_T1 => Shadd8T1::check_op2(instr, op),
Code::SHASX_T1 => ShasxT1::check_op2(instr, op),
Code::SHSAX_T1 => ShsaxT1::check_op2(instr, op),
Code::SHSUB16_T1 => Shsub16T1::check_op2(instr, op),
Code::SHSUB8_T1 => Shsub8T1::check_op2(instr, op),
Code::SMC_T1_AS => SmcT1As::check_op2(instr, op),
Code::SMLABB_T1 => SmlabbT1::check_op2(instr, op),
Code::SMLABT_T1 => SmlabtT1::check_op2(instr, op),
Code::SMLADX_T1 => SmladxT1::check_op2(instr, op),
Code::SMLAD_T1 => SmladT1::check_op2(instr, op),
Code::SMLALBB_T1 => SmlalbbT1::check_op2(instr, op),
Code::SMLALBT_T1 => SmlalbtT1::check_op2(instr, op),
Code::SMLALDX_T1 => SmlaldxT1::check_op2(instr, op),
Code::SMLALD_T1 => SmlaldT1::check_op2(instr, op),
Code::SMLALTB_T1 => SmlaltbT1::check_op2(instr, op),
Code::SMLALTT_T1 => SmlalttT1::check_op2(instr, op),
Code::SMLAL_T1 => SmlalT1::check_op2(instr, op),
Code::SMLATB_T1 => SmlatbT1::check_op2(instr, op),
Code::SMLATT_T1 => SmlattT1::check_op2(instr, op),
Code::SMLAWB_T1 => SmlawbT1::check_op2(instr, op),
Code::SMLAWT_T1 => SmlawtT1::check_op2(instr, op),
Code::SMLSDX_T1 => SmlsdxT1::check_op2(instr, op),
Code::SMLSD_T1 => SmlsdT1::check_op2(instr, op),
Code::SMLSLDX_T1 => SmlsldxT1::check_op2(instr, op),
Code::SMLSLD_T1 => SmlsldT1::check_op2(instr, op),
Code::SMMLAR_T1 => SmmlarT1::check_op2(instr, op),
Code::SMMLA_T1 => SmmlaT1::check_op2(instr, op),
Code::SMMLSR_T1 => SmmlsrT1::check_op2(instr, op),
Code::SMMLS_T1 => SmmlsT1::check_op2(instr, op),
Code::SMMULR_T1 => SmmulrT1::check_op2(instr, op),
Code::SMMUL_T1 => SmmulT1::check_op2(instr, op),
Code::SMUADX_T1 => SmuadxT1::check_op2(instr, op),
Code::SMUAD_T1 => SmuadT1::check_op2(instr, op),
Code::SMULBB_T1 => SmulbbT1::check_op2(instr, op),
Code::SMULBT_T1 => SmulbtT1::check_op2(instr, op),
Code::SMULL_T1 => SmullT1::check_op2(instr, op),
Code::SMULTB_T1 => SmultbT1::check_op2(instr, op),
Code::SMULTT_T1 => SmulttT1::check_op2(instr, op),
Code::SMULWB_T1 => SmulwbT1::check_op2(instr, op),
Code::SMULWT_T1 => SmulwtT1::check_op2(instr, op),
Code::SMUSDX_T1 => SmusdxT1::check_op2(instr, op),
Code::SMUSD_T1 => SmusdT1::check_op2(instr, op),
Code::SRS_T1_AS => SrsT1As::check_op2(instr, op),
Code::SRS_T2_AS => SrsT2As::check_op2(instr, op),
Code::SSAT16_T1 => Ssat16T1::check_op2(instr, op),
Code::SSAT_T1_ASR => SsatT1Asr::check_op2(instr, op),
Code::SSAT_T1_LSL => SsatT1Lsl::check_op2(instr, op),
Code::SSAX_T1 => SsaxT1::check_op2(instr, op),
Code::SSBB_T1 => SsbbT1::check_op2(instr, op),
Code::SSUB16_T1 => Ssub16T1::check_op2(instr, op),
Code::SSUB8_T1 => Ssub8T1::check_op2(instr, op),
Code::STC_T1_off => StcT1Off::check_op2(instr, op),
Code::STC_T1_post => StcT1Post::check_op2(instr, op),
Code::STC_T1_pre => StcT1Pre::check_op2(instr, op),
Code::STC_T1_unind => StcT1Unind::check_op2(instr, op),
Code::STLB_T1 => StlbT1::check_op2(instr, op),
Code::STLEXB_T1 => StlexbT1::check_op2(instr, op),
Code::STLEXD_T1 => StlexdT1::check_op2(instr, op),
Code::STLEXH_T1 => StlexhT1::check_op2(instr, op),
Code::STLEX_T1 => StlexT1::check_op2(instr, op),
Code::STLH_T1 => StlhT1::check_op2(instr, op),
Code::STL_T1 => StlT1::check_op2(instr, op),
Code::STMDB_T1 => StmdbT1::check_op2(instr, op),
Code::STM_T1 => StmT1::check_op2(instr, op),
Code::STM_T2 => StmT2::check_op2(instr, op),
Code::STRBT_T1 => StrbtT1::check_op2(instr, op),
Code::STRB_i_T1 => StrbIT1::check_op2(instr, op),
Code::STRB_i_T2 => StrbIT2::check_op2(instr, op),
Code::STRB_i_T3_offn => StrbIT3Offn::check_op2(instr, op),
Code::STRB_i_T3_post => StrbIT3Post::check_op2(instr, op),
Code::STRB_i_T3_pre => StrbIT3Pre::check_op2(instr, op),
Code::STRB_r_T1 => StrbRT1::check_op2(instr, op),
Code::STRB_r_T2 => StrbRT2::check_op2(instr, op),
Code::STRD_i_T1_off => StrdIT1Off::check_op2(instr, op),
Code::STRD_i_T1_post => StrdIT1Post::check_op2(instr, op),
Code::STRD_i_T1_pre => StrdIT1Pre::check_op2(instr, op),
Code::STREXB_T1 => StrexbT1::check_op2(instr, op),
Code::STREXD_T1 => StrexdT1::check_op2(instr, op),
Code::STREXH_T1 => StrexhT1::check_op2(instr, op),
Code::STREX_T1 => StrexT1::check_op2(instr, op),
Code::STRHT_T1 => StrhtT1::check_op2(instr, op),
Code::STRH_i_T1 => StrhIT1::check_op2(instr, op),
Code::STRH_i_T2 => StrhIT2::check_op2(instr, op),
Code::STRH_i_T3_offn => StrhIT3Offn::check_op2(instr, op),
Code::STRH_i_T3_post => StrhIT3Post::check_op2(instr, op),
Code::STRH_i_T3_pre => StrhIT3Pre::check_op2(instr, op),
Code::STRH_r_T1 => StrhRT1::check_op2(instr, op),
Code::STRH_r_T2 => StrhRT2::check_op2(instr, op),
Code::STRT_T1 => StrtT1::check_op2(instr, op),
Code::STR_i_T1 => StrIT1::check_op2(instr, op),
Code::STR_i_T2 => StrIT2::check_op2(instr, op),
Code::STR_i_T3 => StrIT3::check_op2(instr, op),
Code::STR_i_T4_off => StrIT4Off::check_op2(instr, op),
Code::STR_i_T4_post => StrIT4Post::check_op2(instr, op),
Code::STR_i_T4_pre => StrIT4Pre::check_op2(instr, op),
Code::STR_r_T1 => StrRT1::check_op2(instr, op),
Code::STR_r_T2 => StrRT2::check_op2(instr, op),
Code::SUBS_PC_T5_AS => SubsPcT5As::check_op2(instr, op),
Code::SUBS_SP_i_T2 => SubsSpIT2::check_op2(instr, op),
Code::SUBS_SP_r_T1 => SubsSpRT1::check_op2(instr, op),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::check_op2(instr, op),
Code::SUBS_i_T3 => SubsIT3::check_op2(instr, op),
Code::SUBS_r_T2 => SubsRT2::check_op2(instr, op),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::check_op2(instr, op),
Code::SUB_ADR_T2 => SubAdrT2::check_op2(instr, op),
Code::SUB_SP_i_T1 => SubSpIT1::check_op2(instr, op),
Code::SUB_SP_i_T2 => SubSpIT2::check_op2(instr, op),
Code::SUB_SP_i_T3 => SubSpIT3::check_op2(instr, op),
Code::SUB_SP_r_T1 => SubSpRT1::check_op2(instr, op),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::check_op2(instr, op),
Code::SUB_i_T1 => SubIT1::check_op2(instr, op),
Code::SUB_i_T2 => SubIT2::check_op2(instr, op),
Code::SUB_i_T3 => SubIT3::check_op2(instr, op),
Code::SUB_i_T4 => SubIT4::check_op2(instr, op),
Code::SUB_r_T1 => SubRT1::check_op2(instr, op),
Code::SUB_r_T2 => SubRT2::check_op2(instr, op),
Code::SUB_r_T2_RRX => SubRT2Rrx::check_op2(instr, op),
Code::SVC_T1 => SvcT1::check_op2(instr, op),
Code::SXTAB16_T1 => Sxtab16T1::check_op2(instr, op),
Code::SXTAB_T1 => SxtabT1::check_op2(instr, op),
Code::SXTAH_T1 => SxtahT1::check_op2(instr, op),
Code::SXTB16_T1 => Sxtb16T1::check_op2(instr, op),
Code::SXTB_T1 => SxtbT1::check_op2(instr, op),
Code::SXTB_T2 => SxtbT2::check_op2(instr, op),
Code::SXTH_T1 => SxthT1::check_op2(instr, op),
Code::SXTH_T2 => SxthT2::check_op2(instr, op),
Code::TBB_T1 => TbbT1::check_op2(instr, op),
Code::TBH_T1 => TbhT1::check_op2(instr, op),
Code::TEQ_i_T1 => TeqIT1::check_op2(instr, op),
Code::TEQ_r_T1 => TeqRT1::check_op2(instr, op),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::check_op2(instr, op),
Code::TSB_T1 => TsbT1::check_op2(instr, op),
Code::TST_i_T1 => TstIT1::check_op2(instr, op),
Code::TST_r_T1 => TstRT1::check_op2(instr, op),
Code::TST_r_T2 => TstRT2::check_op2(instr, op),
Code::TST_r_T2_RRX => TstRT2Rrx::check_op2(instr, op),
Code::UADD16_T1 => Uadd16T1::check_op2(instr, op),
Code::UADD8_T1 => Uadd8T1::check_op2(instr, op),
Code::UASX_T1 => UasxT1::check_op2(instr, op),
Code::UBFX_T1 => UbfxT1::check_op2(instr, op),
Code::UDF_T1 => UdfT1::check_op2(instr, op),
Code::UDF_T2 => UdfT2::check_op2(instr, op),
Code::UDIV_T1 => UdivT1::check_op2(instr, op),
Code::UHADD16_T1 => Uhadd16T1::check_op2(instr, op),
Code::UHADD8_T1 => Uhadd8T1::check_op2(instr, op),
Code::UHASX_T1 => UhasxT1::check_op2(instr, op),
Code::UHSAX_T1 => UhsaxT1::check_op2(instr, op),
Code::UHSUB16_T1 => Uhsub16T1::check_op2(instr, op),
Code::UHSUB8_T1 => Uhsub8T1::check_op2(instr, op),
Code::UMAAL_T1 => UmaalT1::check_op2(instr, op),
Code::UMLAL_T1 => UmlalT1::check_op2(instr, op),
Code::UMULL_T1 => UmullT1::check_op2(instr, op),
Code::UQADD16_T1 => Uqadd16T1::check_op2(instr, op),
Code::UQADD8_T1 => Uqadd8T1::check_op2(instr, op),
Code::UQASX_T1 => UqasxT1::check_op2(instr, op),
Code::UQSAX_T1 => UqsaxT1::check_op2(instr, op),
Code::UQSUB16_T1 => Uqsub16T1::check_op2(instr, op),
Code::UQSUB8_T1 => Uqsub8T1::check_op2(instr, op),
Code::USAD8_T1 => Usad8T1::check_op2(instr, op),
Code::USADA8_T1 => Usada8T1::check_op2(instr, op),
Code::USAT16_T1 => Usat16T1::check_op2(instr, op),
Code::USAT_T1_ASR => UsatT1Asr::check_op2(instr, op),
Code::USAT_T1_LSL => UsatT1Lsl::check_op2(instr, op),
Code::USAX_T1 => UsaxT1::check_op2(instr, op),
Code::USUB16_T1 => Usub16T1::check_op2(instr, op),
Code::USUB8_T1 => Usub8T1::check_op2(instr, op),
Code::UXTAB16_T1 => Uxtab16T1::check_op2(instr, op),
Code::UXTAB_T1 => UxtabT1::check_op2(instr, op),
Code::UXTAH_T1 => UxtahT1::check_op2(instr, op),
Code::UXTB16_T1 => Uxtb16T1::check_op2(instr, op),
Code::UXTB_T1 => UxtbT1::check_op2(instr, op),
Code::UXTB_T2 => UxtbT2::check_op2(instr, op),
Code::UXTH_T1 => UxthT1::check_op2(instr, op),
Code::UXTH_T2 => UxthT2::check_op2(instr, op),
Code::WFE_T1 => WfeT1::check_op2(instr, op),
Code::WFE_T2 => WfeT2::check_op2(instr, op),
Code::WFI_T1 => WfiT1::check_op2(instr, op),
Code::WFI_T2 => WfiT2::check_op2(instr, op),
Code::YIELD_T1 => YieldT1::check_op2(instr, op),
Code::YIELD_T2 => YieldT2::check_op2(instr, op),
}
}
pub fn check_op3(&self, instr: &Instruction, op: &Operand) -> Result<()> {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::check_op3(instr, op),
Code::ADCS_r_T2 => AdcsRT2::check_op3(instr, op),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::check_op3(instr, op),
Code::ADC_i_T1 => AdcIT1::check_op3(instr, op),
Code::ADC_r_T1 => AdcRT1::check_op3(instr, op),
Code::ADC_r_T2 => AdcRT2::check_op3(instr, op),
Code::ADC_r_T2_RRX => AdcRT2Rrx::check_op3(instr, op),
Code::ADDS_SP_i_T3 => AddsSpIT3::check_op3(instr, op),
Code::ADDS_SP_r_T3 => AddsSpRT3::check_op3(instr, op),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::check_op3(instr, op),
Code::ADDS_i_T3 => AddsIT3::check_op3(instr, op),
Code::ADDS_r_T3 => AddsRT3::check_op3(instr, op),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::check_op3(instr, op),
Code::ADD_ADR_T1 => AddAdrT1::check_op3(instr, op),
Code::ADD_ADR_T3 => AddAdrT3::check_op3(instr, op),
Code::ADD_SP_i_T1 => AddSpIT1::check_op3(instr, op),
Code::ADD_SP_i_T2 => AddSpIT2::check_op3(instr, op),
Code::ADD_SP_i_T3 => AddSpIT3::check_op3(instr, op),
Code::ADD_SP_i_T4 => AddSpIT4::check_op3(instr, op),
Code::ADD_SP_r_T1 => AddSpRT1::check_op3(instr, op),
Code::ADD_SP_r_T2 => AddSpRT2::check_op3(instr, op),
Code::ADD_SP_r_T3 => AddSpRT3::check_op3(instr, op),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::check_op3(instr, op),
Code::ADD_i_T1 => AddIT1::check_op3(instr, op),
Code::ADD_i_T2 => AddIT2::check_op3(instr, op),
Code::ADD_i_T3 => AddIT3::check_op3(instr, op),
Code::ADD_i_T4 => AddIT4::check_op3(instr, op),
Code::ADD_r_T1 => AddRT1::check_op3(instr, op),
Code::ADD_r_T2 => AddRT2::check_op3(instr, op),
Code::ADD_r_T3 => AddRT3::check_op3(instr, op),
Code::ADD_r_T3_RRX => AddRT3Rrx::check_op3(instr, op),
Code::ADR_T1 => AdrT1::check_op3(instr, op),
Code::ADR_T2 => AdrT2::check_op3(instr, op),
Code::ADR_T3 => AdrT3::check_op3(instr, op),
Code::ANDS_i_T1 => AndsIT1::check_op3(instr, op),
Code::ANDS_r_T2 => AndsRT2::check_op3(instr, op),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::check_op3(instr, op),
Code::AND_i_T1 => AndIT1::check_op3(instr, op),
Code::AND_r_T1 => AndRT1::check_op3(instr, op),
Code::AND_r_T2 => AndRT2::check_op3(instr, op),
Code::AND_r_T2_RRX => AndRT2Rrx::check_op3(instr, op),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::check_op3(instr, op),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::check_op3(instr, op),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::check_op3(instr, op),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::check_op3(instr, op),
Code::ASR_MOV_r_T2 => AsrMovRT2::check_op3(instr, op),
Code::ASR_MOV_r_T3 => AsrMovRT3::check_op3(instr, op),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::check_op3(instr, op),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::check_op3(instr, op),
Code::BFC_T1 => BfcT1::check_op3(instr, op),
Code::BFI_T1 => BfiT1::check_op3(instr, op),
Code::BICS_i_T1 => BicsIT1::check_op3(instr, op),
Code::BICS_r_T2 => BicsRT2::check_op3(instr, op),
Code::BICS_r_T2_RRX => BicsRT2Rrx::check_op3(instr, op),
Code::BIC_i_T1 => BicIT1::check_op3(instr, op),
Code::BIC_r_T1 => BicRT1::check_op3(instr, op),
Code::BIC_r_T2 => BicRT2::check_op3(instr, op),
Code::BIC_r_T2_RRX => BicRT2Rrx::check_op3(instr, op),
Code::BKPT_T1 => BkptT1::check_op3(instr, op),
Code::BLX_r_T1 => BlxRT1::check_op3(instr, op),
Code::BL_i_T1 => BlIT1::check_op3(instr, op),
Code::BL_i_T2 => BlIT2::check_op3(instr, op),
Code::BXJ_T1 => BxjT1::check_op3(instr, op),
Code::BX_T1 => BxT1::check_op3(instr, op),
Code::B_T1 => BT1::check_op3(instr, op),
Code::B_T2 => BT2::check_op3(instr, op),
Code::B_T3 => BT3::check_op3(instr, op),
Code::B_T4 => BT4::check_op3(instr, op),
Code::CBNZ_T1 => CbnzT1::check_op3(instr, op),
Code::CBZ_T1 => CbzT1::check_op3(instr, op),
Code::CLRBHB_T1 => ClrbhbT1::check_op3(instr, op),
Code::CLREX_T1 => ClrexT1::check_op3(instr, op),
Code::CLZ_T1 => ClzT1::check_op3(instr, op),
Code::CMN_i_T1 => CmnIT1::check_op3(instr, op),
Code::CMN_r_T1 => CmnRT1::check_op3(instr, op),
Code::CMN_r_T2 => CmnRT2::check_op3(instr, op),
Code::CMN_r_T2_RRX => CmnRT2Rrx::check_op3(instr, op),
Code::CMP_i_T1 => CmpIT1::check_op3(instr, op),
Code::CMP_i_T2 => CmpIT2::check_op3(instr, op),
Code::CMP_r_T1 => CmpRT1::check_op3(instr, op),
Code::CMP_r_T2 => CmpRT2::check_op3(instr, op),
Code::CMP_r_T3 => CmpRT3::check_op3(instr, op),
Code::CMP_r_T3_RRX => CmpRT3Rrx::check_op3(instr, op),
Code::CPSID_T1_AS => CpsidT1As::check_op3(instr, op),
Code::CPSID_T2_AS => CpsidT2As::check_op3(instr, op),
Code::CPSID_T2_ASM => CpsidT2Asm::check_op3(instr, op),
Code::CPSIE_T1_AS => CpsieT1As::check_op3(instr, op),
Code::CPSIE_T2_AS => CpsieT2As::check_op3(instr, op),
Code::CPSIE_T2_ASM => CpsieT2Asm::check_op3(instr, op),
Code::CPS_T2_AS => CpsT2As::check_op3(instr, op),
Code::CRC32B_T1 => Crc32bT1::check_op3(instr, op),
Code::CRC32CB_T1 => Crc32cbT1::check_op3(instr, op),
Code::CRC32CH_T1 => Crc32chT1::check_op3(instr, op),
Code::CRC32CW_T1 => Crc32cwT1::check_op3(instr, op),
Code::CRC32H_T1 => Crc32hT1::check_op3(instr, op),
Code::CRC32W_T1 => Crc32wT1::check_op3(instr, op),
Code::CSDB_T1 => CsdbT1::check_op3(instr, op),
Code::DBG_T1 => DbgT1::check_op3(instr, op),
Code::DCPS1_T1 => Dcps1T1::check_op3(instr, op),
Code::DCPS2_T1 => Dcps2T1::check_op3(instr, op),
Code::DCPS3_T1 => Dcps3T1::check_op3(instr, op),
Code::DMB_T1 => DmbT1::check_op3(instr, op),
Code::DSB_T1 => DsbT1::check_op3(instr, op),
Code::EORS_i_T1 => EorsIT1::check_op3(instr, op),
Code::EORS_r_T2 => EorsRT2::check_op3(instr, op),
Code::EORS_r_T2_RRX => EorsRT2Rrx::check_op3(instr, op),
Code::EOR_i_T1 => EorIT1::check_op3(instr, op),
Code::EOR_r_T1 => EorRT1::check_op3(instr, op),
Code::EOR_r_T2 => EorRT2::check_op3(instr, op),
Code::EOR_r_T2_RRX => EorRT2Rrx::check_op3(instr, op),
Code::ERET_T1 => EretT1::check_op3(instr, op),
Code::ESB_T1 => EsbT1::check_op3(instr, op),
Code::HLT_T1 => HltT1::check_op3(instr, op),
Code::HVC_T1 => HvcT1::check_op3(instr, op),
Code::ISB_T1 => IsbT1::check_op3(instr, op),
Code::IT_T1 => ItT1::check_op3(instr, op),
Code::LDAB_T1 => LdabT1::check_op3(instr, op),
Code::LDAEXB_T1 => LdaexbT1::check_op3(instr, op),
Code::LDAEXD_T1 => LdaexdT1::check_op3(instr, op),
Code::LDAEXH_T1 => LdaexhT1::check_op3(instr, op),
Code::LDAEX_T1 => LdaexT1::check_op3(instr, op),
Code::LDAH_T1 => LdahT1::check_op3(instr, op),
Code::LDA_T1 => LdaT1::check_op3(instr, op),
Code::LDC_i_T1_off => LdcIT1Off::check_op3(instr, op),
Code::LDC_i_T1_post => LdcIT1Post::check_op3(instr, op),
Code::LDC_i_T1_pre => LdcIT1Pre::check_op3(instr, op),
Code::LDC_i_T1_unind => LdcIT1Unind::check_op3(instr, op),
Code::LDC_l_T1_off => LdcLT1Off::check_op3(instr, op),
Code::LDC_l_T1_post => LdcLT1Post::check_op3(instr, op),
Code::LDC_l_T1_pre => LdcLT1Pre::check_op3(instr, op),
Code::LDC_l_T1_unind => LdcLT1Unind::check_op3(instr, op),
Code::LDMDB_T1 => LdmdbT1::check_op3(instr, op),
Code::LDM_T1 => LdmT1::check_op3(instr, op),
Code::LDM_T2 => LdmT2::check_op3(instr, op),
Code::LDRBT_T1 => LdrbtT1::check_op3(instr, op),
Code::LDRB_i_T1 => LdrbIT1::check_op3(instr, op),
Code::LDRB_i_T2 => LdrbIT2::check_op3(instr, op),
Code::LDRB_i_T3_off => LdrbIT3Off::check_op3(instr, op),
Code::LDRB_i_T3_post => LdrbIT3Post::check_op3(instr, op),
Code::LDRB_i_T3_pre => LdrbIT3Pre::check_op3(instr, op),
Code::LDRB_l_T1 => LdrbLT1::check_op3(instr, op),
Code::LDRB_r_T1 => LdrbRT1::check_op3(instr, op),
Code::LDRB_r_T2 => LdrbRT2::check_op3(instr, op),
Code::LDRD_i_T1_off => LdrdIT1Off::check_op3(instr, op),
Code::LDRD_i_T1_post => LdrdIT1Post::check_op3(instr, op),
Code::LDRD_i_T1_pre => LdrdIT1Pre::check_op3(instr, op),
Code::LDRD_l_T1_off => LdrdLT1Off::check_op3(instr, op),
Code::LDRD_l_T1_post => LdrdLT1Post::check_op3(instr, op),
Code::LDRD_l_T1_pre => LdrdLT1Pre::check_op3(instr, op),
Code::LDREXB_T1 => LdrexbT1::check_op3(instr, op),
Code::LDREXD_T1 => LdrexdT1::check_op3(instr, op),
Code::LDREXH_T1 => LdrexhT1::check_op3(instr, op),
Code::LDREX_T1 => LdrexT1::check_op3(instr, op),
Code::LDRHT_T1 => LdrhtT1::check_op3(instr, op),
Code::LDRH_i_T1 => LdrhIT1::check_op3(instr, op),
Code::LDRH_i_T2 => LdrhIT2::check_op3(instr, op),
Code::LDRH_i_T3_off => LdrhIT3Off::check_op3(instr, op),
Code::LDRH_i_T3_post => LdrhIT3Post::check_op3(instr, op),
Code::LDRH_i_T3_pre => LdrhIT3Pre::check_op3(instr, op),
Code::LDRH_l_T1 => LdrhLT1::check_op3(instr, op),
Code::LDRH_r_T1 => LdrhRT1::check_op3(instr, op),
Code::LDRH_r_T2 => LdrhRT2::check_op3(instr, op),
Code::LDRSBT_T1 => LdrsbtT1::check_op3(instr, op),
Code::LDRSB_i_T1 => LdrsbIT1::check_op3(instr, op),
Code::LDRSB_i_T2_off => LdrsbIT2Off::check_op3(instr, op),
Code::LDRSB_i_T2_post => LdrsbIT2Post::check_op3(instr, op),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::check_op3(instr, op),
Code::LDRSB_l_T1 => LdrsbLT1::check_op3(instr, op),
Code::LDRSB_r_T1 => LdrsbRT1::check_op3(instr, op),
Code::LDRSB_r_T2 => LdrsbRT2::check_op3(instr, op),
Code::LDRSHT_T1 => LdrshtT1::check_op3(instr, op),
Code::LDRSH_i_T1 => LdrshIT1::check_op3(instr, op),
Code::LDRSH_i_T2_off => LdrshIT2Off::check_op3(instr, op),
Code::LDRSH_i_T2_post => LdrshIT2Post::check_op3(instr, op),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::check_op3(instr, op),
Code::LDRSH_l_T1 => LdrshLT1::check_op3(instr, op),
Code::LDRSH_r_T1 => LdrshRT1::check_op3(instr, op),
Code::LDRSH_r_T2 => LdrshRT2::check_op3(instr, op),
Code::LDRT_T1 => LdrtT1::check_op3(instr, op),
Code::LDR_i_T1 => LdrIT1::check_op3(instr, op),
Code::LDR_i_T2 => LdrIT2::check_op3(instr, op),
Code::LDR_i_T3 => LdrIT3::check_op3(instr, op),
Code::LDR_i_T4_off => LdrIT4Off::check_op3(instr, op),
Code::LDR_i_T4_post => LdrIT4Post::check_op3(instr, op),
Code::LDR_i_T4_pre => LdrIT4Pre::check_op3(instr, op),
Code::LDR_l_T2 => LdrLT2::check_op3(instr, op),
Code::LDR_r_T1 => LdrRT1::check_op3(instr, op),
Code::LDR_r_T2 => LdrRT2::check_op3(instr, op),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::check_op3(instr, op),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::check_op3(instr, op),
Code::LSLS_MOV_r_T2 => LslsMovRT2::check_op3(instr, op),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::check_op3(instr, op),
Code::LSL_MOV_r_T2 => LslMovRT2::check_op3(instr, op),
Code::LSL_MOV_r_T3 => LslMovRT3::check_op3(instr, op),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::check_op3(instr, op),
Code::LSL_MOV_rr_T2 => LslMovRrT2::check_op3(instr, op),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::check_op3(instr, op),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::check_op3(instr, op),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::check_op3(instr, op),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::check_op3(instr, op),
Code::LSR_MOV_r_T2 => LsrMovRT2::check_op3(instr, op),
Code::LSR_MOV_r_T3 => LsrMovRT3::check_op3(instr, op),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::check_op3(instr, op),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::check_op3(instr, op),
Code::MCRR_T1 => McrrT1::check_op3(instr, op),
Code::MCR_T1 => McrT1::check_op3(instr, op),
Code::MLA_T1 => MlaT1::check_op3(instr, op),
Code::MLS_T1 => MlsT1::check_op3(instr, op),
Code::MOVS_i_T2 => MovsIT2::check_op3(instr, op),
Code::MOVS_r_T3 => MovsRT3::check_op3(instr, op),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::check_op3(instr, op),
Code::MOVS_rr_T2 => MovsRrT2::check_op3(instr, op),
Code::MOVT_T1 => MovtT1::check_op3(instr, op),
Code::MOV_i_T1 => MovIT1::check_op3(instr, op),
Code::MOV_i_T2 => MovIT2::check_op3(instr, op),
Code::MOV_i_T3 => MovIT3::check_op3(instr, op),
Code::MOV_r_T1 => MovRT1::check_op3(instr, op),
Code::MOV_r_T2 => MovRT2::check_op3(instr, op),
Code::MOV_r_T3 => MovRT3::check_op3(instr, op),
Code::MOV_r_T3_RRX => MovRT3Rrx::check_op3(instr, op),
Code::MOV_rr_T1_ASR => MovRrT1Asr::check_op3(instr, op),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::check_op3(instr, op),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::check_op3(instr, op),
Code::MOV_rr_T1_ROR => MovRrT1Ror::check_op3(instr, op),
Code::MOV_rr_T2 => MovRrT2::check_op3(instr, op),
Code::MRC_T1 => MrcT1::check_op3(instr, op),
Code::MRRC_T1 => MrrcT1::check_op3(instr, op),
Code::MRS_T1_AS => MrsT1As::check_op3(instr, op),
Code::MRS_br_T1_AS => MrsBrT1As::check_op3(instr, op),
Code::MSR_br_T1_AS => MsrBrT1As::check_op3(instr, op),
Code::MSR_r_T1_AS => MsrRT1As::check_op3(instr, op),
Code::MUL_T1 => MulT1::check_op3(instr, op),
Code::MUL_T2 => MulT2::check_op3(instr, op),
Code::MVNS_i_T1 => MvnsIT1::check_op3(instr, op),
Code::MVNS_r_T2 => MvnsRT2::check_op3(instr, op),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::check_op3(instr, op),
Code::MVN_i_T1 => MvnIT1::check_op3(instr, op),
Code::MVN_r_T1 => MvnRT1::check_op3(instr, op),
Code::MVN_r_T2 => MvnRT2::check_op3(instr, op),
Code::MVN_r_T2_RRX => MvnRT2Rrx::check_op3(instr, op),
Code::NOP_T1 => NopT1::check_op3(instr, op),
Code::NOP_T2 => NopT2::check_op3(instr, op),
Code::ORNS_i_T1 => OrnsIT1::check_op3(instr, op),
Code::ORNS_r_T1 => OrnsRT1::check_op3(instr, op),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::check_op3(instr, op),
Code::ORN_i_T1 => OrnIT1::check_op3(instr, op),
Code::ORN_r_T1 => OrnRT1::check_op3(instr, op),
Code::ORN_r_T1_RRX => OrnRT1Rrx::check_op3(instr, op),
Code::ORRS_i_T1 => OrrsIT1::check_op3(instr, op),
Code::ORRS_r_T2 => OrrsRT2::check_op3(instr, op),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::check_op3(instr, op),
Code::ORR_i_T1 => OrrIT1::check_op3(instr, op),
Code::ORR_r_T1 => OrrRT1::check_op3(instr, op),
Code::ORR_r_T2 => OrrRT2::check_op3(instr, op),
Code::ORR_r_T2_RRX => OrrRT2Rrx::check_op3(instr, op),
Code::PKHBT_T1 => PkhbtT1::check_op3(instr, op),
Code::PKHTB_T1 => PkhtbT1::check_op3(instr, op),
Code::PLDW_i_T1 => PldwIT1::check_op3(instr, op),
Code::PLDW_i_T2 => PldwIT2::check_op3(instr, op),
Code::PLDW_r_T1 => PldwRT1::check_op3(instr, op),
Code::PLD_i_T1 => PldIT1::check_op3(instr, op),
Code::PLD_i_T2 => PldIT2::check_op3(instr, op),
Code::PLD_l_T1 => PldLT1::check_op3(instr, op),
Code::PLD_r_T1 => PldRT1::check_op3(instr, op),
Code::PLI_i_T1 => PliIT1::check_op3(instr, op),
Code::PLI_i_T2 => PliIT2::check_op3(instr, op),
Code::PLI_i_T3 => PliIT3::check_op3(instr, op),
Code::PLI_r_T1 => PliRT1::check_op3(instr, op),
Code::POP_LDM_T2 => PopLdmT2::check_op3(instr, op),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::check_op3(instr, op),
Code::POP_T1 => PopT1::check_op3(instr, op),
Code::PSSBB_T1 => PssbbT1::check_op3(instr, op),
Code::PUSH_STMDB_T1 => PushStmdbT1::check_op3(instr, op),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::check_op3(instr, op),
Code::PUSH_T1 => PushT1::check_op3(instr, op),
Code::QADD16_T1 => Qadd16T1::check_op3(instr, op),
Code::QADD8_T1 => Qadd8T1::check_op3(instr, op),
Code::QADD_T1 => QaddT1::check_op3(instr, op),
Code::QASX_T1 => QasxT1::check_op3(instr, op),
Code::QDADD_T1 => QdaddT1::check_op3(instr, op),
Code::QDSUB_T1 => QdsubT1::check_op3(instr, op),
Code::QSAX_T1 => QsaxT1::check_op3(instr, op),
Code::QSUB16_T1 => Qsub16T1::check_op3(instr, op),
Code::QSUB8_T1 => Qsub8T1::check_op3(instr, op),
Code::QSUB_T1 => QsubT1::check_op3(instr, op),
Code::RBIT_T1 => RbitT1::check_op3(instr, op),
Code::REV16_T1 => Rev16T1::check_op3(instr, op),
Code::REV16_T2 => Rev16T2::check_op3(instr, op),
Code::REVSH_T1 => RevshT1::check_op3(instr, op),
Code::REVSH_T2 => RevshT2::check_op3(instr, op),
Code::REV_T1 => RevT1::check_op3(instr, op),
Code::REV_T2 => RevT2::check_op3(instr, op),
Code::RFE_T1_AS => RfeT1As::check_op3(instr, op),
Code::RFE_T2_AS => RfeT2As::check_op3(instr, op),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::check_op3(instr, op),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::check_op3(instr, op),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::check_op3(instr, op),
Code::ROR_MOV_r_T3 => RorMovRT3::check_op3(instr, op),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::check_op3(instr, op),
Code::ROR_MOV_rr_T2 => RorMovRrT2::check_op3(instr, op),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::check_op3(instr, op),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::check_op3(instr, op),
Code::RSBS_i_T2 => RsbsIT2::check_op3(instr, op),
Code::RSBS_r_T1 => RsbsRT1::check_op3(instr, op),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::check_op3(instr, op),
Code::RSB_i_T1 => RsbIT1::check_op3(instr, op),
Code::RSB_i_T2 => RsbIT2::check_op3(instr, op),
Code::RSB_r_T1 => RsbRT1::check_op3(instr, op),
Code::RSB_r_T1_RRX => RsbRT1Rrx::check_op3(instr, op),
Code::SADD16_T1 => Sadd16T1::check_op3(instr, op),
Code::SADD8_T1 => Sadd8T1::check_op3(instr, op),
Code::SASX_T1 => SasxT1::check_op3(instr, op),
Code::SBCS_i_T1 => SbcsIT1::check_op3(instr, op),
Code::SBCS_r_T2 => SbcsRT2::check_op3(instr, op),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::check_op3(instr, op),
Code::SBC_i_T1 => SbcIT1::check_op3(instr, op),
Code::SBC_r_T1 => SbcRT1::check_op3(instr, op),
Code::SBC_r_T2 => SbcRT2::check_op3(instr, op),
Code::SBC_r_T2_RRX => SbcRT2Rrx::check_op3(instr, op),
Code::SBFX_T1 => SbfxT1::check_op3(instr, op),
Code::SB_T1 => SbT1::check_op3(instr, op),
Code::SDIV_T1 => SdivT1::check_op3(instr, op),
Code::SEL_T1 => SelT1::check_op3(instr, op),
Code::SETEND_T1 => SetendT1::check_op3(instr, op),
Code::SETPAN_T1 => SetpanT1::check_op3(instr, op),
Code::SEVL_T1 => SevlT1::check_op3(instr, op),
Code::SEVL_T2 => SevlT2::check_op3(instr, op),
Code::SEV_T1 => SevT1::check_op3(instr, op),
Code::SEV_T2 => SevT2::check_op3(instr, op),
Code::SHADD16_T1 => Shadd16T1::check_op3(instr, op),
Code::SHADD8_T1 => Shadd8T1::check_op3(instr, op),
Code::SHASX_T1 => ShasxT1::check_op3(instr, op),
Code::SHSAX_T1 => ShsaxT1::check_op3(instr, op),
Code::SHSUB16_T1 => Shsub16T1::check_op3(instr, op),
Code::SHSUB8_T1 => Shsub8T1::check_op3(instr, op),
Code::SMC_T1_AS => SmcT1As::check_op3(instr, op),
Code::SMLABB_T1 => SmlabbT1::check_op3(instr, op),
Code::SMLABT_T1 => SmlabtT1::check_op3(instr, op),
Code::SMLADX_T1 => SmladxT1::check_op3(instr, op),
Code::SMLAD_T1 => SmladT1::check_op3(instr, op),
Code::SMLALBB_T1 => SmlalbbT1::check_op3(instr, op),
Code::SMLALBT_T1 => SmlalbtT1::check_op3(instr, op),
Code::SMLALDX_T1 => SmlaldxT1::check_op3(instr, op),
Code::SMLALD_T1 => SmlaldT1::check_op3(instr, op),
Code::SMLALTB_T1 => SmlaltbT1::check_op3(instr, op),
Code::SMLALTT_T1 => SmlalttT1::check_op3(instr, op),
Code::SMLAL_T1 => SmlalT1::check_op3(instr, op),
Code::SMLATB_T1 => SmlatbT1::check_op3(instr, op),
Code::SMLATT_T1 => SmlattT1::check_op3(instr, op),
Code::SMLAWB_T1 => SmlawbT1::check_op3(instr, op),
Code::SMLAWT_T1 => SmlawtT1::check_op3(instr, op),
Code::SMLSDX_T1 => SmlsdxT1::check_op3(instr, op),
Code::SMLSD_T1 => SmlsdT1::check_op3(instr, op),
Code::SMLSLDX_T1 => SmlsldxT1::check_op3(instr, op),
Code::SMLSLD_T1 => SmlsldT1::check_op3(instr, op),
Code::SMMLAR_T1 => SmmlarT1::check_op3(instr, op),
Code::SMMLA_T1 => SmmlaT1::check_op3(instr, op),
Code::SMMLSR_T1 => SmmlsrT1::check_op3(instr, op),
Code::SMMLS_T1 => SmmlsT1::check_op3(instr, op),
Code::SMMULR_T1 => SmmulrT1::check_op3(instr, op),
Code::SMMUL_T1 => SmmulT1::check_op3(instr, op),
Code::SMUADX_T1 => SmuadxT1::check_op3(instr, op),
Code::SMUAD_T1 => SmuadT1::check_op3(instr, op),
Code::SMULBB_T1 => SmulbbT1::check_op3(instr, op),
Code::SMULBT_T1 => SmulbtT1::check_op3(instr, op),
Code::SMULL_T1 => SmullT1::check_op3(instr, op),
Code::SMULTB_T1 => SmultbT1::check_op3(instr, op),
Code::SMULTT_T1 => SmulttT1::check_op3(instr, op),
Code::SMULWB_T1 => SmulwbT1::check_op3(instr, op),
Code::SMULWT_T1 => SmulwtT1::check_op3(instr, op),
Code::SMUSDX_T1 => SmusdxT1::check_op3(instr, op),
Code::SMUSD_T1 => SmusdT1::check_op3(instr, op),
Code::SRS_T1_AS => SrsT1As::check_op3(instr, op),
Code::SRS_T2_AS => SrsT2As::check_op3(instr, op),
Code::SSAT16_T1 => Ssat16T1::check_op3(instr, op),
Code::SSAT_T1_ASR => SsatT1Asr::check_op3(instr, op),
Code::SSAT_T1_LSL => SsatT1Lsl::check_op3(instr, op),
Code::SSAX_T1 => SsaxT1::check_op3(instr, op),
Code::SSBB_T1 => SsbbT1::check_op3(instr, op),
Code::SSUB16_T1 => Ssub16T1::check_op3(instr, op),
Code::SSUB8_T1 => Ssub8T1::check_op3(instr, op),
Code::STC_T1_off => StcT1Off::check_op3(instr, op),
Code::STC_T1_post => StcT1Post::check_op3(instr, op),
Code::STC_T1_pre => StcT1Pre::check_op3(instr, op),
Code::STC_T1_unind => StcT1Unind::check_op3(instr, op),
Code::STLB_T1 => StlbT1::check_op3(instr, op),
Code::STLEXB_T1 => StlexbT1::check_op3(instr, op),
Code::STLEXD_T1 => StlexdT1::check_op3(instr, op),
Code::STLEXH_T1 => StlexhT1::check_op3(instr, op),
Code::STLEX_T1 => StlexT1::check_op3(instr, op),
Code::STLH_T1 => StlhT1::check_op3(instr, op),
Code::STL_T1 => StlT1::check_op3(instr, op),
Code::STMDB_T1 => StmdbT1::check_op3(instr, op),
Code::STM_T1 => StmT1::check_op3(instr, op),
Code::STM_T2 => StmT2::check_op3(instr, op),
Code::STRBT_T1 => StrbtT1::check_op3(instr, op),
Code::STRB_i_T1 => StrbIT1::check_op3(instr, op),
Code::STRB_i_T2 => StrbIT2::check_op3(instr, op),
Code::STRB_i_T3_offn => StrbIT3Offn::check_op3(instr, op),
Code::STRB_i_T3_post => StrbIT3Post::check_op3(instr, op),
Code::STRB_i_T3_pre => StrbIT3Pre::check_op3(instr, op),
Code::STRB_r_T1 => StrbRT1::check_op3(instr, op),
Code::STRB_r_T2 => StrbRT2::check_op3(instr, op),
Code::STRD_i_T1_off => StrdIT1Off::check_op3(instr, op),
Code::STRD_i_T1_post => StrdIT1Post::check_op3(instr, op),
Code::STRD_i_T1_pre => StrdIT1Pre::check_op3(instr, op),
Code::STREXB_T1 => StrexbT1::check_op3(instr, op),
Code::STREXD_T1 => StrexdT1::check_op3(instr, op),
Code::STREXH_T1 => StrexhT1::check_op3(instr, op),
Code::STREX_T1 => StrexT1::check_op3(instr, op),
Code::STRHT_T1 => StrhtT1::check_op3(instr, op),
Code::STRH_i_T1 => StrhIT1::check_op3(instr, op),
Code::STRH_i_T2 => StrhIT2::check_op3(instr, op),
Code::STRH_i_T3_offn => StrhIT3Offn::check_op3(instr, op),
Code::STRH_i_T3_post => StrhIT3Post::check_op3(instr, op),
Code::STRH_i_T3_pre => StrhIT3Pre::check_op3(instr, op),
Code::STRH_r_T1 => StrhRT1::check_op3(instr, op),
Code::STRH_r_T2 => StrhRT2::check_op3(instr, op),
Code::STRT_T1 => StrtT1::check_op3(instr, op),
Code::STR_i_T1 => StrIT1::check_op3(instr, op),
Code::STR_i_T2 => StrIT2::check_op3(instr, op),
Code::STR_i_T3 => StrIT3::check_op3(instr, op),
Code::STR_i_T4_off => StrIT4Off::check_op3(instr, op),
Code::STR_i_T4_post => StrIT4Post::check_op3(instr, op),
Code::STR_i_T4_pre => StrIT4Pre::check_op3(instr, op),
Code::STR_r_T1 => StrRT1::check_op3(instr, op),
Code::STR_r_T2 => StrRT2::check_op3(instr, op),
Code::SUBS_PC_T5_AS => SubsPcT5As::check_op3(instr, op),
Code::SUBS_SP_i_T2 => SubsSpIT2::check_op3(instr, op),
Code::SUBS_SP_r_T1 => SubsSpRT1::check_op3(instr, op),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::check_op3(instr, op),
Code::SUBS_i_T3 => SubsIT3::check_op3(instr, op),
Code::SUBS_r_T2 => SubsRT2::check_op3(instr, op),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::check_op3(instr, op),
Code::SUB_ADR_T2 => SubAdrT2::check_op3(instr, op),
Code::SUB_SP_i_T1 => SubSpIT1::check_op3(instr, op),
Code::SUB_SP_i_T2 => SubSpIT2::check_op3(instr, op),
Code::SUB_SP_i_T3 => SubSpIT3::check_op3(instr, op),
Code::SUB_SP_r_T1 => SubSpRT1::check_op3(instr, op),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::check_op3(instr, op),
Code::SUB_i_T1 => SubIT1::check_op3(instr, op),
Code::SUB_i_T2 => SubIT2::check_op3(instr, op),
Code::SUB_i_T3 => SubIT3::check_op3(instr, op),
Code::SUB_i_T4 => SubIT4::check_op3(instr, op),
Code::SUB_r_T1 => SubRT1::check_op3(instr, op),
Code::SUB_r_T2 => SubRT2::check_op3(instr, op),
Code::SUB_r_T2_RRX => SubRT2Rrx::check_op3(instr, op),
Code::SVC_T1 => SvcT1::check_op3(instr, op),
Code::SXTAB16_T1 => Sxtab16T1::check_op3(instr, op),
Code::SXTAB_T1 => SxtabT1::check_op3(instr, op),
Code::SXTAH_T1 => SxtahT1::check_op3(instr, op),
Code::SXTB16_T1 => Sxtb16T1::check_op3(instr, op),
Code::SXTB_T1 => SxtbT1::check_op3(instr, op),
Code::SXTB_T2 => SxtbT2::check_op3(instr, op),
Code::SXTH_T1 => SxthT1::check_op3(instr, op),
Code::SXTH_T2 => SxthT2::check_op3(instr, op),
Code::TBB_T1 => TbbT1::check_op3(instr, op),
Code::TBH_T1 => TbhT1::check_op3(instr, op),
Code::TEQ_i_T1 => TeqIT1::check_op3(instr, op),
Code::TEQ_r_T1 => TeqRT1::check_op3(instr, op),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::check_op3(instr, op),
Code::TSB_T1 => TsbT1::check_op3(instr, op),
Code::TST_i_T1 => TstIT1::check_op3(instr, op),
Code::TST_r_T1 => TstRT1::check_op3(instr, op),
Code::TST_r_T2 => TstRT2::check_op3(instr, op),
Code::TST_r_T2_RRX => TstRT2Rrx::check_op3(instr, op),
Code::UADD16_T1 => Uadd16T1::check_op3(instr, op),
Code::UADD8_T1 => Uadd8T1::check_op3(instr, op),
Code::UASX_T1 => UasxT1::check_op3(instr, op),
Code::UBFX_T1 => UbfxT1::check_op3(instr, op),
Code::UDF_T1 => UdfT1::check_op3(instr, op),
Code::UDF_T2 => UdfT2::check_op3(instr, op),
Code::UDIV_T1 => UdivT1::check_op3(instr, op),
Code::UHADD16_T1 => Uhadd16T1::check_op3(instr, op),
Code::UHADD8_T1 => Uhadd8T1::check_op3(instr, op),
Code::UHASX_T1 => UhasxT1::check_op3(instr, op),
Code::UHSAX_T1 => UhsaxT1::check_op3(instr, op),
Code::UHSUB16_T1 => Uhsub16T1::check_op3(instr, op),
Code::UHSUB8_T1 => Uhsub8T1::check_op3(instr, op),
Code::UMAAL_T1 => UmaalT1::check_op3(instr, op),
Code::UMLAL_T1 => UmlalT1::check_op3(instr, op),
Code::UMULL_T1 => UmullT1::check_op3(instr, op),
Code::UQADD16_T1 => Uqadd16T1::check_op3(instr, op),
Code::UQADD8_T1 => Uqadd8T1::check_op3(instr, op),
Code::UQASX_T1 => UqasxT1::check_op3(instr, op),
Code::UQSAX_T1 => UqsaxT1::check_op3(instr, op),
Code::UQSUB16_T1 => Uqsub16T1::check_op3(instr, op),
Code::UQSUB8_T1 => Uqsub8T1::check_op3(instr, op),
Code::USAD8_T1 => Usad8T1::check_op3(instr, op),
Code::USADA8_T1 => Usada8T1::check_op3(instr, op),
Code::USAT16_T1 => Usat16T1::check_op3(instr, op),
Code::USAT_T1_ASR => UsatT1Asr::check_op3(instr, op),
Code::USAT_T1_LSL => UsatT1Lsl::check_op3(instr, op),
Code::USAX_T1 => UsaxT1::check_op3(instr, op),
Code::USUB16_T1 => Usub16T1::check_op3(instr, op),
Code::USUB8_T1 => Usub8T1::check_op3(instr, op),
Code::UXTAB16_T1 => Uxtab16T1::check_op3(instr, op),
Code::UXTAB_T1 => UxtabT1::check_op3(instr, op),
Code::UXTAH_T1 => UxtahT1::check_op3(instr, op),
Code::UXTB16_T1 => Uxtb16T1::check_op3(instr, op),
Code::UXTB_T1 => UxtbT1::check_op3(instr, op),
Code::UXTB_T2 => UxtbT2::check_op3(instr, op),
Code::UXTH_T1 => UxthT1::check_op3(instr, op),
Code::UXTH_T2 => UxthT2::check_op3(instr, op),
Code::WFE_T1 => WfeT1::check_op3(instr, op),
Code::WFE_T2 => WfeT2::check_op3(instr, op),
Code::WFI_T1 => WfiT1::check_op3(instr, op),
Code::WFI_T2 => WfiT2::check_op3(instr, op),
Code::YIELD_T1 => YieldT1::check_op3(instr, op),
Code::YIELD_T2 => YieldT2::check_op3(instr, op),
}
}
pub fn check_op4(&self, instr: &Instruction, op: &Operand) -> Result<()> {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::check_op4(instr, op),
Code::ADCS_r_T2 => AdcsRT2::check_op4(instr, op),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::check_op4(instr, op),
Code::ADC_i_T1 => AdcIT1::check_op4(instr, op),
Code::ADC_r_T1 => AdcRT1::check_op4(instr, op),
Code::ADC_r_T2 => AdcRT2::check_op4(instr, op),
Code::ADC_r_T2_RRX => AdcRT2Rrx::check_op4(instr, op),
Code::ADDS_SP_i_T3 => AddsSpIT3::check_op4(instr, op),
Code::ADDS_SP_r_T3 => AddsSpRT3::check_op4(instr, op),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::check_op4(instr, op),
Code::ADDS_i_T3 => AddsIT3::check_op4(instr, op),
Code::ADDS_r_T3 => AddsRT3::check_op4(instr, op),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::check_op4(instr, op),
Code::ADD_ADR_T1 => AddAdrT1::check_op4(instr, op),
Code::ADD_ADR_T3 => AddAdrT3::check_op4(instr, op),
Code::ADD_SP_i_T1 => AddSpIT1::check_op4(instr, op),
Code::ADD_SP_i_T2 => AddSpIT2::check_op4(instr, op),
Code::ADD_SP_i_T3 => AddSpIT3::check_op4(instr, op),
Code::ADD_SP_i_T4 => AddSpIT4::check_op4(instr, op),
Code::ADD_SP_r_T1 => AddSpRT1::check_op4(instr, op),
Code::ADD_SP_r_T2 => AddSpRT2::check_op4(instr, op),
Code::ADD_SP_r_T3 => AddSpRT3::check_op4(instr, op),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::check_op4(instr, op),
Code::ADD_i_T1 => AddIT1::check_op4(instr, op),
Code::ADD_i_T2 => AddIT2::check_op4(instr, op),
Code::ADD_i_T3 => AddIT3::check_op4(instr, op),
Code::ADD_i_T4 => AddIT4::check_op4(instr, op),
Code::ADD_r_T1 => AddRT1::check_op4(instr, op),
Code::ADD_r_T2 => AddRT2::check_op4(instr, op),
Code::ADD_r_T3 => AddRT3::check_op4(instr, op),
Code::ADD_r_T3_RRX => AddRT3Rrx::check_op4(instr, op),
Code::ADR_T1 => AdrT1::check_op4(instr, op),
Code::ADR_T2 => AdrT2::check_op4(instr, op),
Code::ADR_T3 => AdrT3::check_op4(instr, op),
Code::ANDS_i_T1 => AndsIT1::check_op4(instr, op),
Code::ANDS_r_T2 => AndsRT2::check_op4(instr, op),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::check_op4(instr, op),
Code::AND_i_T1 => AndIT1::check_op4(instr, op),
Code::AND_r_T1 => AndRT1::check_op4(instr, op),
Code::AND_r_T2 => AndRT2::check_op4(instr, op),
Code::AND_r_T2_RRX => AndRT2Rrx::check_op4(instr, op),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::check_op4(instr, op),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::check_op4(instr, op),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::check_op4(instr, op),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::check_op4(instr, op),
Code::ASR_MOV_r_T2 => AsrMovRT2::check_op4(instr, op),
Code::ASR_MOV_r_T3 => AsrMovRT3::check_op4(instr, op),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::check_op4(instr, op),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::check_op4(instr, op),
Code::BFC_T1 => BfcT1::check_op4(instr, op),
Code::BFI_T1 => BfiT1::check_op4(instr, op),
Code::BICS_i_T1 => BicsIT1::check_op4(instr, op),
Code::BICS_r_T2 => BicsRT2::check_op4(instr, op),
Code::BICS_r_T2_RRX => BicsRT2Rrx::check_op4(instr, op),
Code::BIC_i_T1 => BicIT1::check_op4(instr, op),
Code::BIC_r_T1 => BicRT1::check_op4(instr, op),
Code::BIC_r_T2 => BicRT2::check_op4(instr, op),
Code::BIC_r_T2_RRX => BicRT2Rrx::check_op4(instr, op),
Code::BKPT_T1 => BkptT1::check_op4(instr, op),
Code::BLX_r_T1 => BlxRT1::check_op4(instr, op),
Code::BL_i_T1 => BlIT1::check_op4(instr, op),
Code::BL_i_T2 => BlIT2::check_op4(instr, op),
Code::BXJ_T1 => BxjT1::check_op4(instr, op),
Code::BX_T1 => BxT1::check_op4(instr, op),
Code::B_T1 => BT1::check_op4(instr, op),
Code::B_T2 => BT2::check_op4(instr, op),
Code::B_T3 => BT3::check_op4(instr, op),
Code::B_T4 => BT4::check_op4(instr, op),
Code::CBNZ_T1 => CbnzT1::check_op4(instr, op),
Code::CBZ_T1 => CbzT1::check_op4(instr, op),
Code::CLRBHB_T1 => ClrbhbT1::check_op4(instr, op),
Code::CLREX_T1 => ClrexT1::check_op4(instr, op),
Code::CLZ_T1 => ClzT1::check_op4(instr, op),
Code::CMN_i_T1 => CmnIT1::check_op4(instr, op),
Code::CMN_r_T1 => CmnRT1::check_op4(instr, op),
Code::CMN_r_T2 => CmnRT2::check_op4(instr, op),
Code::CMN_r_T2_RRX => CmnRT2Rrx::check_op4(instr, op),
Code::CMP_i_T1 => CmpIT1::check_op4(instr, op),
Code::CMP_i_T2 => CmpIT2::check_op4(instr, op),
Code::CMP_r_T1 => CmpRT1::check_op4(instr, op),
Code::CMP_r_T2 => CmpRT2::check_op4(instr, op),
Code::CMP_r_T3 => CmpRT3::check_op4(instr, op),
Code::CMP_r_T3_RRX => CmpRT3Rrx::check_op4(instr, op),
Code::CPSID_T1_AS => CpsidT1As::check_op4(instr, op),
Code::CPSID_T2_AS => CpsidT2As::check_op4(instr, op),
Code::CPSID_T2_ASM => CpsidT2Asm::check_op4(instr, op),
Code::CPSIE_T1_AS => CpsieT1As::check_op4(instr, op),
Code::CPSIE_T2_AS => CpsieT2As::check_op4(instr, op),
Code::CPSIE_T2_ASM => CpsieT2Asm::check_op4(instr, op),
Code::CPS_T2_AS => CpsT2As::check_op4(instr, op),
Code::CRC32B_T1 => Crc32bT1::check_op4(instr, op),
Code::CRC32CB_T1 => Crc32cbT1::check_op4(instr, op),
Code::CRC32CH_T1 => Crc32chT1::check_op4(instr, op),
Code::CRC32CW_T1 => Crc32cwT1::check_op4(instr, op),
Code::CRC32H_T1 => Crc32hT1::check_op4(instr, op),
Code::CRC32W_T1 => Crc32wT1::check_op4(instr, op),
Code::CSDB_T1 => CsdbT1::check_op4(instr, op),
Code::DBG_T1 => DbgT1::check_op4(instr, op),
Code::DCPS1_T1 => Dcps1T1::check_op4(instr, op),
Code::DCPS2_T1 => Dcps2T1::check_op4(instr, op),
Code::DCPS3_T1 => Dcps3T1::check_op4(instr, op),
Code::DMB_T1 => DmbT1::check_op4(instr, op),
Code::DSB_T1 => DsbT1::check_op4(instr, op),
Code::EORS_i_T1 => EorsIT1::check_op4(instr, op),
Code::EORS_r_T2 => EorsRT2::check_op4(instr, op),
Code::EORS_r_T2_RRX => EorsRT2Rrx::check_op4(instr, op),
Code::EOR_i_T1 => EorIT1::check_op4(instr, op),
Code::EOR_r_T1 => EorRT1::check_op4(instr, op),
Code::EOR_r_T2 => EorRT2::check_op4(instr, op),
Code::EOR_r_T2_RRX => EorRT2Rrx::check_op4(instr, op),
Code::ERET_T1 => EretT1::check_op4(instr, op),
Code::ESB_T1 => EsbT1::check_op4(instr, op),
Code::HLT_T1 => HltT1::check_op4(instr, op),
Code::HVC_T1 => HvcT1::check_op4(instr, op),
Code::ISB_T1 => IsbT1::check_op4(instr, op),
Code::IT_T1 => ItT1::check_op4(instr, op),
Code::LDAB_T1 => LdabT1::check_op4(instr, op),
Code::LDAEXB_T1 => LdaexbT1::check_op4(instr, op),
Code::LDAEXD_T1 => LdaexdT1::check_op4(instr, op),
Code::LDAEXH_T1 => LdaexhT1::check_op4(instr, op),
Code::LDAEX_T1 => LdaexT1::check_op4(instr, op),
Code::LDAH_T1 => LdahT1::check_op4(instr, op),
Code::LDA_T1 => LdaT1::check_op4(instr, op),
Code::LDC_i_T1_off => LdcIT1Off::check_op4(instr, op),
Code::LDC_i_T1_post => LdcIT1Post::check_op4(instr, op),
Code::LDC_i_T1_pre => LdcIT1Pre::check_op4(instr, op),
Code::LDC_i_T1_unind => LdcIT1Unind::check_op4(instr, op),
Code::LDC_l_T1_off => LdcLT1Off::check_op4(instr, op),
Code::LDC_l_T1_post => LdcLT1Post::check_op4(instr, op),
Code::LDC_l_T1_pre => LdcLT1Pre::check_op4(instr, op),
Code::LDC_l_T1_unind => LdcLT1Unind::check_op4(instr, op),
Code::LDMDB_T1 => LdmdbT1::check_op4(instr, op),
Code::LDM_T1 => LdmT1::check_op4(instr, op),
Code::LDM_T2 => LdmT2::check_op4(instr, op),
Code::LDRBT_T1 => LdrbtT1::check_op4(instr, op),
Code::LDRB_i_T1 => LdrbIT1::check_op4(instr, op),
Code::LDRB_i_T2 => LdrbIT2::check_op4(instr, op),
Code::LDRB_i_T3_off => LdrbIT3Off::check_op4(instr, op),
Code::LDRB_i_T3_post => LdrbIT3Post::check_op4(instr, op),
Code::LDRB_i_T3_pre => LdrbIT3Pre::check_op4(instr, op),
Code::LDRB_l_T1 => LdrbLT1::check_op4(instr, op),
Code::LDRB_r_T1 => LdrbRT1::check_op4(instr, op),
Code::LDRB_r_T2 => LdrbRT2::check_op4(instr, op),
Code::LDRD_i_T1_off => LdrdIT1Off::check_op4(instr, op),
Code::LDRD_i_T1_post => LdrdIT1Post::check_op4(instr, op),
Code::LDRD_i_T1_pre => LdrdIT1Pre::check_op4(instr, op),
Code::LDRD_l_T1_off => LdrdLT1Off::check_op4(instr, op),
Code::LDRD_l_T1_post => LdrdLT1Post::check_op4(instr, op),
Code::LDRD_l_T1_pre => LdrdLT1Pre::check_op4(instr, op),
Code::LDREXB_T1 => LdrexbT1::check_op4(instr, op),
Code::LDREXD_T1 => LdrexdT1::check_op4(instr, op),
Code::LDREXH_T1 => LdrexhT1::check_op4(instr, op),
Code::LDREX_T1 => LdrexT1::check_op4(instr, op),
Code::LDRHT_T1 => LdrhtT1::check_op4(instr, op),
Code::LDRH_i_T1 => LdrhIT1::check_op4(instr, op),
Code::LDRH_i_T2 => LdrhIT2::check_op4(instr, op),
Code::LDRH_i_T3_off => LdrhIT3Off::check_op4(instr, op),
Code::LDRH_i_T3_post => LdrhIT3Post::check_op4(instr, op),
Code::LDRH_i_T3_pre => LdrhIT3Pre::check_op4(instr, op),
Code::LDRH_l_T1 => LdrhLT1::check_op4(instr, op),
Code::LDRH_r_T1 => LdrhRT1::check_op4(instr, op),
Code::LDRH_r_T2 => LdrhRT2::check_op4(instr, op),
Code::LDRSBT_T1 => LdrsbtT1::check_op4(instr, op),
Code::LDRSB_i_T1 => LdrsbIT1::check_op4(instr, op),
Code::LDRSB_i_T2_off => LdrsbIT2Off::check_op4(instr, op),
Code::LDRSB_i_T2_post => LdrsbIT2Post::check_op4(instr, op),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::check_op4(instr, op),
Code::LDRSB_l_T1 => LdrsbLT1::check_op4(instr, op),
Code::LDRSB_r_T1 => LdrsbRT1::check_op4(instr, op),
Code::LDRSB_r_T2 => LdrsbRT2::check_op4(instr, op),
Code::LDRSHT_T1 => LdrshtT1::check_op4(instr, op),
Code::LDRSH_i_T1 => LdrshIT1::check_op4(instr, op),
Code::LDRSH_i_T2_off => LdrshIT2Off::check_op4(instr, op),
Code::LDRSH_i_T2_post => LdrshIT2Post::check_op4(instr, op),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::check_op4(instr, op),
Code::LDRSH_l_T1 => LdrshLT1::check_op4(instr, op),
Code::LDRSH_r_T1 => LdrshRT1::check_op4(instr, op),
Code::LDRSH_r_T2 => LdrshRT2::check_op4(instr, op),
Code::LDRT_T1 => LdrtT1::check_op4(instr, op),
Code::LDR_i_T1 => LdrIT1::check_op4(instr, op),
Code::LDR_i_T2 => LdrIT2::check_op4(instr, op),
Code::LDR_i_T3 => LdrIT3::check_op4(instr, op),
Code::LDR_i_T4_off => LdrIT4Off::check_op4(instr, op),
Code::LDR_i_T4_post => LdrIT4Post::check_op4(instr, op),
Code::LDR_i_T4_pre => LdrIT4Pre::check_op4(instr, op),
Code::LDR_l_T2 => LdrLT2::check_op4(instr, op),
Code::LDR_r_T1 => LdrRT1::check_op4(instr, op),
Code::LDR_r_T2 => LdrRT2::check_op4(instr, op),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::check_op4(instr, op),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::check_op4(instr, op),
Code::LSLS_MOV_r_T2 => LslsMovRT2::check_op4(instr, op),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::check_op4(instr, op),
Code::LSL_MOV_r_T2 => LslMovRT2::check_op4(instr, op),
Code::LSL_MOV_r_T3 => LslMovRT3::check_op4(instr, op),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::check_op4(instr, op),
Code::LSL_MOV_rr_T2 => LslMovRrT2::check_op4(instr, op),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::check_op4(instr, op),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::check_op4(instr, op),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::check_op4(instr, op),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::check_op4(instr, op),
Code::LSR_MOV_r_T2 => LsrMovRT2::check_op4(instr, op),
Code::LSR_MOV_r_T3 => LsrMovRT3::check_op4(instr, op),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::check_op4(instr, op),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::check_op4(instr, op),
Code::MCRR_T1 => McrrT1::check_op4(instr, op),
Code::MCR_T1 => McrT1::check_op4(instr, op),
Code::MLA_T1 => MlaT1::check_op4(instr, op),
Code::MLS_T1 => MlsT1::check_op4(instr, op),
Code::MOVS_i_T2 => MovsIT2::check_op4(instr, op),
Code::MOVS_r_T3 => MovsRT3::check_op4(instr, op),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::check_op4(instr, op),
Code::MOVS_rr_T2 => MovsRrT2::check_op4(instr, op),
Code::MOVT_T1 => MovtT1::check_op4(instr, op),
Code::MOV_i_T1 => MovIT1::check_op4(instr, op),
Code::MOV_i_T2 => MovIT2::check_op4(instr, op),
Code::MOV_i_T3 => MovIT3::check_op4(instr, op),
Code::MOV_r_T1 => MovRT1::check_op4(instr, op),
Code::MOV_r_T2 => MovRT2::check_op4(instr, op),
Code::MOV_r_T3 => MovRT3::check_op4(instr, op),
Code::MOV_r_T3_RRX => MovRT3Rrx::check_op4(instr, op),
Code::MOV_rr_T1_ASR => MovRrT1Asr::check_op4(instr, op),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::check_op4(instr, op),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::check_op4(instr, op),
Code::MOV_rr_T1_ROR => MovRrT1Ror::check_op4(instr, op),
Code::MOV_rr_T2 => MovRrT2::check_op4(instr, op),
Code::MRC_T1 => MrcT1::check_op4(instr, op),
Code::MRRC_T1 => MrrcT1::check_op4(instr, op),
Code::MRS_T1_AS => MrsT1As::check_op4(instr, op),
Code::MRS_br_T1_AS => MrsBrT1As::check_op4(instr, op),
Code::MSR_br_T1_AS => MsrBrT1As::check_op4(instr, op),
Code::MSR_r_T1_AS => MsrRT1As::check_op4(instr, op),
Code::MUL_T1 => MulT1::check_op4(instr, op),
Code::MUL_T2 => MulT2::check_op4(instr, op),
Code::MVNS_i_T1 => MvnsIT1::check_op4(instr, op),
Code::MVNS_r_T2 => MvnsRT2::check_op4(instr, op),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::check_op4(instr, op),
Code::MVN_i_T1 => MvnIT1::check_op4(instr, op),
Code::MVN_r_T1 => MvnRT1::check_op4(instr, op),
Code::MVN_r_T2 => MvnRT2::check_op4(instr, op),
Code::MVN_r_T2_RRX => MvnRT2Rrx::check_op4(instr, op),
Code::NOP_T1 => NopT1::check_op4(instr, op),
Code::NOP_T2 => NopT2::check_op4(instr, op),
Code::ORNS_i_T1 => OrnsIT1::check_op4(instr, op),
Code::ORNS_r_T1 => OrnsRT1::check_op4(instr, op),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::check_op4(instr, op),
Code::ORN_i_T1 => OrnIT1::check_op4(instr, op),
Code::ORN_r_T1 => OrnRT1::check_op4(instr, op),
Code::ORN_r_T1_RRX => OrnRT1Rrx::check_op4(instr, op),
Code::ORRS_i_T1 => OrrsIT1::check_op4(instr, op),
Code::ORRS_r_T2 => OrrsRT2::check_op4(instr, op),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::check_op4(instr, op),
Code::ORR_i_T1 => OrrIT1::check_op4(instr, op),
Code::ORR_r_T1 => OrrRT1::check_op4(instr, op),
Code::ORR_r_T2 => OrrRT2::check_op4(instr, op),
Code::ORR_r_T2_RRX => OrrRT2Rrx::check_op4(instr, op),
Code::PKHBT_T1 => PkhbtT1::check_op4(instr, op),
Code::PKHTB_T1 => PkhtbT1::check_op4(instr, op),
Code::PLDW_i_T1 => PldwIT1::check_op4(instr, op),
Code::PLDW_i_T2 => PldwIT2::check_op4(instr, op),
Code::PLDW_r_T1 => PldwRT1::check_op4(instr, op),
Code::PLD_i_T1 => PldIT1::check_op4(instr, op),
Code::PLD_i_T2 => PldIT2::check_op4(instr, op),
Code::PLD_l_T1 => PldLT1::check_op4(instr, op),
Code::PLD_r_T1 => PldRT1::check_op4(instr, op),
Code::PLI_i_T1 => PliIT1::check_op4(instr, op),
Code::PLI_i_T2 => PliIT2::check_op4(instr, op),
Code::PLI_i_T3 => PliIT3::check_op4(instr, op),
Code::PLI_r_T1 => PliRT1::check_op4(instr, op),
Code::POP_LDM_T2 => PopLdmT2::check_op4(instr, op),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::check_op4(instr, op),
Code::POP_T1 => PopT1::check_op4(instr, op),
Code::PSSBB_T1 => PssbbT1::check_op4(instr, op),
Code::PUSH_STMDB_T1 => PushStmdbT1::check_op4(instr, op),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::check_op4(instr, op),
Code::PUSH_T1 => PushT1::check_op4(instr, op),
Code::QADD16_T1 => Qadd16T1::check_op4(instr, op),
Code::QADD8_T1 => Qadd8T1::check_op4(instr, op),
Code::QADD_T1 => QaddT1::check_op4(instr, op),
Code::QASX_T1 => QasxT1::check_op4(instr, op),
Code::QDADD_T1 => QdaddT1::check_op4(instr, op),
Code::QDSUB_T1 => QdsubT1::check_op4(instr, op),
Code::QSAX_T1 => QsaxT1::check_op4(instr, op),
Code::QSUB16_T1 => Qsub16T1::check_op4(instr, op),
Code::QSUB8_T1 => Qsub8T1::check_op4(instr, op),
Code::QSUB_T1 => QsubT1::check_op4(instr, op),
Code::RBIT_T1 => RbitT1::check_op4(instr, op),
Code::REV16_T1 => Rev16T1::check_op4(instr, op),
Code::REV16_T2 => Rev16T2::check_op4(instr, op),
Code::REVSH_T1 => RevshT1::check_op4(instr, op),
Code::REVSH_T2 => RevshT2::check_op4(instr, op),
Code::REV_T1 => RevT1::check_op4(instr, op),
Code::REV_T2 => RevT2::check_op4(instr, op),
Code::RFE_T1_AS => RfeT1As::check_op4(instr, op),
Code::RFE_T2_AS => RfeT2As::check_op4(instr, op),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::check_op4(instr, op),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::check_op4(instr, op),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::check_op4(instr, op),
Code::ROR_MOV_r_T3 => RorMovRT3::check_op4(instr, op),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::check_op4(instr, op),
Code::ROR_MOV_rr_T2 => RorMovRrT2::check_op4(instr, op),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::check_op4(instr, op),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::check_op4(instr, op),
Code::RSBS_i_T2 => RsbsIT2::check_op4(instr, op),
Code::RSBS_r_T1 => RsbsRT1::check_op4(instr, op),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::check_op4(instr, op),
Code::RSB_i_T1 => RsbIT1::check_op4(instr, op),
Code::RSB_i_T2 => RsbIT2::check_op4(instr, op),
Code::RSB_r_T1 => RsbRT1::check_op4(instr, op),
Code::RSB_r_T1_RRX => RsbRT1Rrx::check_op4(instr, op),
Code::SADD16_T1 => Sadd16T1::check_op4(instr, op),
Code::SADD8_T1 => Sadd8T1::check_op4(instr, op),
Code::SASX_T1 => SasxT1::check_op4(instr, op),
Code::SBCS_i_T1 => SbcsIT1::check_op4(instr, op),
Code::SBCS_r_T2 => SbcsRT2::check_op4(instr, op),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::check_op4(instr, op),
Code::SBC_i_T1 => SbcIT1::check_op4(instr, op),
Code::SBC_r_T1 => SbcRT1::check_op4(instr, op),
Code::SBC_r_T2 => SbcRT2::check_op4(instr, op),
Code::SBC_r_T2_RRX => SbcRT2Rrx::check_op4(instr, op),
Code::SBFX_T1 => SbfxT1::check_op4(instr, op),
Code::SB_T1 => SbT1::check_op4(instr, op),
Code::SDIV_T1 => SdivT1::check_op4(instr, op),
Code::SEL_T1 => SelT1::check_op4(instr, op),
Code::SETEND_T1 => SetendT1::check_op4(instr, op),
Code::SETPAN_T1 => SetpanT1::check_op4(instr, op),
Code::SEVL_T1 => SevlT1::check_op4(instr, op),
Code::SEVL_T2 => SevlT2::check_op4(instr, op),
Code::SEV_T1 => SevT1::check_op4(instr, op),
Code::SEV_T2 => SevT2::check_op4(instr, op),
Code::SHADD16_T1 => Shadd16T1::check_op4(instr, op),
Code::SHADD8_T1 => Shadd8T1::check_op4(instr, op),
Code::SHASX_T1 => ShasxT1::check_op4(instr, op),
Code::SHSAX_T1 => ShsaxT1::check_op4(instr, op),
Code::SHSUB16_T1 => Shsub16T1::check_op4(instr, op),
Code::SHSUB8_T1 => Shsub8T1::check_op4(instr, op),
Code::SMC_T1_AS => SmcT1As::check_op4(instr, op),
Code::SMLABB_T1 => SmlabbT1::check_op4(instr, op),
Code::SMLABT_T1 => SmlabtT1::check_op4(instr, op),
Code::SMLADX_T1 => SmladxT1::check_op4(instr, op),
Code::SMLAD_T1 => SmladT1::check_op4(instr, op),
Code::SMLALBB_T1 => SmlalbbT1::check_op4(instr, op),
Code::SMLALBT_T1 => SmlalbtT1::check_op4(instr, op),
Code::SMLALDX_T1 => SmlaldxT1::check_op4(instr, op),
Code::SMLALD_T1 => SmlaldT1::check_op4(instr, op),
Code::SMLALTB_T1 => SmlaltbT1::check_op4(instr, op),
Code::SMLALTT_T1 => SmlalttT1::check_op4(instr, op),
Code::SMLAL_T1 => SmlalT1::check_op4(instr, op),
Code::SMLATB_T1 => SmlatbT1::check_op4(instr, op),
Code::SMLATT_T1 => SmlattT1::check_op4(instr, op),
Code::SMLAWB_T1 => SmlawbT1::check_op4(instr, op),
Code::SMLAWT_T1 => SmlawtT1::check_op4(instr, op),
Code::SMLSDX_T1 => SmlsdxT1::check_op4(instr, op),
Code::SMLSD_T1 => SmlsdT1::check_op4(instr, op),
Code::SMLSLDX_T1 => SmlsldxT1::check_op4(instr, op),
Code::SMLSLD_T1 => SmlsldT1::check_op4(instr, op),
Code::SMMLAR_T1 => SmmlarT1::check_op4(instr, op),
Code::SMMLA_T1 => SmmlaT1::check_op4(instr, op),
Code::SMMLSR_T1 => SmmlsrT1::check_op4(instr, op),
Code::SMMLS_T1 => SmmlsT1::check_op4(instr, op),
Code::SMMULR_T1 => SmmulrT1::check_op4(instr, op),
Code::SMMUL_T1 => SmmulT1::check_op4(instr, op),
Code::SMUADX_T1 => SmuadxT1::check_op4(instr, op),
Code::SMUAD_T1 => SmuadT1::check_op4(instr, op),
Code::SMULBB_T1 => SmulbbT1::check_op4(instr, op),
Code::SMULBT_T1 => SmulbtT1::check_op4(instr, op),
Code::SMULL_T1 => SmullT1::check_op4(instr, op),
Code::SMULTB_T1 => SmultbT1::check_op4(instr, op),
Code::SMULTT_T1 => SmulttT1::check_op4(instr, op),
Code::SMULWB_T1 => SmulwbT1::check_op4(instr, op),
Code::SMULWT_T1 => SmulwtT1::check_op4(instr, op),
Code::SMUSDX_T1 => SmusdxT1::check_op4(instr, op),
Code::SMUSD_T1 => SmusdT1::check_op4(instr, op),
Code::SRS_T1_AS => SrsT1As::check_op4(instr, op),
Code::SRS_T2_AS => SrsT2As::check_op4(instr, op),
Code::SSAT16_T1 => Ssat16T1::check_op4(instr, op),
Code::SSAT_T1_ASR => SsatT1Asr::check_op4(instr, op),
Code::SSAT_T1_LSL => SsatT1Lsl::check_op4(instr, op),
Code::SSAX_T1 => SsaxT1::check_op4(instr, op),
Code::SSBB_T1 => SsbbT1::check_op4(instr, op),
Code::SSUB16_T1 => Ssub16T1::check_op4(instr, op),
Code::SSUB8_T1 => Ssub8T1::check_op4(instr, op),
Code::STC_T1_off => StcT1Off::check_op4(instr, op),
Code::STC_T1_post => StcT1Post::check_op4(instr, op),
Code::STC_T1_pre => StcT1Pre::check_op4(instr, op),
Code::STC_T1_unind => StcT1Unind::check_op4(instr, op),
Code::STLB_T1 => StlbT1::check_op4(instr, op),
Code::STLEXB_T1 => StlexbT1::check_op4(instr, op),
Code::STLEXD_T1 => StlexdT1::check_op4(instr, op),
Code::STLEXH_T1 => StlexhT1::check_op4(instr, op),
Code::STLEX_T1 => StlexT1::check_op4(instr, op),
Code::STLH_T1 => StlhT1::check_op4(instr, op),
Code::STL_T1 => StlT1::check_op4(instr, op),
Code::STMDB_T1 => StmdbT1::check_op4(instr, op),
Code::STM_T1 => StmT1::check_op4(instr, op),
Code::STM_T2 => StmT2::check_op4(instr, op),
Code::STRBT_T1 => StrbtT1::check_op4(instr, op),
Code::STRB_i_T1 => StrbIT1::check_op4(instr, op),
Code::STRB_i_T2 => StrbIT2::check_op4(instr, op),
Code::STRB_i_T3_offn => StrbIT3Offn::check_op4(instr, op),
Code::STRB_i_T3_post => StrbIT3Post::check_op4(instr, op),
Code::STRB_i_T3_pre => StrbIT3Pre::check_op4(instr, op),
Code::STRB_r_T1 => StrbRT1::check_op4(instr, op),
Code::STRB_r_T2 => StrbRT2::check_op4(instr, op),
Code::STRD_i_T1_off => StrdIT1Off::check_op4(instr, op),
Code::STRD_i_T1_post => StrdIT1Post::check_op4(instr, op),
Code::STRD_i_T1_pre => StrdIT1Pre::check_op4(instr, op),
Code::STREXB_T1 => StrexbT1::check_op4(instr, op),
Code::STREXD_T1 => StrexdT1::check_op4(instr, op),
Code::STREXH_T1 => StrexhT1::check_op4(instr, op),
Code::STREX_T1 => StrexT1::check_op4(instr, op),
Code::STRHT_T1 => StrhtT1::check_op4(instr, op),
Code::STRH_i_T1 => StrhIT1::check_op4(instr, op),
Code::STRH_i_T2 => StrhIT2::check_op4(instr, op),
Code::STRH_i_T3_offn => StrhIT3Offn::check_op4(instr, op),
Code::STRH_i_T3_post => StrhIT3Post::check_op4(instr, op),
Code::STRH_i_T3_pre => StrhIT3Pre::check_op4(instr, op),
Code::STRH_r_T1 => StrhRT1::check_op4(instr, op),
Code::STRH_r_T2 => StrhRT2::check_op4(instr, op),
Code::STRT_T1 => StrtT1::check_op4(instr, op),
Code::STR_i_T1 => StrIT1::check_op4(instr, op),
Code::STR_i_T2 => StrIT2::check_op4(instr, op),
Code::STR_i_T3 => StrIT3::check_op4(instr, op),
Code::STR_i_T4_off => StrIT4Off::check_op4(instr, op),
Code::STR_i_T4_post => StrIT4Post::check_op4(instr, op),
Code::STR_i_T4_pre => StrIT4Pre::check_op4(instr, op),
Code::STR_r_T1 => StrRT1::check_op4(instr, op),
Code::STR_r_T2 => StrRT2::check_op4(instr, op),
Code::SUBS_PC_T5_AS => SubsPcT5As::check_op4(instr, op),
Code::SUBS_SP_i_T2 => SubsSpIT2::check_op4(instr, op),
Code::SUBS_SP_r_T1 => SubsSpRT1::check_op4(instr, op),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::check_op4(instr, op),
Code::SUBS_i_T3 => SubsIT3::check_op4(instr, op),
Code::SUBS_r_T2 => SubsRT2::check_op4(instr, op),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::check_op4(instr, op),
Code::SUB_ADR_T2 => SubAdrT2::check_op4(instr, op),
Code::SUB_SP_i_T1 => SubSpIT1::check_op4(instr, op),
Code::SUB_SP_i_T2 => SubSpIT2::check_op4(instr, op),
Code::SUB_SP_i_T3 => SubSpIT3::check_op4(instr, op),
Code::SUB_SP_r_T1 => SubSpRT1::check_op4(instr, op),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::check_op4(instr, op),
Code::SUB_i_T1 => SubIT1::check_op4(instr, op),
Code::SUB_i_T2 => SubIT2::check_op4(instr, op),
Code::SUB_i_T3 => SubIT3::check_op4(instr, op),
Code::SUB_i_T4 => SubIT4::check_op4(instr, op),
Code::SUB_r_T1 => SubRT1::check_op4(instr, op),
Code::SUB_r_T2 => SubRT2::check_op4(instr, op),
Code::SUB_r_T2_RRX => SubRT2Rrx::check_op4(instr, op),
Code::SVC_T1 => SvcT1::check_op4(instr, op),
Code::SXTAB16_T1 => Sxtab16T1::check_op4(instr, op),
Code::SXTAB_T1 => SxtabT1::check_op4(instr, op),
Code::SXTAH_T1 => SxtahT1::check_op4(instr, op),
Code::SXTB16_T1 => Sxtb16T1::check_op4(instr, op),
Code::SXTB_T1 => SxtbT1::check_op4(instr, op),
Code::SXTB_T2 => SxtbT2::check_op4(instr, op),
Code::SXTH_T1 => SxthT1::check_op4(instr, op),
Code::SXTH_T2 => SxthT2::check_op4(instr, op),
Code::TBB_T1 => TbbT1::check_op4(instr, op),
Code::TBH_T1 => TbhT1::check_op4(instr, op),
Code::TEQ_i_T1 => TeqIT1::check_op4(instr, op),
Code::TEQ_r_T1 => TeqRT1::check_op4(instr, op),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::check_op4(instr, op),
Code::TSB_T1 => TsbT1::check_op4(instr, op),
Code::TST_i_T1 => TstIT1::check_op4(instr, op),
Code::TST_r_T1 => TstRT1::check_op4(instr, op),
Code::TST_r_T2 => TstRT2::check_op4(instr, op),
Code::TST_r_T2_RRX => TstRT2Rrx::check_op4(instr, op),
Code::UADD16_T1 => Uadd16T1::check_op4(instr, op),
Code::UADD8_T1 => Uadd8T1::check_op4(instr, op),
Code::UASX_T1 => UasxT1::check_op4(instr, op),
Code::UBFX_T1 => UbfxT1::check_op4(instr, op),
Code::UDF_T1 => UdfT1::check_op4(instr, op),
Code::UDF_T2 => UdfT2::check_op4(instr, op),
Code::UDIV_T1 => UdivT1::check_op4(instr, op),
Code::UHADD16_T1 => Uhadd16T1::check_op4(instr, op),
Code::UHADD8_T1 => Uhadd8T1::check_op4(instr, op),
Code::UHASX_T1 => UhasxT1::check_op4(instr, op),
Code::UHSAX_T1 => UhsaxT1::check_op4(instr, op),
Code::UHSUB16_T1 => Uhsub16T1::check_op4(instr, op),
Code::UHSUB8_T1 => Uhsub8T1::check_op4(instr, op),
Code::UMAAL_T1 => UmaalT1::check_op4(instr, op),
Code::UMLAL_T1 => UmlalT1::check_op4(instr, op),
Code::UMULL_T1 => UmullT1::check_op4(instr, op),
Code::UQADD16_T1 => Uqadd16T1::check_op4(instr, op),
Code::UQADD8_T1 => Uqadd8T1::check_op4(instr, op),
Code::UQASX_T1 => UqasxT1::check_op4(instr, op),
Code::UQSAX_T1 => UqsaxT1::check_op4(instr, op),
Code::UQSUB16_T1 => Uqsub16T1::check_op4(instr, op),
Code::UQSUB8_T1 => Uqsub8T1::check_op4(instr, op),
Code::USAD8_T1 => Usad8T1::check_op4(instr, op),
Code::USADA8_T1 => Usada8T1::check_op4(instr, op),
Code::USAT16_T1 => Usat16T1::check_op4(instr, op),
Code::USAT_T1_ASR => UsatT1Asr::check_op4(instr, op),
Code::USAT_T1_LSL => UsatT1Lsl::check_op4(instr, op),
Code::USAX_T1 => UsaxT1::check_op4(instr, op),
Code::USUB16_T1 => Usub16T1::check_op4(instr, op),
Code::USUB8_T1 => Usub8T1::check_op4(instr, op),
Code::UXTAB16_T1 => Uxtab16T1::check_op4(instr, op),
Code::UXTAB_T1 => UxtabT1::check_op4(instr, op),
Code::UXTAH_T1 => UxtahT1::check_op4(instr, op),
Code::UXTB16_T1 => Uxtb16T1::check_op4(instr, op),
Code::UXTB_T1 => UxtbT1::check_op4(instr, op),
Code::UXTB_T2 => UxtbT2::check_op4(instr, op),
Code::UXTH_T1 => UxthT1::check_op4(instr, op),
Code::UXTH_T2 => UxthT2::check_op4(instr, op),
Code::WFE_T1 => WfeT1::check_op4(instr, op),
Code::WFE_T2 => WfeT2::check_op4(instr, op),
Code::WFI_T1 => WfiT1::check_op4(instr, op),
Code::WFI_T2 => WfiT2::check_op4(instr, op),
Code::YIELD_T1 => YieldT1::check_op4(instr, op),
Code::YIELD_T2 => YieldT2::check_op4(instr, op),
}
}
pub fn check_op5(&self, instr: &Instruction, op: &Operand) -> Result<()> {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::check_op5(instr, op),
Code::ADCS_r_T2 => AdcsRT2::check_op5(instr, op),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::check_op5(instr, op),
Code::ADC_i_T1 => AdcIT1::check_op5(instr, op),
Code::ADC_r_T1 => AdcRT1::check_op5(instr, op),
Code::ADC_r_T2 => AdcRT2::check_op5(instr, op),
Code::ADC_r_T2_RRX => AdcRT2Rrx::check_op5(instr, op),
Code::ADDS_SP_i_T3 => AddsSpIT3::check_op5(instr, op),
Code::ADDS_SP_r_T3 => AddsSpRT3::check_op5(instr, op),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::check_op5(instr, op),
Code::ADDS_i_T3 => AddsIT3::check_op5(instr, op),
Code::ADDS_r_T3 => AddsRT3::check_op5(instr, op),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::check_op5(instr, op),
Code::ADD_ADR_T1 => AddAdrT1::check_op5(instr, op),
Code::ADD_ADR_T3 => AddAdrT3::check_op5(instr, op),
Code::ADD_SP_i_T1 => AddSpIT1::check_op5(instr, op),
Code::ADD_SP_i_T2 => AddSpIT2::check_op5(instr, op),
Code::ADD_SP_i_T3 => AddSpIT3::check_op5(instr, op),
Code::ADD_SP_i_T4 => AddSpIT4::check_op5(instr, op),
Code::ADD_SP_r_T1 => AddSpRT1::check_op5(instr, op),
Code::ADD_SP_r_T2 => AddSpRT2::check_op5(instr, op),
Code::ADD_SP_r_T3 => AddSpRT3::check_op5(instr, op),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::check_op5(instr, op),
Code::ADD_i_T1 => AddIT1::check_op5(instr, op),
Code::ADD_i_T2 => AddIT2::check_op5(instr, op),
Code::ADD_i_T3 => AddIT3::check_op5(instr, op),
Code::ADD_i_T4 => AddIT4::check_op5(instr, op),
Code::ADD_r_T1 => AddRT1::check_op5(instr, op),
Code::ADD_r_T2 => AddRT2::check_op5(instr, op),
Code::ADD_r_T3 => AddRT3::check_op5(instr, op),
Code::ADD_r_T3_RRX => AddRT3Rrx::check_op5(instr, op),
Code::ADR_T1 => AdrT1::check_op5(instr, op),
Code::ADR_T2 => AdrT2::check_op5(instr, op),
Code::ADR_T3 => AdrT3::check_op5(instr, op),
Code::ANDS_i_T1 => AndsIT1::check_op5(instr, op),
Code::ANDS_r_T2 => AndsRT2::check_op5(instr, op),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::check_op5(instr, op),
Code::AND_i_T1 => AndIT1::check_op5(instr, op),
Code::AND_r_T1 => AndRT1::check_op5(instr, op),
Code::AND_r_T2 => AndRT2::check_op5(instr, op),
Code::AND_r_T2_RRX => AndRT2Rrx::check_op5(instr, op),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::check_op5(instr, op),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::check_op5(instr, op),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::check_op5(instr, op),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::check_op5(instr, op),
Code::ASR_MOV_r_T2 => AsrMovRT2::check_op5(instr, op),
Code::ASR_MOV_r_T3 => AsrMovRT3::check_op5(instr, op),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::check_op5(instr, op),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::check_op5(instr, op),
Code::BFC_T1 => BfcT1::check_op5(instr, op),
Code::BFI_T1 => BfiT1::check_op5(instr, op),
Code::BICS_i_T1 => BicsIT1::check_op5(instr, op),
Code::BICS_r_T2 => BicsRT2::check_op5(instr, op),
Code::BICS_r_T2_RRX => BicsRT2Rrx::check_op5(instr, op),
Code::BIC_i_T1 => BicIT1::check_op5(instr, op),
Code::BIC_r_T1 => BicRT1::check_op5(instr, op),
Code::BIC_r_T2 => BicRT2::check_op5(instr, op),
Code::BIC_r_T2_RRX => BicRT2Rrx::check_op5(instr, op),
Code::BKPT_T1 => BkptT1::check_op5(instr, op),
Code::BLX_r_T1 => BlxRT1::check_op5(instr, op),
Code::BL_i_T1 => BlIT1::check_op5(instr, op),
Code::BL_i_T2 => BlIT2::check_op5(instr, op),
Code::BXJ_T1 => BxjT1::check_op5(instr, op),
Code::BX_T1 => BxT1::check_op5(instr, op),
Code::B_T1 => BT1::check_op5(instr, op),
Code::B_T2 => BT2::check_op5(instr, op),
Code::B_T3 => BT3::check_op5(instr, op),
Code::B_T4 => BT4::check_op5(instr, op),
Code::CBNZ_T1 => CbnzT1::check_op5(instr, op),
Code::CBZ_T1 => CbzT1::check_op5(instr, op),
Code::CLRBHB_T1 => ClrbhbT1::check_op5(instr, op),
Code::CLREX_T1 => ClrexT1::check_op5(instr, op),
Code::CLZ_T1 => ClzT1::check_op5(instr, op),
Code::CMN_i_T1 => CmnIT1::check_op5(instr, op),
Code::CMN_r_T1 => CmnRT1::check_op5(instr, op),
Code::CMN_r_T2 => CmnRT2::check_op5(instr, op),
Code::CMN_r_T2_RRX => CmnRT2Rrx::check_op5(instr, op),
Code::CMP_i_T1 => CmpIT1::check_op5(instr, op),
Code::CMP_i_T2 => CmpIT2::check_op5(instr, op),
Code::CMP_r_T1 => CmpRT1::check_op5(instr, op),
Code::CMP_r_T2 => CmpRT2::check_op5(instr, op),
Code::CMP_r_T3 => CmpRT3::check_op5(instr, op),
Code::CMP_r_T3_RRX => CmpRT3Rrx::check_op5(instr, op),
Code::CPSID_T1_AS => CpsidT1As::check_op5(instr, op),
Code::CPSID_T2_AS => CpsidT2As::check_op5(instr, op),
Code::CPSID_T2_ASM => CpsidT2Asm::check_op5(instr, op),
Code::CPSIE_T1_AS => CpsieT1As::check_op5(instr, op),
Code::CPSIE_T2_AS => CpsieT2As::check_op5(instr, op),
Code::CPSIE_T2_ASM => CpsieT2Asm::check_op5(instr, op),
Code::CPS_T2_AS => CpsT2As::check_op5(instr, op),
Code::CRC32B_T1 => Crc32bT1::check_op5(instr, op),
Code::CRC32CB_T1 => Crc32cbT1::check_op5(instr, op),
Code::CRC32CH_T1 => Crc32chT1::check_op5(instr, op),
Code::CRC32CW_T1 => Crc32cwT1::check_op5(instr, op),
Code::CRC32H_T1 => Crc32hT1::check_op5(instr, op),
Code::CRC32W_T1 => Crc32wT1::check_op5(instr, op),
Code::CSDB_T1 => CsdbT1::check_op5(instr, op),
Code::DBG_T1 => DbgT1::check_op5(instr, op),
Code::DCPS1_T1 => Dcps1T1::check_op5(instr, op),
Code::DCPS2_T1 => Dcps2T1::check_op5(instr, op),
Code::DCPS3_T1 => Dcps3T1::check_op5(instr, op),
Code::DMB_T1 => DmbT1::check_op5(instr, op),
Code::DSB_T1 => DsbT1::check_op5(instr, op),
Code::EORS_i_T1 => EorsIT1::check_op5(instr, op),
Code::EORS_r_T2 => EorsRT2::check_op5(instr, op),
Code::EORS_r_T2_RRX => EorsRT2Rrx::check_op5(instr, op),
Code::EOR_i_T1 => EorIT1::check_op5(instr, op),
Code::EOR_r_T1 => EorRT1::check_op5(instr, op),
Code::EOR_r_T2 => EorRT2::check_op5(instr, op),
Code::EOR_r_T2_RRX => EorRT2Rrx::check_op5(instr, op),
Code::ERET_T1 => EretT1::check_op5(instr, op),
Code::ESB_T1 => EsbT1::check_op5(instr, op),
Code::HLT_T1 => HltT1::check_op5(instr, op),
Code::HVC_T1 => HvcT1::check_op5(instr, op),
Code::ISB_T1 => IsbT1::check_op5(instr, op),
Code::IT_T1 => ItT1::check_op5(instr, op),
Code::LDAB_T1 => LdabT1::check_op5(instr, op),
Code::LDAEXB_T1 => LdaexbT1::check_op5(instr, op),
Code::LDAEXD_T1 => LdaexdT1::check_op5(instr, op),
Code::LDAEXH_T1 => LdaexhT1::check_op5(instr, op),
Code::LDAEX_T1 => LdaexT1::check_op5(instr, op),
Code::LDAH_T1 => LdahT1::check_op5(instr, op),
Code::LDA_T1 => LdaT1::check_op5(instr, op),
Code::LDC_i_T1_off => LdcIT1Off::check_op5(instr, op),
Code::LDC_i_T1_post => LdcIT1Post::check_op5(instr, op),
Code::LDC_i_T1_pre => LdcIT1Pre::check_op5(instr, op),
Code::LDC_i_T1_unind => LdcIT1Unind::check_op5(instr, op),
Code::LDC_l_T1_off => LdcLT1Off::check_op5(instr, op),
Code::LDC_l_T1_post => LdcLT1Post::check_op5(instr, op),
Code::LDC_l_T1_pre => LdcLT1Pre::check_op5(instr, op),
Code::LDC_l_T1_unind => LdcLT1Unind::check_op5(instr, op),
Code::LDMDB_T1 => LdmdbT1::check_op5(instr, op),
Code::LDM_T1 => LdmT1::check_op5(instr, op),
Code::LDM_T2 => LdmT2::check_op5(instr, op),
Code::LDRBT_T1 => LdrbtT1::check_op5(instr, op),
Code::LDRB_i_T1 => LdrbIT1::check_op5(instr, op),
Code::LDRB_i_T2 => LdrbIT2::check_op5(instr, op),
Code::LDRB_i_T3_off => LdrbIT3Off::check_op5(instr, op),
Code::LDRB_i_T3_post => LdrbIT3Post::check_op5(instr, op),
Code::LDRB_i_T3_pre => LdrbIT3Pre::check_op5(instr, op),
Code::LDRB_l_T1 => LdrbLT1::check_op5(instr, op),
Code::LDRB_r_T1 => LdrbRT1::check_op5(instr, op),
Code::LDRB_r_T2 => LdrbRT2::check_op5(instr, op),
Code::LDRD_i_T1_off => LdrdIT1Off::check_op5(instr, op),
Code::LDRD_i_T1_post => LdrdIT1Post::check_op5(instr, op),
Code::LDRD_i_T1_pre => LdrdIT1Pre::check_op5(instr, op),
Code::LDRD_l_T1_off => LdrdLT1Off::check_op5(instr, op),
Code::LDRD_l_T1_post => LdrdLT1Post::check_op5(instr, op),
Code::LDRD_l_T1_pre => LdrdLT1Pre::check_op5(instr, op),
Code::LDREXB_T1 => LdrexbT1::check_op5(instr, op),
Code::LDREXD_T1 => LdrexdT1::check_op5(instr, op),
Code::LDREXH_T1 => LdrexhT1::check_op5(instr, op),
Code::LDREX_T1 => LdrexT1::check_op5(instr, op),
Code::LDRHT_T1 => LdrhtT1::check_op5(instr, op),
Code::LDRH_i_T1 => LdrhIT1::check_op5(instr, op),
Code::LDRH_i_T2 => LdrhIT2::check_op5(instr, op),
Code::LDRH_i_T3_off => LdrhIT3Off::check_op5(instr, op),
Code::LDRH_i_T3_post => LdrhIT3Post::check_op5(instr, op),
Code::LDRH_i_T3_pre => LdrhIT3Pre::check_op5(instr, op),
Code::LDRH_l_T1 => LdrhLT1::check_op5(instr, op),
Code::LDRH_r_T1 => LdrhRT1::check_op5(instr, op),
Code::LDRH_r_T2 => LdrhRT2::check_op5(instr, op),
Code::LDRSBT_T1 => LdrsbtT1::check_op5(instr, op),
Code::LDRSB_i_T1 => LdrsbIT1::check_op5(instr, op),
Code::LDRSB_i_T2_off => LdrsbIT2Off::check_op5(instr, op),
Code::LDRSB_i_T2_post => LdrsbIT2Post::check_op5(instr, op),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::check_op5(instr, op),
Code::LDRSB_l_T1 => LdrsbLT1::check_op5(instr, op),
Code::LDRSB_r_T1 => LdrsbRT1::check_op5(instr, op),
Code::LDRSB_r_T2 => LdrsbRT2::check_op5(instr, op),
Code::LDRSHT_T1 => LdrshtT1::check_op5(instr, op),
Code::LDRSH_i_T1 => LdrshIT1::check_op5(instr, op),
Code::LDRSH_i_T2_off => LdrshIT2Off::check_op5(instr, op),
Code::LDRSH_i_T2_post => LdrshIT2Post::check_op5(instr, op),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::check_op5(instr, op),
Code::LDRSH_l_T1 => LdrshLT1::check_op5(instr, op),
Code::LDRSH_r_T1 => LdrshRT1::check_op5(instr, op),
Code::LDRSH_r_T2 => LdrshRT2::check_op5(instr, op),
Code::LDRT_T1 => LdrtT1::check_op5(instr, op),
Code::LDR_i_T1 => LdrIT1::check_op5(instr, op),
Code::LDR_i_T2 => LdrIT2::check_op5(instr, op),
Code::LDR_i_T3 => LdrIT3::check_op5(instr, op),
Code::LDR_i_T4_off => LdrIT4Off::check_op5(instr, op),
Code::LDR_i_T4_post => LdrIT4Post::check_op5(instr, op),
Code::LDR_i_T4_pre => LdrIT4Pre::check_op5(instr, op),
Code::LDR_l_T2 => LdrLT2::check_op5(instr, op),
Code::LDR_r_T1 => LdrRT1::check_op5(instr, op),
Code::LDR_r_T2 => LdrRT2::check_op5(instr, op),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::check_op5(instr, op),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::check_op5(instr, op),
Code::LSLS_MOV_r_T2 => LslsMovRT2::check_op5(instr, op),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::check_op5(instr, op),
Code::LSL_MOV_r_T2 => LslMovRT2::check_op5(instr, op),
Code::LSL_MOV_r_T3 => LslMovRT3::check_op5(instr, op),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::check_op5(instr, op),
Code::LSL_MOV_rr_T2 => LslMovRrT2::check_op5(instr, op),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::check_op5(instr, op),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::check_op5(instr, op),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::check_op5(instr, op),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::check_op5(instr, op),
Code::LSR_MOV_r_T2 => LsrMovRT2::check_op5(instr, op),
Code::LSR_MOV_r_T3 => LsrMovRT3::check_op5(instr, op),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::check_op5(instr, op),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::check_op5(instr, op),
Code::MCRR_T1 => McrrT1::check_op5(instr, op),
Code::MCR_T1 => McrT1::check_op5(instr, op),
Code::MLA_T1 => MlaT1::check_op5(instr, op),
Code::MLS_T1 => MlsT1::check_op5(instr, op),
Code::MOVS_i_T2 => MovsIT2::check_op5(instr, op),
Code::MOVS_r_T3 => MovsRT3::check_op5(instr, op),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::check_op5(instr, op),
Code::MOVS_rr_T2 => MovsRrT2::check_op5(instr, op),
Code::MOVT_T1 => MovtT1::check_op5(instr, op),
Code::MOV_i_T1 => MovIT1::check_op5(instr, op),
Code::MOV_i_T2 => MovIT2::check_op5(instr, op),
Code::MOV_i_T3 => MovIT3::check_op5(instr, op),
Code::MOV_r_T1 => MovRT1::check_op5(instr, op),
Code::MOV_r_T2 => MovRT2::check_op5(instr, op),
Code::MOV_r_T3 => MovRT3::check_op5(instr, op),
Code::MOV_r_T3_RRX => MovRT3Rrx::check_op5(instr, op),
Code::MOV_rr_T1_ASR => MovRrT1Asr::check_op5(instr, op),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::check_op5(instr, op),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::check_op5(instr, op),
Code::MOV_rr_T1_ROR => MovRrT1Ror::check_op5(instr, op),
Code::MOV_rr_T2 => MovRrT2::check_op5(instr, op),
Code::MRC_T1 => MrcT1::check_op5(instr, op),
Code::MRRC_T1 => MrrcT1::check_op5(instr, op),
Code::MRS_T1_AS => MrsT1As::check_op5(instr, op),
Code::MRS_br_T1_AS => MrsBrT1As::check_op5(instr, op),
Code::MSR_br_T1_AS => MsrBrT1As::check_op5(instr, op),
Code::MSR_r_T1_AS => MsrRT1As::check_op5(instr, op),
Code::MUL_T1 => MulT1::check_op5(instr, op),
Code::MUL_T2 => MulT2::check_op5(instr, op),
Code::MVNS_i_T1 => MvnsIT1::check_op5(instr, op),
Code::MVNS_r_T2 => MvnsRT2::check_op5(instr, op),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::check_op5(instr, op),
Code::MVN_i_T1 => MvnIT1::check_op5(instr, op),
Code::MVN_r_T1 => MvnRT1::check_op5(instr, op),
Code::MVN_r_T2 => MvnRT2::check_op5(instr, op),
Code::MVN_r_T2_RRX => MvnRT2Rrx::check_op5(instr, op),
Code::NOP_T1 => NopT1::check_op5(instr, op),
Code::NOP_T2 => NopT2::check_op5(instr, op),
Code::ORNS_i_T1 => OrnsIT1::check_op5(instr, op),
Code::ORNS_r_T1 => OrnsRT1::check_op5(instr, op),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::check_op5(instr, op),
Code::ORN_i_T1 => OrnIT1::check_op5(instr, op),
Code::ORN_r_T1 => OrnRT1::check_op5(instr, op),
Code::ORN_r_T1_RRX => OrnRT1Rrx::check_op5(instr, op),
Code::ORRS_i_T1 => OrrsIT1::check_op5(instr, op),
Code::ORRS_r_T2 => OrrsRT2::check_op5(instr, op),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::check_op5(instr, op),
Code::ORR_i_T1 => OrrIT1::check_op5(instr, op),
Code::ORR_r_T1 => OrrRT1::check_op5(instr, op),
Code::ORR_r_T2 => OrrRT2::check_op5(instr, op),
Code::ORR_r_T2_RRX => OrrRT2Rrx::check_op5(instr, op),
Code::PKHBT_T1 => PkhbtT1::check_op5(instr, op),
Code::PKHTB_T1 => PkhtbT1::check_op5(instr, op),
Code::PLDW_i_T1 => PldwIT1::check_op5(instr, op),
Code::PLDW_i_T2 => PldwIT2::check_op5(instr, op),
Code::PLDW_r_T1 => PldwRT1::check_op5(instr, op),
Code::PLD_i_T1 => PldIT1::check_op5(instr, op),
Code::PLD_i_T2 => PldIT2::check_op5(instr, op),
Code::PLD_l_T1 => PldLT1::check_op5(instr, op),
Code::PLD_r_T1 => PldRT1::check_op5(instr, op),
Code::PLI_i_T1 => PliIT1::check_op5(instr, op),
Code::PLI_i_T2 => PliIT2::check_op5(instr, op),
Code::PLI_i_T3 => PliIT3::check_op5(instr, op),
Code::PLI_r_T1 => PliRT1::check_op5(instr, op),
Code::POP_LDM_T2 => PopLdmT2::check_op5(instr, op),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::check_op5(instr, op),
Code::POP_T1 => PopT1::check_op5(instr, op),
Code::PSSBB_T1 => PssbbT1::check_op5(instr, op),
Code::PUSH_STMDB_T1 => PushStmdbT1::check_op5(instr, op),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::check_op5(instr, op),
Code::PUSH_T1 => PushT1::check_op5(instr, op),
Code::QADD16_T1 => Qadd16T1::check_op5(instr, op),
Code::QADD8_T1 => Qadd8T1::check_op5(instr, op),
Code::QADD_T1 => QaddT1::check_op5(instr, op),
Code::QASX_T1 => QasxT1::check_op5(instr, op),
Code::QDADD_T1 => QdaddT1::check_op5(instr, op),
Code::QDSUB_T1 => QdsubT1::check_op5(instr, op),
Code::QSAX_T1 => QsaxT1::check_op5(instr, op),
Code::QSUB16_T1 => Qsub16T1::check_op5(instr, op),
Code::QSUB8_T1 => Qsub8T1::check_op5(instr, op),
Code::QSUB_T1 => QsubT1::check_op5(instr, op),
Code::RBIT_T1 => RbitT1::check_op5(instr, op),
Code::REV16_T1 => Rev16T1::check_op5(instr, op),
Code::REV16_T2 => Rev16T2::check_op5(instr, op),
Code::REVSH_T1 => RevshT1::check_op5(instr, op),
Code::REVSH_T2 => RevshT2::check_op5(instr, op),
Code::REV_T1 => RevT1::check_op5(instr, op),
Code::REV_T2 => RevT2::check_op5(instr, op),
Code::RFE_T1_AS => RfeT1As::check_op5(instr, op),
Code::RFE_T2_AS => RfeT2As::check_op5(instr, op),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::check_op5(instr, op),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::check_op5(instr, op),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::check_op5(instr, op),
Code::ROR_MOV_r_T3 => RorMovRT3::check_op5(instr, op),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::check_op5(instr, op),
Code::ROR_MOV_rr_T2 => RorMovRrT2::check_op5(instr, op),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::check_op5(instr, op),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::check_op5(instr, op),
Code::RSBS_i_T2 => RsbsIT2::check_op5(instr, op),
Code::RSBS_r_T1 => RsbsRT1::check_op5(instr, op),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::check_op5(instr, op),
Code::RSB_i_T1 => RsbIT1::check_op5(instr, op),
Code::RSB_i_T2 => RsbIT2::check_op5(instr, op),
Code::RSB_r_T1 => RsbRT1::check_op5(instr, op),
Code::RSB_r_T1_RRX => RsbRT1Rrx::check_op5(instr, op),
Code::SADD16_T1 => Sadd16T1::check_op5(instr, op),
Code::SADD8_T1 => Sadd8T1::check_op5(instr, op),
Code::SASX_T1 => SasxT1::check_op5(instr, op),
Code::SBCS_i_T1 => SbcsIT1::check_op5(instr, op),
Code::SBCS_r_T2 => SbcsRT2::check_op5(instr, op),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::check_op5(instr, op),
Code::SBC_i_T1 => SbcIT1::check_op5(instr, op),
Code::SBC_r_T1 => SbcRT1::check_op5(instr, op),
Code::SBC_r_T2 => SbcRT2::check_op5(instr, op),
Code::SBC_r_T2_RRX => SbcRT2Rrx::check_op5(instr, op),
Code::SBFX_T1 => SbfxT1::check_op5(instr, op),
Code::SB_T1 => SbT1::check_op5(instr, op),
Code::SDIV_T1 => SdivT1::check_op5(instr, op),
Code::SEL_T1 => SelT1::check_op5(instr, op),
Code::SETEND_T1 => SetendT1::check_op5(instr, op),
Code::SETPAN_T1 => SetpanT1::check_op5(instr, op),
Code::SEVL_T1 => SevlT1::check_op5(instr, op),
Code::SEVL_T2 => SevlT2::check_op5(instr, op),
Code::SEV_T1 => SevT1::check_op5(instr, op),
Code::SEV_T2 => SevT2::check_op5(instr, op),
Code::SHADD16_T1 => Shadd16T1::check_op5(instr, op),
Code::SHADD8_T1 => Shadd8T1::check_op5(instr, op),
Code::SHASX_T1 => ShasxT1::check_op5(instr, op),
Code::SHSAX_T1 => ShsaxT1::check_op5(instr, op),
Code::SHSUB16_T1 => Shsub16T1::check_op5(instr, op),
Code::SHSUB8_T1 => Shsub8T1::check_op5(instr, op),
Code::SMC_T1_AS => SmcT1As::check_op5(instr, op),
Code::SMLABB_T1 => SmlabbT1::check_op5(instr, op),
Code::SMLABT_T1 => SmlabtT1::check_op5(instr, op),
Code::SMLADX_T1 => SmladxT1::check_op5(instr, op),
Code::SMLAD_T1 => SmladT1::check_op5(instr, op),
Code::SMLALBB_T1 => SmlalbbT1::check_op5(instr, op),
Code::SMLALBT_T1 => SmlalbtT1::check_op5(instr, op),
Code::SMLALDX_T1 => SmlaldxT1::check_op5(instr, op),
Code::SMLALD_T1 => SmlaldT1::check_op5(instr, op),
Code::SMLALTB_T1 => SmlaltbT1::check_op5(instr, op),
Code::SMLALTT_T1 => SmlalttT1::check_op5(instr, op),
Code::SMLAL_T1 => SmlalT1::check_op5(instr, op),
Code::SMLATB_T1 => SmlatbT1::check_op5(instr, op),
Code::SMLATT_T1 => SmlattT1::check_op5(instr, op),
Code::SMLAWB_T1 => SmlawbT1::check_op5(instr, op),
Code::SMLAWT_T1 => SmlawtT1::check_op5(instr, op),
Code::SMLSDX_T1 => SmlsdxT1::check_op5(instr, op),
Code::SMLSD_T1 => SmlsdT1::check_op5(instr, op),
Code::SMLSLDX_T1 => SmlsldxT1::check_op5(instr, op),
Code::SMLSLD_T1 => SmlsldT1::check_op5(instr, op),
Code::SMMLAR_T1 => SmmlarT1::check_op5(instr, op),
Code::SMMLA_T1 => SmmlaT1::check_op5(instr, op),
Code::SMMLSR_T1 => SmmlsrT1::check_op5(instr, op),
Code::SMMLS_T1 => SmmlsT1::check_op5(instr, op),
Code::SMMULR_T1 => SmmulrT1::check_op5(instr, op),
Code::SMMUL_T1 => SmmulT1::check_op5(instr, op),
Code::SMUADX_T1 => SmuadxT1::check_op5(instr, op),
Code::SMUAD_T1 => SmuadT1::check_op5(instr, op),
Code::SMULBB_T1 => SmulbbT1::check_op5(instr, op),
Code::SMULBT_T1 => SmulbtT1::check_op5(instr, op),
Code::SMULL_T1 => SmullT1::check_op5(instr, op),
Code::SMULTB_T1 => SmultbT1::check_op5(instr, op),
Code::SMULTT_T1 => SmulttT1::check_op5(instr, op),
Code::SMULWB_T1 => SmulwbT1::check_op5(instr, op),
Code::SMULWT_T1 => SmulwtT1::check_op5(instr, op),
Code::SMUSDX_T1 => SmusdxT1::check_op5(instr, op),
Code::SMUSD_T1 => SmusdT1::check_op5(instr, op),
Code::SRS_T1_AS => SrsT1As::check_op5(instr, op),
Code::SRS_T2_AS => SrsT2As::check_op5(instr, op),
Code::SSAT16_T1 => Ssat16T1::check_op5(instr, op),
Code::SSAT_T1_ASR => SsatT1Asr::check_op5(instr, op),
Code::SSAT_T1_LSL => SsatT1Lsl::check_op5(instr, op),
Code::SSAX_T1 => SsaxT1::check_op5(instr, op),
Code::SSBB_T1 => SsbbT1::check_op5(instr, op),
Code::SSUB16_T1 => Ssub16T1::check_op5(instr, op),
Code::SSUB8_T1 => Ssub8T1::check_op5(instr, op),
Code::STC_T1_off => StcT1Off::check_op5(instr, op),
Code::STC_T1_post => StcT1Post::check_op5(instr, op),
Code::STC_T1_pre => StcT1Pre::check_op5(instr, op),
Code::STC_T1_unind => StcT1Unind::check_op5(instr, op),
Code::STLB_T1 => StlbT1::check_op5(instr, op),
Code::STLEXB_T1 => StlexbT1::check_op5(instr, op),
Code::STLEXD_T1 => StlexdT1::check_op5(instr, op),
Code::STLEXH_T1 => StlexhT1::check_op5(instr, op),
Code::STLEX_T1 => StlexT1::check_op5(instr, op),
Code::STLH_T1 => StlhT1::check_op5(instr, op),
Code::STL_T1 => StlT1::check_op5(instr, op),
Code::STMDB_T1 => StmdbT1::check_op5(instr, op),
Code::STM_T1 => StmT1::check_op5(instr, op),
Code::STM_T2 => StmT2::check_op5(instr, op),
Code::STRBT_T1 => StrbtT1::check_op5(instr, op),
Code::STRB_i_T1 => StrbIT1::check_op5(instr, op),
Code::STRB_i_T2 => StrbIT2::check_op5(instr, op),
Code::STRB_i_T3_offn => StrbIT3Offn::check_op5(instr, op),
Code::STRB_i_T3_post => StrbIT3Post::check_op5(instr, op),
Code::STRB_i_T3_pre => StrbIT3Pre::check_op5(instr, op),
Code::STRB_r_T1 => StrbRT1::check_op5(instr, op),
Code::STRB_r_T2 => StrbRT2::check_op5(instr, op),
Code::STRD_i_T1_off => StrdIT1Off::check_op5(instr, op),
Code::STRD_i_T1_post => StrdIT1Post::check_op5(instr, op),
Code::STRD_i_T1_pre => StrdIT1Pre::check_op5(instr, op),
Code::STREXB_T1 => StrexbT1::check_op5(instr, op),
Code::STREXD_T1 => StrexdT1::check_op5(instr, op),
Code::STREXH_T1 => StrexhT1::check_op5(instr, op),
Code::STREX_T1 => StrexT1::check_op5(instr, op),
Code::STRHT_T1 => StrhtT1::check_op5(instr, op),
Code::STRH_i_T1 => StrhIT1::check_op5(instr, op),
Code::STRH_i_T2 => StrhIT2::check_op5(instr, op),
Code::STRH_i_T3_offn => StrhIT3Offn::check_op5(instr, op),
Code::STRH_i_T3_post => StrhIT3Post::check_op5(instr, op),
Code::STRH_i_T3_pre => StrhIT3Pre::check_op5(instr, op),
Code::STRH_r_T1 => StrhRT1::check_op5(instr, op),
Code::STRH_r_T2 => StrhRT2::check_op5(instr, op),
Code::STRT_T1 => StrtT1::check_op5(instr, op),
Code::STR_i_T1 => StrIT1::check_op5(instr, op),
Code::STR_i_T2 => StrIT2::check_op5(instr, op),
Code::STR_i_T3 => StrIT3::check_op5(instr, op),
Code::STR_i_T4_off => StrIT4Off::check_op5(instr, op),
Code::STR_i_T4_post => StrIT4Post::check_op5(instr, op),
Code::STR_i_T4_pre => StrIT4Pre::check_op5(instr, op),
Code::STR_r_T1 => StrRT1::check_op5(instr, op),
Code::STR_r_T2 => StrRT2::check_op5(instr, op),
Code::SUBS_PC_T5_AS => SubsPcT5As::check_op5(instr, op),
Code::SUBS_SP_i_T2 => SubsSpIT2::check_op5(instr, op),
Code::SUBS_SP_r_T1 => SubsSpRT1::check_op5(instr, op),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::check_op5(instr, op),
Code::SUBS_i_T3 => SubsIT3::check_op5(instr, op),
Code::SUBS_r_T2 => SubsRT2::check_op5(instr, op),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::check_op5(instr, op),
Code::SUB_ADR_T2 => SubAdrT2::check_op5(instr, op),
Code::SUB_SP_i_T1 => SubSpIT1::check_op5(instr, op),
Code::SUB_SP_i_T2 => SubSpIT2::check_op5(instr, op),
Code::SUB_SP_i_T3 => SubSpIT3::check_op5(instr, op),
Code::SUB_SP_r_T1 => SubSpRT1::check_op5(instr, op),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::check_op5(instr, op),
Code::SUB_i_T1 => SubIT1::check_op5(instr, op),
Code::SUB_i_T2 => SubIT2::check_op5(instr, op),
Code::SUB_i_T3 => SubIT3::check_op5(instr, op),
Code::SUB_i_T4 => SubIT4::check_op5(instr, op),
Code::SUB_r_T1 => SubRT1::check_op5(instr, op),
Code::SUB_r_T2 => SubRT2::check_op5(instr, op),
Code::SUB_r_T2_RRX => SubRT2Rrx::check_op5(instr, op),
Code::SVC_T1 => SvcT1::check_op5(instr, op),
Code::SXTAB16_T1 => Sxtab16T1::check_op5(instr, op),
Code::SXTAB_T1 => SxtabT1::check_op5(instr, op),
Code::SXTAH_T1 => SxtahT1::check_op5(instr, op),
Code::SXTB16_T1 => Sxtb16T1::check_op5(instr, op),
Code::SXTB_T1 => SxtbT1::check_op5(instr, op),
Code::SXTB_T2 => SxtbT2::check_op5(instr, op),
Code::SXTH_T1 => SxthT1::check_op5(instr, op),
Code::SXTH_T2 => SxthT2::check_op5(instr, op),
Code::TBB_T1 => TbbT1::check_op5(instr, op),
Code::TBH_T1 => TbhT1::check_op5(instr, op),
Code::TEQ_i_T1 => TeqIT1::check_op5(instr, op),
Code::TEQ_r_T1 => TeqRT1::check_op5(instr, op),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::check_op5(instr, op),
Code::TSB_T1 => TsbT1::check_op5(instr, op),
Code::TST_i_T1 => TstIT1::check_op5(instr, op),
Code::TST_r_T1 => TstRT1::check_op5(instr, op),
Code::TST_r_T2 => TstRT2::check_op5(instr, op),
Code::TST_r_T2_RRX => TstRT2Rrx::check_op5(instr, op),
Code::UADD16_T1 => Uadd16T1::check_op5(instr, op),
Code::UADD8_T1 => Uadd8T1::check_op5(instr, op),
Code::UASX_T1 => UasxT1::check_op5(instr, op),
Code::UBFX_T1 => UbfxT1::check_op5(instr, op),
Code::UDF_T1 => UdfT1::check_op5(instr, op),
Code::UDF_T2 => UdfT2::check_op5(instr, op),
Code::UDIV_T1 => UdivT1::check_op5(instr, op),
Code::UHADD16_T1 => Uhadd16T1::check_op5(instr, op),
Code::UHADD8_T1 => Uhadd8T1::check_op5(instr, op),
Code::UHASX_T1 => UhasxT1::check_op5(instr, op),
Code::UHSAX_T1 => UhsaxT1::check_op5(instr, op),
Code::UHSUB16_T1 => Uhsub16T1::check_op5(instr, op),
Code::UHSUB8_T1 => Uhsub8T1::check_op5(instr, op),
Code::UMAAL_T1 => UmaalT1::check_op5(instr, op),
Code::UMLAL_T1 => UmlalT1::check_op5(instr, op),
Code::UMULL_T1 => UmullT1::check_op5(instr, op),
Code::UQADD16_T1 => Uqadd16T1::check_op5(instr, op),
Code::UQADD8_T1 => Uqadd8T1::check_op5(instr, op),
Code::UQASX_T1 => UqasxT1::check_op5(instr, op),
Code::UQSAX_T1 => UqsaxT1::check_op5(instr, op),
Code::UQSUB16_T1 => Uqsub16T1::check_op5(instr, op),
Code::UQSUB8_T1 => Uqsub8T1::check_op5(instr, op),
Code::USAD8_T1 => Usad8T1::check_op5(instr, op),
Code::USADA8_T1 => Usada8T1::check_op5(instr, op),
Code::USAT16_T1 => Usat16T1::check_op5(instr, op),
Code::USAT_T1_ASR => UsatT1Asr::check_op5(instr, op),
Code::USAT_T1_LSL => UsatT1Lsl::check_op5(instr, op),
Code::USAX_T1 => UsaxT1::check_op5(instr, op),
Code::USUB16_T1 => Usub16T1::check_op5(instr, op),
Code::USUB8_T1 => Usub8T1::check_op5(instr, op),
Code::UXTAB16_T1 => Uxtab16T1::check_op5(instr, op),
Code::UXTAB_T1 => UxtabT1::check_op5(instr, op),
Code::UXTAH_T1 => UxtahT1::check_op5(instr, op),
Code::UXTB16_T1 => Uxtb16T1::check_op5(instr, op),
Code::UXTB_T1 => UxtbT1::check_op5(instr, op),
Code::UXTB_T2 => UxtbT2::check_op5(instr, op),
Code::UXTH_T1 => UxthT1::check_op5(instr, op),
Code::UXTH_T2 => UxthT2::check_op5(instr, op),
Code::WFE_T1 => WfeT1::check_op5(instr, op),
Code::WFE_T2 => WfeT2::check_op5(instr, op),
Code::WFI_T1 => WfiT1::check_op5(instr, op),
Code::WFI_T2 => WfiT2::check_op5(instr, op),
Code::YIELD_T1 => YieldT1::check_op5(instr, op),
Code::YIELD_T2 => YieldT2::check_op5(instr, op),
}
}
pub fn check_op6(&self, instr: &Instruction, op: &Operand) -> Result<()> {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::check_op6(instr, op),
Code::ADCS_r_T2 => AdcsRT2::check_op6(instr, op),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::check_op6(instr, op),
Code::ADC_i_T1 => AdcIT1::check_op6(instr, op),
Code::ADC_r_T1 => AdcRT1::check_op6(instr, op),
Code::ADC_r_T2 => AdcRT2::check_op6(instr, op),
Code::ADC_r_T2_RRX => AdcRT2Rrx::check_op6(instr, op),
Code::ADDS_SP_i_T3 => AddsSpIT3::check_op6(instr, op),
Code::ADDS_SP_r_T3 => AddsSpRT3::check_op6(instr, op),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::check_op6(instr, op),
Code::ADDS_i_T3 => AddsIT3::check_op6(instr, op),
Code::ADDS_r_T3 => AddsRT3::check_op6(instr, op),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::check_op6(instr, op),
Code::ADD_ADR_T1 => AddAdrT1::check_op6(instr, op),
Code::ADD_ADR_T3 => AddAdrT3::check_op6(instr, op),
Code::ADD_SP_i_T1 => AddSpIT1::check_op6(instr, op),
Code::ADD_SP_i_T2 => AddSpIT2::check_op6(instr, op),
Code::ADD_SP_i_T3 => AddSpIT3::check_op6(instr, op),
Code::ADD_SP_i_T4 => AddSpIT4::check_op6(instr, op),
Code::ADD_SP_r_T1 => AddSpRT1::check_op6(instr, op),
Code::ADD_SP_r_T2 => AddSpRT2::check_op6(instr, op),
Code::ADD_SP_r_T3 => AddSpRT3::check_op6(instr, op),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::check_op6(instr, op),
Code::ADD_i_T1 => AddIT1::check_op6(instr, op),
Code::ADD_i_T2 => AddIT2::check_op6(instr, op),
Code::ADD_i_T3 => AddIT3::check_op6(instr, op),
Code::ADD_i_T4 => AddIT4::check_op6(instr, op),
Code::ADD_r_T1 => AddRT1::check_op6(instr, op),
Code::ADD_r_T2 => AddRT2::check_op6(instr, op),
Code::ADD_r_T3 => AddRT3::check_op6(instr, op),
Code::ADD_r_T3_RRX => AddRT3Rrx::check_op6(instr, op),
Code::ADR_T1 => AdrT1::check_op6(instr, op),
Code::ADR_T2 => AdrT2::check_op6(instr, op),
Code::ADR_T3 => AdrT3::check_op6(instr, op),
Code::ANDS_i_T1 => AndsIT1::check_op6(instr, op),
Code::ANDS_r_T2 => AndsRT2::check_op6(instr, op),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::check_op6(instr, op),
Code::AND_i_T1 => AndIT1::check_op6(instr, op),
Code::AND_r_T1 => AndRT1::check_op6(instr, op),
Code::AND_r_T2 => AndRT2::check_op6(instr, op),
Code::AND_r_T2_RRX => AndRT2Rrx::check_op6(instr, op),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::check_op6(instr, op),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::check_op6(instr, op),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::check_op6(instr, op),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::check_op6(instr, op),
Code::ASR_MOV_r_T2 => AsrMovRT2::check_op6(instr, op),
Code::ASR_MOV_r_T3 => AsrMovRT3::check_op6(instr, op),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::check_op6(instr, op),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::check_op6(instr, op),
Code::BFC_T1 => BfcT1::check_op6(instr, op),
Code::BFI_T1 => BfiT1::check_op6(instr, op),
Code::BICS_i_T1 => BicsIT1::check_op6(instr, op),
Code::BICS_r_T2 => BicsRT2::check_op6(instr, op),
Code::BICS_r_T2_RRX => BicsRT2Rrx::check_op6(instr, op),
Code::BIC_i_T1 => BicIT1::check_op6(instr, op),
Code::BIC_r_T1 => BicRT1::check_op6(instr, op),
Code::BIC_r_T2 => BicRT2::check_op6(instr, op),
Code::BIC_r_T2_RRX => BicRT2Rrx::check_op6(instr, op),
Code::BKPT_T1 => BkptT1::check_op6(instr, op),
Code::BLX_r_T1 => BlxRT1::check_op6(instr, op),
Code::BL_i_T1 => BlIT1::check_op6(instr, op),
Code::BL_i_T2 => BlIT2::check_op6(instr, op),
Code::BXJ_T1 => BxjT1::check_op6(instr, op),
Code::BX_T1 => BxT1::check_op6(instr, op),
Code::B_T1 => BT1::check_op6(instr, op),
Code::B_T2 => BT2::check_op6(instr, op),
Code::B_T3 => BT3::check_op6(instr, op),
Code::B_T4 => BT4::check_op6(instr, op),
Code::CBNZ_T1 => CbnzT1::check_op6(instr, op),
Code::CBZ_T1 => CbzT1::check_op6(instr, op),
Code::CLRBHB_T1 => ClrbhbT1::check_op6(instr, op),
Code::CLREX_T1 => ClrexT1::check_op6(instr, op),
Code::CLZ_T1 => ClzT1::check_op6(instr, op),
Code::CMN_i_T1 => CmnIT1::check_op6(instr, op),
Code::CMN_r_T1 => CmnRT1::check_op6(instr, op),
Code::CMN_r_T2 => CmnRT2::check_op6(instr, op),
Code::CMN_r_T2_RRX => CmnRT2Rrx::check_op6(instr, op),
Code::CMP_i_T1 => CmpIT1::check_op6(instr, op),
Code::CMP_i_T2 => CmpIT2::check_op6(instr, op),
Code::CMP_r_T1 => CmpRT1::check_op6(instr, op),
Code::CMP_r_T2 => CmpRT2::check_op6(instr, op),
Code::CMP_r_T3 => CmpRT3::check_op6(instr, op),
Code::CMP_r_T3_RRX => CmpRT3Rrx::check_op6(instr, op),
Code::CPSID_T1_AS => CpsidT1As::check_op6(instr, op),
Code::CPSID_T2_AS => CpsidT2As::check_op6(instr, op),
Code::CPSID_T2_ASM => CpsidT2Asm::check_op6(instr, op),
Code::CPSIE_T1_AS => CpsieT1As::check_op6(instr, op),
Code::CPSIE_T2_AS => CpsieT2As::check_op6(instr, op),
Code::CPSIE_T2_ASM => CpsieT2Asm::check_op6(instr, op),
Code::CPS_T2_AS => CpsT2As::check_op6(instr, op),
Code::CRC32B_T1 => Crc32bT1::check_op6(instr, op),
Code::CRC32CB_T1 => Crc32cbT1::check_op6(instr, op),
Code::CRC32CH_T1 => Crc32chT1::check_op6(instr, op),
Code::CRC32CW_T1 => Crc32cwT1::check_op6(instr, op),
Code::CRC32H_T1 => Crc32hT1::check_op6(instr, op),
Code::CRC32W_T1 => Crc32wT1::check_op6(instr, op),
Code::CSDB_T1 => CsdbT1::check_op6(instr, op),
Code::DBG_T1 => DbgT1::check_op6(instr, op),
Code::DCPS1_T1 => Dcps1T1::check_op6(instr, op),
Code::DCPS2_T1 => Dcps2T1::check_op6(instr, op),
Code::DCPS3_T1 => Dcps3T1::check_op6(instr, op),
Code::DMB_T1 => DmbT1::check_op6(instr, op),
Code::DSB_T1 => DsbT1::check_op6(instr, op),
Code::EORS_i_T1 => EorsIT1::check_op6(instr, op),
Code::EORS_r_T2 => EorsRT2::check_op6(instr, op),
Code::EORS_r_T2_RRX => EorsRT2Rrx::check_op6(instr, op),
Code::EOR_i_T1 => EorIT1::check_op6(instr, op),
Code::EOR_r_T1 => EorRT1::check_op6(instr, op),
Code::EOR_r_T2 => EorRT2::check_op6(instr, op),
Code::EOR_r_T2_RRX => EorRT2Rrx::check_op6(instr, op),
Code::ERET_T1 => EretT1::check_op6(instr, op),
Code::ESB_T1 => EsbT1::check_op6(instr, op),
Code::HLT_T1 => HltT1::check_op6(instr, op),
Code::HVC_T1 => HvcT1::check_op6(instr, op),
Code::ISB_T1 => IsbT1::check_op6(instr, op),
Code::IT_T1 => ItT1::check_op6(instr, op),
Code::LDAB_T1 => LdabT1::check_op6(instr, op),
Code::LDAEXB_T1 => LdaexbT1::check_op6(instr, op),
Code::LDAEXD_T1 => LdaexdT1::check_op6(instr, op),
Code::LDAEXH_T1 => LdaexhT1::check_op6(instr, op),
Code::LDAEX_T1 => LdaexT1::check_op6(instr, op),
Code::LDAH_T1 => LdahT1::check_op6(instr, op),
Code::LDA_T1 => LdaT1::check_op6(instr, op),
Code::LDC_i_T1_off => LdcIT1Off::check_op6(instr, op),
Code::LDC_i_T1_post => LdcIT1Post::check_op6(instr, op),
Code::LDC_i_T1_pre => LdcIT1Pre::check_op6(instr, op),
Code::LDC_i_T1_unind => LdcIT1Unind::check_op6(instr, op),
Code::LDC_l_T1_off => LdcLT1Off::check_op6(instr, op),
Code::LDC_l_T1_post => LdcLT1Post::check_op6(instr, op),
Code::LDC_l_T1_pre => LdcLT1Pre::check_op6(instr, op),
Code::LDC_l_T1_unind => LdcLT1Unind::check_op6(instr, op),
Code::LDMDB_T1 => LdmdbT1::check_op6(instr, op),
Code::LDM_T1 => LdmT1::check_op6(instr, op),
Code::LDM_T2 => LdmT2::check_op6(instr, op),
Code::LDRBT_T1 => LdrbtT1::check_op6(instr, op),
Code::LDRB_i_T1 => LdrbIT1::check_op6(instr, op),
Code::LDRB_i_T2 => LdrbIT2::check_op6(instr, op),
Code::LDRB_i_T3_off => LdrbIT3Off::check_op6(instr, op),
Code::LDRB_i_T3_post => LdrbIT3Post::check_op6(instr, op),
Code::LDRB_i_T3_pre => LdrbIT3Pre::check_op6(instr, op),
Code::LDRB_l_T1 => LdrbLT1::check_op6(instr, op),
Code::LDRB_r_T1 => LdrbRT1::check_op6(instr, op),
Code::LDRB_r_T2 => LdrbRT2::check_op6(instr, op),
Code::LDRD_i_T1_off => LdrdIT1Off::check_op6(instr, op),
Code::LDRD_i_T1_post => LdrdIT1Post::check_op6(instr, op),
Code::LDRD_i_T1_pre => LdrdIT1Pre::check_op6(instr, op),
Code::LDRD_l_T1_off => LdrdLT1Off::check_op6(instr, op),
Code::LDRD_l_T1_post => LdrdLT1Post::check_op6(instr, op),
Code::LDRD_l_T1_pre => LdrdLT1Pre::check_op6(instr, op),
Code::LDREXB_T1 => LdrexbT1::check_op6(instr, op),
Code::LDREXD_T1 => LdrexdT1::check_op6(instr, op),
Code::LDREXH_T1 => LdrexhT1::check_op6(instr, op),
Code::LDREX_T1 => LdrexT1::check_op6(instr, op),
Code::LDRHT_T1 => LdrhtT1::check_op6(instr, op),
Code::LDRH_i_T1 => LdrhIT1::check_op6(instr, op),
Code::LDRH_i_T2 => LdrhIT2::check_op6(instr, op),
Code::LDRH_i_T3_off => LdrhIT3Off::check_op6(instr, op),
Code::LDRH_i_T3_post => LdrhIT3Post::check_op6(instr, op),
Code::LDRH_i_T3_pre => LdrhIT3Pre::check_op6(instr, op),
Code::LDRH_l_T1 => LdrhLT1::check_op6(instr, op),
Code::LDRH_r_T1 => LdrhRT1::check_op6(instr, op),
Code::LDRH_r_T2 => LdrhRT2::check_op6(instr, op),
Code::LDRSBT_T1 => LdrsbtT1::check_op6(instr, op),
Code::LDRSB_i_T1 => LdrsbIT1::check_op6(instr, op),
Code::LDRSB_i_T2_off => LdrsbIT2Off::check_op6(instr, op),
Code::LDRSB_i_T2_post => LdrsbIT2Post::check_op6(instr, op),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::check_op6(instr, op),
Code::LDRSB_l_T1 => LdrsbLT1::check_op6(instr, op),
Code::LDRSB_r_T1 => LdrsbRT1::check_op6(instr, op),
Code::LDRSB_r_T2 => LdrsbRT2::check_op6(instr, op),
Code::LDRSHT_T1 => LdrshtT1::check_op6(instr, op),
Code::LDRSH_i_T1 => LdrshIT1::check_op6(instr, op),
Code::LDRSH_i_T2_off => LdrshIT2Off::check_op6(instr, op),
Code::LDRSH_i_T2_post => LdrshIT2Post::check_op6(instr, op),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::check_op6(instr, op),
Code::LDRSH_l_T1 => LdrshLT1::check_op6(instr, op),
Code::LDRSH_r_T1 => LdrshRT1::check_op6(instr, op),
Code::LDRSH_r_T2 => LdrshRT2::check_op6(instr, op),
Code::LDRT_T1 => LdrtT1::check_op6(instr, op),
Code::LDR_i_T1 => LdrIT1::check_op6(instr, op),
Code::LDR_i_T2 => LdrIT2::check_op6(instr, op),
Code::LDR_i_T3 => LdrIT3::check_op6(instr, op),
Code::LDR_i_T4_off => LdrIT4Off::check_op6(instr, op),
Code::LDR_i_T4_post => LdrIT4Post::check_op6(instr, op),
Code::LDR_i_T4_pre => LdrIT4Pre::check_op6(instr, op),
Code::LDR_l_T2 => LdrLT2::check_op6(instr, op),
Code::LDR_r_T1 => LdrRT1::check_op6(instr, op),
Code::LDR_r_T2 => LdrRT2::check_op6(instr, op),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::check_op6(instr, op),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::check_op6(instr, op),
Code::LSLS_MOV_r_T2 => LslsMovRT2::check_op6(instr, op),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::check_op6(instr, op),
Code::LSL_MOV_r_T2 => LslMovRT2::check_op6(instr, op),
Code::LSL_MOV_r_T3 => LslMovRT3::check_op6(instr, op),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::check_op6(instr, op),
Code::LSL_MOV_rr_T2 => LslMovRrT2::check_op6(instr, op),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::check_op6(instr, op),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::check_op6(instr, op),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::check_op6(instr, op),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::check_op6(instr, op),
Code::LSR_MOV_r_T2 => LsrMovRT2::check_op6(instr, op),
Code::LSR_MOV_r_T3 => LsrMovRT3::check_op6(instr, op),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::check_op6(instr, op),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::check_op6(instr, op),
Code::MCRR_T1 => McrrT1::check_op6(instr, op),
Code::MCR_T1 => McrT1::check_op6(instr, op),
Code::MLA_T1 => MlaT1::check_op6(instr, op),
Code::MLS_T1 => MlsT1::check_op6(instr, op),
Code::MOVS_i_T2 => MovsIT2::check_op6(instr, op),
Code::MOVS_r_T3 => MovsRT3::check_op6(instr, op),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::check_op6(instr, op),
Code::MOVS_rr_T2 => MovsRrT2::check_op6(instr, op),
Code::MOVT_T1 => MovtT1::check_op6(instr, op),
Code::MOV_i_T1 => MovIT1::check_op6(instr, op),
Code::MOV_i_T2 => MovIT2::check_op6(instr, op),
Code::MOV_i_T3 => MovIT3::check_op6(instr, op),
Code::MOV_r_T1 => MovRT1::check_op6(instr, op),
Code::MOV_r_T2 => MovRT2::check_op6(instr, op),
Code::MOV_r_T3 => MovRT3::check_op6(instr, op),
Code::MOV_r_T3_RRX => MovRT3Rrx::check_op6(instr, op),
Code::MOV_rr_T1_ASR => MovRrT1Asr::check_op6(instr, op),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::check_op6(instr, op),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::check_op6(instr, op),
Code::MOV_rr_T1_ROR => MovRrT1Ror::check_op6(instr, op),
Code::MOV_rr_T2 => MovRrT2::check_op6(instr, op),
Code::MRC_T1 => MrcT1::check_op6(instr, op),
Code::MRRC_T1 => MrrcT1::check_op6(instr, op),
Code::MRS_T1_AS => MrsT1As::check_op6(instr, op),
Code::MRS_br_T1_AS => MrsBrT1As::check_op6(instr, op),
Code::MSR_br_T1_AS => MsrBrT1As::check_op6(instr, op),
Code::MSR_r_T1_AS => MsrRT1As::check_op6(instr, op),
Code::MUL_T1 => MulT1::check_op6(instr, op),
Code::MUL_T2 => MulT2::check_op6(instr, op),
Code::MVNS_i_T1 => MvnsIT1::check_op6(instr, op),
Code::MVNS_r_T2 => MvnsRT2::check_op6(instr, op),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::check_op6(instr, op),
Code::MVN_i_T1 => MvnIT1::check_op6(instr, op),
Code::MVN_r_T1 => MvnRT1::check_op6(instr, op),
Code::MVN_r_T2 => MvnRT2::check_op6(instr, op),
Code::MVN_r_T2_RRX => MvnRT2Rrx::check_op6(instr, op),
Code::NOP_T1 => NopT1::check_op6(instr, op),
Code::NOP_T2 => NopT2::check_op6(instr, op),
Code::ORNS_i_T1 => OrnsIT1::check_op6(instr, op),
Code::ORNS_r_T1 => OrnsRT1::check_op6(instr, op),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::check_op6(instr, op),
Code::ORN_i_T1 => OrnIT1::check_op6(instr, op),
Code::ORN_r_T1 => OrnRT1::check_op6(instr, op),
Code::ORN_r_T1_RRX => OrnRT1Rrx::check_op6(instr, op),
Code::ORRS_i_T1 => OrrsIT1::check_op6(instr, op),
Code::ORRS_r_T2 => OrrsRT2::check_op6(instr, op),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::check_op6(instr, op),
Code::ORR_i_T1 => OrrIT1::check_op6(instr, op),
Code::ORR_r_T1 => OrrRT1::check_op6(instr, op),
Code::ORR_r_T2 => OrrRT2::check_op6(instr, op),
Code::ORR_r_T2_RRX => OrrRT2Rrx::check_op6(instr, op),
Code::PKHBT_T1 => PkhbtT1::check_op6(instr, op),
Code::PKHTB_T1 => PkhtbT1::check_op6(instr, op),
Code::PLDW_i_T1 => PldwIT1::check_op6(instr, op),
Code::PLDW_i_T2 => PldwIT2::check_op6(instr, op),
Code::PLDW_r_T1 => PldwRT1::check_op6(instr, op),
Code::PLD_i_T1 => PldIT1::check_op6(instr, op),
Code::PLD_i_T2 => PldIT2::check_op6(instr, op),
Code::PLD_l_T1 => PldLT1::check_op6(instr, op),
Code::PLD_r_T1 => PldRT1::check_op6(instr, op),
Code::PLI_i_T1 => PliIT1::check_op6(instr, op),
Code::PLI_i_T2 => PliIT2::check_op6(instr, op),
Code::PLI_i_T3 => PliIT3::check_op6(instr, op),
Code::PLI_r_T1 => PliRT1::check_op6(instr, op),
Code::POP_LDM_T2 => PopLdmT2::check_op6(instr, op),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::check_op6(instr, op),
Code::POP_T1 => PopT1::check_op6(instr, op),
Code::PSSBB_T1 => PssbbT1::check_op6(instr, op),
Code::PUSH_STMDB_T1 => PushStmdbT1::check_op6(instr, op),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::check_op6(instr, op),
Code::PUSH_T1 => PushT1::check_op6(instr, op),
Code::QADD16_T1 => Qadd16T1::check_op6(instr, op),
Code::QADD8_T1 => Qadd8T1::check_op6(instr, op),
Code::QADD_T1 => QaddT1::check_op6(instr, op),
Code::QASX_T1 => QasxT1::check_op6(instr, op),
Code::QDADD_T1 => QdaddT1::check_op6(instr, op),
Code::QDSUB_T1 => QdsubT1::check_op6(instr, op),
Code::QSAX_T1 => QsaxT1::check_op6(instr, op),
Code::QSUB16_T1 => Qsub16T1::check_op6(instr, op),
Code::QSUB8_T1 => Qsub8T1::check_op6(instr, op),
Code::QSUB_T1 => QsubT1::check_op6(instr, op),
Code::RBIT_T1 => RbitT1::check_op6(instr, op),
Code::REV16_T1 => Rev16T1::check_op6(instr, op),
Code::REV16_T2 => Rev16T2::check_op6(instr, op),
Code::REVSH_T1 => RevshT1::check_op6(instr, op),
Code::REVSH_T2 => RevshT2::check_op6(instr, op),
Code::REV_T1 => RevT1::check_op6(instr, op),
Code::REV_T2 => RevT2::check_op6(instr, op),
Code::RFE_T1_AS => RfeT1As::check_op6(instr, op),
Code::RFE_T2_AS => RfeT2As::check_op6(instr, op),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::check_op6(instr, op),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::check_op6(instr, op),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::check_op6(instr, op),
Code::ROR_MOV_r_T3 => RorMovRT3::check_op6(instr, op),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::check_op6(instr, op),
Code::ROR_MOV_rr_T2 => RorMovRrT2::check_op6(instr, op),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::check_op6(instr, op),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::check_op6(instr, op),
Code::RSBS_i_T2 => RsbsIT2::check_op6(instr, op),
Code::RSBS_r_T1 => RsbsRT1::check_op6(instr, op),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::check_op6(instr, op),
Code::RSB_i_T1 => RsbIT1::check_op6(instr, op),
Code::RSB_i_T2 => RsbIT2::check_op6(instr, op),
Code::RSB_r_T1 => RsbRT1::check_op6(instr, op),
Code::RSB_r_T1_RRX => RsbRT1Rrx::check_op6(instr, op),
Code::SADD16_T1 => Sadd16T1::check_op6(instr, op),
Code::SADD8_T1 => Sadd8T1::check_op6(instr, op),
Code::SASX_T1 => SasxT1::check_op6(instr, op),
Code::SBCS_i_T1 => SbcsIT1::check_op6(instr, op),
Code::SBCS_r_T2 => SbcsRT2::check_op6(instr, op),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::check_op6(instr, op),
Code::SBC_i_T1 => SbcIT1::check_op6(instr, op),
Code::SBC_r_T1 => SbcRT1::check_op6(instr, op),
Code::SBC_r_T2 => SbcRT2::check_op6(instr, op),
Code::SBC_r_T2_RRX => SbcRT2Rrx::check_op6(instr, op),
Code::SBFX_T1 => SbfxT1::check_op6(instr, op),
Code::SB_T1 => SbT1::check_op6(instr, op),
Code::SDIV_T1 => SdivT1::check_op6(instr, op),
Code::SEL_T1 => SelT1::check_op6(instr, op),
Code::SETEND_T1 => SetendT1::check_op6(instr, op),
Code::SETPAN_T1 => SetpanT1::check_op6(instr, op),
Code::SEVL_T1 => SevlT1::check_op6(instr, op),
Code::SEVL_T2 => SevlT2::check_op6(instr, op),
Code::SEV_T1 => SevT1::check_op6(instr, op),
Code::SEV_T2 => SevT2::check_op6(instr, op),
Code::SHADD16_T1 => Shadd16T1::check_op6(instr, op),
Code::SHADD8_T1 => Shadd8T1::check_op6(instr, op),
Code::SHASX_T1 => ShasxT1::check_op6(instr, op),
Code::SHSAX_T1 => ShsaxT1::check_op6(instr, op),
Code::SHSUB16_T1 => Shsub16T1::check_op6(instr, op),
Code::SHSUB8_T1 => Shsub8T1::check_op6(instr, op),
Code::SMC_T1_AS => SmcT1As::check_op6(instr, op),
Code::SMLABB_T1 => SmlabbT1::check_op6(instr, op),
Code::SMLABT_T1 => SmlabtT1::check_op6(instr, op),
Code::SMLADX_T1 => SmladxT1::check_op6(instr, op),
Code::SMLAD_T1 => SmladT1::check_op6(instr, op),
Code::SMLALBB_T1 => SmlalbbT1::check_op6(instr, op),
Code::SMLALBT_T1 => SmlalbtT1::check_op6(instr, op),
Code::SMLALDX_T1 => SmlaldxT1::check_op6(instr, op),
Code::SMLALD_T1 => SmlaldT1::check_op6(instr, op),
Code::SMLALTB_T1 => SmlaltbT1::check_op6(instr, op),
Code::SMLALTT_T1 => SmlalttT1::check_op6(instr, op),
Code::SMLAL_T1 => SmlalT1::check_op6(instr, op),
Code::SMLATB_T1 => SmlatbT1::check_op6(instr, op),
Code::SMLATT_T1 => SmlattT1::check_op6(instr, op),
Code::SMLAWB_T1 => SmlawbT1::check_op6(instr, op),
Code::SMLAWT_T1 => SmlawtT1::check_op6(instr, op),
Code::SMLSDX_T1 => SmlsdxT1::check_op6(instr, op),
Code::SMLSD_T1 => SmlsdT1::check_op6(instr, op),
Code::SMLSLDX_T1 => SmlsldxT1::check_op6(instr, op),
Code::SMLSLD_T1 => SmlsldT1::check_op6(instr, op),
Code::SMMLAR_T1 => SmmlarT1::check_op6(instr, op),
Code::SMMLA_T1 => SmmlaT1::check_op6(instr, op),
Code::SMMLSR_T1 => SmmlsrT1::check_op6(instr, op),
Code::SMMLS_T1 => SmmlsT1::check_op6(instr, op),
Code::SMMULR_T1 => SmmulrT1::check_op6(instr, op),
Code::SMMUL_T1 => SmmulT1::check_op6(instr, op),
Code::SMUADX_T1 => SmuadxT1::check_op6(instr, op),
Code::SMUAD_T1 => SmuadT1::check_op6(instr, op),
Code::SMULBB_T1 => SmulbbT1::check_op6(instr, op),
Code::SMULBT_T1 => SmulbtT1::check_op6(instr, op),
Code::SMULL_T1 => SmullT1::check_op6(instr, op),
Code::SMULTB_T1 => SmultbT1::check_op6(instr, op),
Code::SMULTT_T1 => SmulttT1::check_op6(instr, op),
Code::SMULWB_T1 => SmulwbT1::check_op6(instr, op),
Code::SMULWT_T1 => SmulwtT1::check_op6(instr, op),
Code::SMUSDX_T1 => SmusdxT1::check_op6(instr, op),
Code::SMUSD_T1 => SmusdT1::check_op6(instr, op),
Code::SRS_T1_AS => SrsT1As::check_op6(instr, op),
Code::SRS_T2_AS => SrsT2As::check_op6(instr, op),
Code::SSAT16_T1 => Ssat16T1::check_op6(instr, op),
Code::SSAT_T1_ASR => SsatT1Asr::check_op6(instr, op),
Code::SSAT_T1_LSL => SsatT1Lsl::check_op6(instr, op),
Code::SSAX_T1 => SsaxT1::check_op6(instr, op),
Code::SSBB_T1 => SsbbT1::check_op6(instr, op),
Code::SSUB16_T1 => Ssub16T1::check_op6(instr, op),
Code::SSUB8_T1 => Ssub8T1::check_op6(instr, op),
Code::STC_T1_off => StcT1Off::check_op6(instr, op),
Code::STC_T1_post => StcT1Post::check_op6(instr, op),
Code::STC_T1_pre => StcT1Pre::check_op6(instr, op),
Code::STC_T1_unind => StcT1Unind::check_op6(instr, op),
Code::STLB_T1 => StlbT1::check_op6(instr, op),
Code::STLEXB_T1 => StlexbT1::check_op6(instr, op),
Code::STLEXD_T1 => StlexdT1::check_op6(instr, op),
Code::STLEXH_T1 => StlexhT1::check_op6(instr, op),
Code::STLEX_T1 => StlexT1::check_op6(instr, op),
Code::STLH_T1 => StlhT1::check_op6(instr, op),
Code::STL_T1 => StlT1::check_op6(instr, op),
Code::STMDB_T1 => StmdbT1::check_op6(instr, op),
Code::STM_T1 => StmT1::check_op6(instr, op),
Code::STM_T2 => StmT2::check_op6(instr, op),
Code::STRBT_T1 => StrbtT1::check_op6(instr, op),
Code::STRB_i_T1 => StrbIT1::check_op6(instr, op),
Code::STRB_i_T2 => StrbIT2::check_op6(instr, op),
Code::STRB_i_T3_offn => StrbIT3Offn::check_op6(instr, op),
Code::STRB_i_T3_post => StrbIT3Post::check_op6(instr, op),
Code::STRB_i_T3_pre => StrbIT3Pre::check_op6(instr, op),
Code::STRB_r_T1 => StrbRT1::check_op6(instr, op),
Code::STRB_r_T2 => StrbRT2::check_op6(instr, op),
Code::STRD_i_T1_off => StrdIT1Off::check_op6(instr, op),
Code::STRD_i_T1_post => StrdIT1Post::check_op6(instr, op),
Code::STRD_i_T1_pre => StrdIT1Pre::check_op6(instr, op),
Code::STREXB_T1 => StrexbT1::check_op6(instr, op),
Code::STREXD_T1 => StrexdT1::check_op6(instr, op),
Code::STREXH_T1 => StrexhT1::check_op6(instr, op),
Code::STREX_T1 => StrexT1::check_op6(instr, op),
Code::STRHT_T1 => StrhtT1::check_op6(instr, op),
Code::STRH_i_T1 => StrhIT1::check_op6(instr, op),
Code::STRH_i_T2 => StrhIT2::check_op6(instr, op),
Code::STRH_i_T3_offn => StrhIT3Offn::check_op6(instr, op),
Code::STRH_i_T3_post => StrhIT3Post::check_op6(instr, op),
Code::STRH_i_T3_pre => StrhIT3Pre::check_op6(instr, op),
Code::STRH_r_T1 => StrhRT1::check_op6(instr, op),
Code::STRH_r_T2 => StrhRT2::check_op6(instr, op),
Code::STRT_T1 => StrtT1::check_op6(instr, op),
Code::STR_i_T1 => StrIT1::check_op6(instr, op),
Code::STR_i_T2 => StrIT2::check_op6(instr, op),
Code::STR_i_T3 => StrIT3::check_op6(instr, op),
Code::STR_i_T4_off => StrIT4Off::check_op6(instr, op),
Code::STR_i_T4_post => StrIT4Post::check_op6(instr, op),
Code::STR_i_T4_pre => StrIT4Pre::check_op6(instr, op),
Code::STR_r_T1 => StrRT1::check_op6(instr, op),
Code::STR_r_T2 => StrRT2::check_op6(instr, op),
Code::SUBS_PC_T5_AS => SubsPcT5As::check_op6(instr, op),
Code::SUBS_SP_i_T2 => SubsSpIT2::check_op6(instr, op),
Code::SUBS_SP_r_T1 => SubsSpRT1::check_op6(instr, op),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::check_op6(instr, op),
Code::SUBS_i_T3 => SubsIT3::check_op6(instr, op),
Code::SUBS_r_T2 => SubsRT2::check_op6(instr, op),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::check_op6(instr, op),
Code::SUB_ADR_T2 => SubAdrT2::check_op6(instr, op),
Code::SUB_SP_i_T1 => SubSpIT1::check_op6(instr, op),
Code::SUB_SP_i_T2 => SubSpIT2::check_op6(instr, op),
Code::SUB_SP_i_T3 => SubSpIT3::check_op6(instr, op),
Code::SUB_SP_r_T1 => SubSpRT1::check_op6(instr, op),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::check_op6(instr, op),
Code::SUB_i_T1 => SubIT1::check_op6(instr, op),
Code::SUB_i_T2 => SubIT2::check_op6(instr, op),
Code::SUB_i_T3 => SubIT3::check_op6(instr, op),
Code::SUB_i_T4 => SubIT4::check_op6(instr, op),
Code::SUB_r_T1 => SubRT1::check_op6(instr, op),
Code::SUB_r_T2 => SubRT2::check_op6(instr, op),
Code::SUB_r_T2_RRX => SubRT2Rrx::check_op6(instr, op),
Code::SVC_T1 => SvcT1::check_op6(instr, op),
Code::SXTAB16_T1 => Sxtab16T1::check_op6(instr, op),
Code::SXTAB_T1 => SxtabT1::check_op6(instr, op),
Code::SXTAH_T1 => SxtahT1::check_op6(instr, op),
Code::SXTB16_T1 => Sxtb16T1::check_op6(instr, op),
Code::SXTB_T1 => SxtbT1::check_op6(instr, op),
Code::SXTB_T2 => SxtbT2::check_op6(instr, op),
Code::SXTH_T1 => SxthT1::check_op6(instr, op),
Code::SXTH_T2 => SxthT2::check_op6(instr, op),
Code::TBB_T1 => TbbT1::check_op6(instr, op),
Code::TBH_T1 => TbhT1::check_op6(instr, op),
Code::TEQ_i_T1 => TeqIT1::check_op6(instr, op),
Code::TEQ_r_T1 => TeqRT1::check_op6(instr, op),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::check_op6(instr, op),
Code::TSB_T1 => TsbT1::check_op6(instr, op),
Code::TST_i_T1 => TstIT1::check_op6(instr, op),
Code::TST_r_T1 => TstRT1::check_op6(instr, op),
Code::TST_r_T2 => TstRT2::check_op6(instr, op),
Code::TST_r_T2_RRX => TstRT2Rrx::check_op6(instr, op),
Code::UADD16_T1 => Uadd16T1::check_op6(instr, op),
Code::UADD8_T1 => Uadd8T1::check_op6(instr, op),
Code::UASX_T1 => UasxT1::check_op6(instr, op),
Code::UBFX_T1 => UbfxT1::check_op6(instr, op),
Code::UDF_T1 => UdfT1::check_op6(instr, op),
Code::UDF_T2 => UdfT2::check_op6(instr, op),
Code::UDIV_T1 => UdivT1::check_op6(instr, op),
Code::UHADD16_T1 => Uhadd16T1::check_op6(instr, op),
Code::UHADD8_T1 => Uhadd8T1::check_op6(instr, op),
Code::UHASX_T1 => UhasxT1::check_op6(instr, op),
Code::UHSAX_T1 => UhsaxT1::check_op6(instr, op),
Code::UHSUB16_T1 => Uhsub16T1::check_op6(instr, op),
Code::UHSUB8_T1 => Uhsub8T1::check_op6(instr, op),
Code::UMAAL_T1 => UmaalT1::check_op6(instr, op),
Code::UMLAL_T1 => UmlalT1::check_op6(instr, op),
Code::UMULL_T1 => UmullT1::check_op6(instr, op),
Code::UQADD16_T1 => Uqadd16T1::check_op6(instr, op),
Code::UQADD8_T1 => Uqadd8T1::check_op6(instr, op),
Code::UQASX_T1 => UqasxT1::check_op6(instr, op),
Code::UQSAX_T1 => UqsaxT1::check_op6(instr, op),
Code::UQSUB16_T1 => Uqsub16T1::check_op6(instr, op),
Code::UQSUB8_T1 => Uqsub8T1::check_op6(instr, op),
Code::USAD8_T1 => Usad8T1::check_op6(instr, op),
Code::USADA8_T1 => Usada8T1::check_op6(instr, op),
Code::USAT16_T1 => Usat16T1::check_op6(instr, op),
Code::USAT_T1_ASR => UsatT1Asr::check_op6(instr, op),
Code::USAT_T1_LSL => UsatT1Lsl::check_op6(instr, op),
Code::USAX_T1 => UsaxT1::check_op6(instr, op),
Code::USUB16_T1 => Usub16T1::check_op6(instr, op),
Code::USUB8_T1 => Usub8T1::check_op6(instr, op),
Code::UXTAB16_T1 => Uxtab16T1::check_op6(instr, op),
Code::UXTAB_T1 => UxtabT1::check_op6(instr, op),
Code::UXTAH_T1 => UxtahT1::check_op6(instr, op),
Code::UXTB16_T1 => Uxtb16T1::check_op6(instr, op),
Code::UXTB_T1 => UxtbT1::check_op6(instr, op),
Code::UXTB_T2 => UxtbT2::check_op6(instr, op),
Code::UXTH_T1 => UxthT1::check_op6(instr, op),
Code::UXTH_T2 => UxthT2::check_op6(instr, op),
Code::WFE_T1 => WfeT1::check_op6(instr, op),
Code::WFE_T2 => WfeT2::check_op6(instr, op),
Code::WFI_T1 => WfiT1::check_op6(instr, op),
Code::WFI_T2 => WfiT2::check_op6(instr, op),
Code::YIELD_T1 => YieldT1::check_op6(instr, op),
Code::YIELD_T2 => YieldT2::check_op6(instr, op),
}
}
pub fn format(&self, instr: &Instruction, fmt: &mut impl Formatter, output: &mut impl FormatterOutput, config: &Config) -> Result<()> {
match self {
Code::Invalid => todo!(),
Code::ADCS_i_T1 => AdcsIT1::format(instr, fmt, output, config),
Code::ADCS_r_T2 => AdcsRT2::format(instr, fmt, output, config),
Code::ADCS_r_T2_RRX => AdcsRT2Rrx::format(instr, fmt, output, config),
Code::ADC_i_T1 => AdcIT1::format(instr, fmt, output, config),
Code::ADC_r_T1 => AdcRT1::format(instr, fmt, output, config),
Code::ADC_r_T2 => AdcRT2::format(instr, fmt, output, config),
Code::ADC_r_T2_RRX => AdcRT2Rrx::format(instr, fmt, output, config),
Code::ADDS_SP_i_T3 => AddsSpIT3::format(instr, fmt, output, config),
Code::ADDS_SP_r_T3 => AddsSpRT3::format(instr, fmt, output, config),
Code::ADDS_SP_r_T3_RRX => AddsSpRT3Rrx::format(instr, fmt, output, config),
Code::ADDS_i_T3 => AddsIT3::format(instr, fmt, output, config),
Code::ADDS_r_T3 => AddsRT3::format(instr, fmt, output, config),
Code::ADDS_r_T3_RRX => AddsRT3Rrx::format(instr, fmt, output, config),
Code::ADD_ADR_T1 => AddAdrT1::format(instr, fmt, output, config),
Code::ADD_ADR_T3 => AddAdrT3::format(instr, fmt, output, config),
Code::ADD_SP_i_T1 => AddSpIT1::format(instr, fmt, output, config),
Code::ADD_SP_i_T2 => AddSpIT2::format(instr, fmt, output, config),
Code::ADD_SP_i_T3 => AddSpIT3::format(instr, fmt, output, config),
Code::ADD_SP_i_T4 => AddSpIT4::format(instr, fmt, output, config),
Code::ADD_SP_r_T1 => AddSpRT1::format(instr, fmt, output, config),
Code::ADD_SP_r_T2 => AddSpRT2::format(instr, fmt, output, config),
Code::ADD_SP_r_T3 => AddSpRT3::format(instr, fmt, output, config),
Code::ADD_SP_r_T3_RRX => AddSpRT3Rrx::format(instr, fmt, output, config),
Code::ADD_i_T1 => AddIT1::format(instr, fmt, output, config),
Code::ADD_i_T2 => AddIT2::format(instr, fmt, output, config),
Code::ADD_i_T3 => AddIT3::format(instr, fmt, output, config),
Code::ADD_i_T4 => AddIT4::format(instr, fmt, output, config),
Code::ADD_r_T1 => AddRT1::format(instr, fmt, output, config),
Code::ADD_r_T2 => AddRT2::format(instr, fmt, output, config),
Code::ADD_r_T3 => AddRT3::format(instr, fmt, output, config),
Code::ADD_r_T3_RRX => AddRT3Rrx::format(instr, fmt, output, config),
Code::ADR_T1 => AdrT1::format(instr, fmt, output, config),
Code::ADR_T2 => AdrT2::format(instr, fmt, output, config),
Code::ADR_T3 => AdrT3::format(instr, fmt, output, config),
Code::ANDS_i_T1 => AndsIT1::format(instr, fmt, output, config),
Code::ANDS_r_T2 => AndsRT2::format(instr, fmt, output, config),
Code::ANDS_r_T2_RRX => AndsRT2Rrx::format(instr, fmt, output, config),
Code::AND_i_T1 => AndIT1::format(instr, fmt, output, config),
Code::AND_r_T1 => AndRT1::format(instr, fmt, output, config),
Code::AND_r_T2 => AndRT2::format(instr, fmt, output, config),
Code::AND_r_T2_RRX => AndRT2Rrx::format(instr, fmt, output, config),
Code::ASRS_MOVS_r_T3 => AsrsMovsRT3::format(instr, fmt, output, config),
Code::ASRS_MOVS_rr_T2 => AsrsMovsRrT2::format(instr, fmt, output, config),
Code::ASRS_MOV_r_T2 => AsrsMovRT2::format(instr, fmt, output, config),
Code::ASRS_MOV_rr_T1_ASR => AsrsMovRrT1Asr::format(instr, fmt, output, config),
Code::ASR_MOV_r_T2 => AsrMovRT2::format(instr, fmt, output, config),
Code::ASR_MOV_r_T3 => AsrMovRT3::format(instr, fmt, output, config),
Code::ASR_MOV_rr_T1_ASR => AsrMovRrT1Asr::format(instr, fmt, output, config),
Code::ASR_MOV_rr_T2 => AsrMovRrT2::format(instr, fmt, output, config),
Code::BFC_T1 => BfcT1::format(instr, fmt, output, config),
Code::BFI_T1 => BfiT1::format(instr, fmt, output, config),
Code::BICS_i_T1 => BicsIT1::format(instr, fmt, output, config),
Code::BICS_r_T2 => BicsRT2::format(instr, fmt, output, config),
Code::BICS_r_T2_RRX => BicsRT2Rrx::format(instr, fmt, output, config),
Code::BIC_i_T1 => BicIT1::format(instr, fmt, output, config),
Code::BIC_r_T1 => BicRT1::format(instr, fmt, output, config),
Code::BIC_r_T2 => BicRT2::format(instr, fmt, output, config),
Code::BIC_r_T2_RRX => BicRT2Rrx::format(instr, fmt, output, config),
Code::BKPT_T1 => BkptT1::format(instr, fmt, output, config),
Code::BLX_r_T1 => BlxRT1::format(instr, fmt, output, config),
Code::BL_i_T1 => BlIT1::format(instr, fmt, output, config),
Code::BL_i_T2 => BlIT2::format(instr, fmt, output, config),
Code::BXJ_T1 => BxjT1::format(instr, fmt, output, config),
Code::BX_T1 => BxT1::format(instr, fmt, output, config),
Code::B_T1 => BT1::format(instr, fmt, output, config),
Code::B_T2 => BT2::format(instr, fmt, output, config),
Code::B_T3 => BT3::format(instr, fmt, output, config),
Code::B_T4 => BT4::format(instr, fmt, output, config),
Code::CBNZ_T1 => CbnzT1::format(instr, fmt, output, config),
Code::CBZ_T1 => CbzT1::format(instr, fmt, output, config),
Code::CLRBHB_T1 => ClrbhbT1::format(instr, fmt, output, config),
Code::CLREX_T1 => ClrexT1::format(instr, fmt, output, config),
Code::CLZ_T1 => ClzT1::format(instr, fmt, output, config),
Code::CMN_i_T1 => CmnIT1::format(instr, fmt, output, config),
Code::CMN_r_T1 => CmnRT1::format(instr, fmt, output, config),
Code::CMN_r_T2 => CmnRT2::format(instr, fmt, output, config),
Code::CMN_r_T2_RRX => CmnRT2Rrx::format(instr, fmt, output, config),
Code::CMP_i_T1 => CmpIT1::format(instr, fmt, output, config),
Code::CMP_i_T2 => CmpIT2::format(instr, fmt, output, config),
Code::CMP_r_T1 => CmpRT1::format(instr, fmt, output, config),
Code::CMP_r_T2 => CmpRT2::format(instr, fmt, output, config),
Code::CMP_r_T3 => CmpRT3::format(instr, fmt, output, config),
Code::CMP_r_T3_RRX => CmpRT3Rrx::format(instr, fmt, output, config),
Code::CPSID_T1_AS => CpsidT1As::format(instr, fmt, output, config),
Code::CPSID_T2_AS => CpsidT2As::format(instr, fmt, output, config),
Code::CPSID_T2_ASM => CpsidT2Asm::format(instr, fmt, output, config),
Code::CPSIE_T1_AS => CpsieT1As::format(instr, fmt, output, config),
Code::CPSIE_T2_AS => CpsieT2As::format(instr, fmt, output, config),
Code::CPSIE_T2_ASM => CpsieT2Asm::format(instr, fmt, output, config),
Code::CPS_T2_AS => CpsT2As::format(instr, fmt, output, config),
Code::CRC32B_T1 => Crc32bT1::format(instr, fmt, output, config),
Code::CRC32CB_T1 => Crc32cbT1::format(instr, fmt, output, config),
Code::CRC32CH_T1 => Crc32chT1::format(instr, fmt, output, config),
Code::CRC32CW_T1 => Crc32cwT1::format(instr, fmt, output, config),
Code::CRC32H_T1 => Crc32hT1::format(instr, fmt, output, config),
Code::CRC32W_T1 => Crc32wT1::format(instr, fmt, output, config),
Code::CSDB_T1 => CsdbT1::format(instr, fmt, output, config),
Code::DBG_T1 => DbgT1::format(instr, fmt, output, config),
Code::DCPS1_T1 => Dcps1T1::format(instr, fmt, output, config),
Code::DCPS2_T1 => Dcps2T1::format(instr, fmt, output, config),
Code::DCPS3_T1 => Dcps3T1::format(instr, fmt, output, config),
Code::DMB_T1 => DmbT1::format(instr, fmt, output, config),
Code::DSB_T1 => DsbT1::format(instr, fmt, output, config),
Code::EORS_i_T1 => EorsIT1::format(instr, fmt, output, config),
Code::EORS_r_T2 => EorsRT2::format(instr, fmt, output, config),
Code::EORS_r_T2_RRX => EorsRT2Rrx::format(instr, fmt, output, config),
Code::EOR_i_T1 => EorIT1::format(instr, fmt, output, config),
Code::EOR_r_T1 => EorRT1::format(instr, fmt, output, config),
Code::EOR_r_T2 => EorRT2::format(instr, fmt, output, config),
Code::EOR_r_T2_RRX => EorRT2Rrx::format(instr, fmt, output, config),
Code::ERET_T1 => EretT1::format(instr, fmt, output, config),
Code::ESB_T1 => EsbT1::format(instr, fmt, output, config),
Code::HLT_T1 => HltT1::format(instr, fmt, output, config),
Code::HVC_T1 => HvcT1::format(instr, fmt, output, config),
Code::ISB_T1 => IsbT1::format(instr, fmt, output, config),
Code::IT_T1 => ItT1::format(instr, fmt, output, config),
Code::LDAB_T1 => LdabT1::format(instr, fmt, output, config),
Code::LDAEXB_T1 => LdaexbT1::format(instr, fmt, output, config),
Code::LDAEXD_T1 => LdaexdT1::format(instr, fmt, output, config),
Code::LDAEXH_T1 => LdaexhT1::format(instr, fmt, output, config),
Code::LDAEX_T1 => LdaexT1::format(instr, fmt, output, config),
Code::LDAH_T1 => LdahT1::format(instr, fmt, output, config),
Code::LDA_T1 => LdaT1::format(instr, fmt, output, config),
Code::LDC_i_T1_off => LdcIT1Off::format(instr, fmt, output, config),
Code::LDC_i_T1_post => LdcIT1Post::format(instr, fmt, output, config),
Code::LDC_i_T1_pre => LdcIT1Pre::format(instr, fmt, output, config),
Code::LDC_i_T1_unind => LdcIT1Unind::format(instr, fmt, output, config),
Code::LDC_l_T1_off => LdcLT1Off::format(instr, fmt, output, config),
Code::LDC_l_T1_post => LdcLT1Post::format(instr, fmt, output, config),
Code::LDC_l_T1_pre => LdcLT1Pre::format(instr, fmt, output, config),
Code::LDC_l_T1_unind => LdcLT1Unind::format(instr, fmt, output, config),
Code::LDMDB_T1 => LdmdbT1::format(instr, fmt, output, config),
Code::LDM_T1 => LdmT1::format(instr, fmt, output, config),
Code::LDM_T2 => LdmT2::format(instr, fmt, output, config),
Code::LDRBT_T1 => LdrbtT1::format(instr, fmt, output, config),
Code::LDRB_i_T1 => LdrbIT1::format(instr, fmt, output, config),
Code::LDRB_i_T2 => LdrbIT2::format(instr, fmt, output, config),
Code::LDRB_i_T3_off => LdrbIT3Off::format(instr, fmt, output, config),
Code::LDRB_i_T3_post => LdrbIT3Post::format(instr, fmt, output, config),
Code::LDRB_i_T3_pre => LdrbIT3Pre::format(instr, fmt, output, config),
Code::LDRB_l_T1 => LdrbLT1::format(instr, fmt, output, config),
Code::LDRB_r_T1 => LdrbRT1::format(instr, fmt, output, config),
Code::LDRB_r_T2 => LdrbRT2::format(instr, fmt, output, config),
Code::LDRD_i_T1_off => LdrdIT1Off::format(instr, fmt, output, config),
Code::LDRD_i_T1_post => LdrdIT1Post::format(instr, fmt, output, config),
Code::LDRD_i_T1_pre => LdrdIT1Pre::format(instr, fmt, output, config),
Code::LDRD_l_T1_off => LdrdLT1Off::format(instr, fmt, output, config),
Code::LDRD_l_T1_post => LdrdLT1Post::format(instr, fmt, output, config),
Code::LDRD_l_T1_pre => LdrdLT1Pre::format(instr, fmt, output, config),
Code::LDREXB_T1 => LdrexbT1::format(instr, fmt, output, config),
Code::LDREXD_T1 => LdrexdT1::format(instr, fmt, output, config),
Code::LDREXH_T1 => LdrexhT1::format(instr, fmt, output, config),
Code::LDREX_T1 => LdrexT1::format(instr, fmt, output, config),
Code::LDRHT_T1 => LdrhtT1::format(instr, fmt, output, config),
Code::LDRH_i_T1 => LdrhIT1::format(instr, fmt, output, config),
Code::LDRH_i_T2 => LdrhIT2::format(instr, fmt, output, config),
Code::LDRH_i_T3_off => LdrhIT3Off::format(instr, fmt, output, config),
Code::LDRH_i_T3_post => LdrhIT3Post::format(instr, fmt, output, config),
Code::LDRH_i_T3_pre => LdrhIT3Pre::format(instr, fmt, output, config),
Code::LDRH_l_T1 => LdrhLT1::format(instr, fmt, output, config),
Code::LDRH_r_T1 => LdrhRT1::format(instr, fmt, output, config),
Code::LDRH_r_T2 => LdrhRT2::format(instr, fmt, output, config),
Code::LDRSBT_T1 => LdrsbtT1::format(instr, fmt, output, config),
Code::LDRSB_i_T1 => LdrsbIT1::format(instr, fmt, output, config),
Code::LDRSB_i_T2_off => LdrsbIT2Off::format(instr, fmt, output, config),
Code::LDRSB_i_T2_post => LdrsbIT2Post::format(instr, fmt, output, config),
Code::LDRSB_i_T2_pre => LdrsbIT2Pre::format(instr, fmt, output, config),
Code::LDRSB_l_T1 => LdrsbLT1::format(instr, fmt, output, config),
Code::LDRSB_r_T1 => LdrsbRT1::format(instr, fmt, output, config),
Code::LDRSB_r_T2 => LdrsbRT2::format(instr, fmt, output, config),
Code::LDRSHT_T1 => LdrshtT1::format(instr, fmt, output, config),
Code::LDRSH_i_T1 => LdrshIT1::format(instr, fmt, output, config),
Code::LDRSH_i_T2_off => LdrshIT2Off::format(instr, fmt, output, config),
Code::LDRSH_i_T2_post => LdrshIT2Post::format(instr, fmt, output, config),
Code::LDRSH_i_T2_pre => LdrshIT2Pre::format(instr, fmt, output, config),
Code::LDRSH_l_T1 => LdrshLT1::format(instr, fmt, output, config),
Code::LDRSH_r_T1 => LdrshRT1::format(instr, fmt, output, config),
Code::LDRSH_r_T2 => LdrshRT2::format(instr, fmt, output, config),
Code::LDRT_T1 => LdrtT1::format(instr, fmt, output, config),
Code::LDR_i_T1 => LdrIT1::format(instr, fmt, output, config),
Code::LDR_i_T2 => LdrIT2::format(instr, fmt, output, config),
Code::LDR_i_T3 => LdrIT3::format(instr, fmt, output, config),
Code::LDR_i_T4_off => LdrIT4Off::format(instr, fmt, output, config),
Code::LDR_i_T4_post => LdrIT4Post::format(instr, fmt, output, config),
Code::LDR_i_T4_pre => LdrIT4Pre::format(instr, fmt, output, config),
Code::LDR_l_T2 => LdrLT2::format(instr, fmt, output, config),
Code::LDR_r_T1 => LdrRT1::format(instr, fmt, output, config),
Code::LDR_r_T2 => LdrRT2::format(instr, fmt, output, config),
Code::LSLS_MOVS_r_T3 => LslsMovsRT3::format(instr, fmt, output, config),
Code::LSLS_MOVS_rr_T2 => LslsMovsRrT2::format(instr, fmt, output, config),
Code::LSLS_MOV_r_T2 => LslsMovRT2::format(instr, fmt, output, config),
Code::LSLS_MOV_rr_T1_LSL => LslsMovRrT1Lsl::format(instr, fmt, output, config),
Code::LSL_MOV_r_T2 => LslMovRT2::format(instr, fmt, output, config),
Code::LSL_MOV_r_T3 => LslMovRT3::format(instr, fmt, output, config),
Code::LSL_MOV_rr_T1_LSL => LslMovRrT1Lsl::format(instr, fmt, output, config),
Code::LSL_MOV_rr_T2 => LslMovRrT2::format(instr, fmt, output, config),
Code::LSRS_MOVS_r_T3 => LsrsMovsRT3::format(instr, fmt, output, config),
Code::LSRS_MOVS_rr_T2 => LsrsMovsRrT2::format(instr, fmt, output, config),
Code::LSRS_MOV_r_T2 => LsrsMovRT2::format(instr, fmt, output, config),
Code::LSRS_MOV_rr_T1_LSR => LsrsMovRrT1Lsr::format(instr, fmt, output, config),
Code::LSR_MOV_r_T2 => LsrMovRT2::format(instr, fmt, output, config),
Code::LSR_MOV_r_T3 => LsrMovRT3::format(instr, fmt, output, config),
Code::LSR_MOV_rr_T1_LSR => LsrMovRrT1Lsr::format(instr, fmt, output, config),
Code::LSR_MOV_rr_T2 => LsrMovRrT2::format(instr, fmt, output, config),
Code::MCRR_T1 => McrrT1::format(instr, fmt, output, config),
Code::MCR_T1 => McrT1::format(instr, fmt, output, config),
Code::MLA_T1 => MlaT1::format(instr, fmt, output, config),
Code::MLS_T1 => MlsT1::format(instr, fmt, output, config),
Code::MOVS_i_T2 => MovsIT2::format(instr, fmt, output, config),
Code::MOVS_r_T3 => MovsRT3::format(instr, fmt, output, config),
Code::MOVS_r_T3_RRX => MovsRT3Rrx::format(instr, fmt, output, config),
Code::MOVS_rr_T2 => MovsRrT2::format(instr, fmt, output, config),
Code::MOVT_T1 => MovtT1::format(instr, fmt, output, config),
Code::MOV_i_T1 => MovIT1::format(instr, fmt, output, config),
Code::MOV_i_T2 => MovIT2::format(instr, fmt, output, config),
Code::MOV_i_T3 => MovIT3::format(instr, fmt, output, config),
Code::MOV_r_T1 => MovRT1::format(instr, fmt, output, config),
Code::MOV_r_T2 => MovRT2::format(instr, fmt, output, config),
Code::MOV_r_T3 => MovRT3::format(instr, fmt, output, config),
Code::MOV_r_T3_RRX => MovRT3Rrx::format(instr, fmt, output, config),
Code::MOV_rr_T1_ASR => MovRrT1Asr::format(instr, fmt, output, config),
Code::MOV_rr_T1_LSL => MovRrT1Lsl::format(instr, fmt, output, config),
Code::MOV_rr_T1_LSR => MovRrT1Lsr::format(instr, fmt, output, config),
Code::MOV_rr_T1_ROR => MovRrT1Ror::format(instr, fmt, output, config),
Code::MOV_rr_T2 => MovRrT2::format(instr, fmt, output, config),
Code::MRC_T1 => MrcT1::format(instr, fmt, output, config),
Code::MRRC_T1 => MrrcT1::format(instr, fmt, output, config),
Code::MRS_T1_AS => MrsT1As::format(instr, fmt, output, config),
Code::MRS_br_T1_AS => MrsBrT1As::format(instr, fmt, output, config),
Code::MSR_br_T1_AS => MsrBrT1As::format(instr, fmt, output, config),
Code::MSR_r_T1_AS => MsrRT1As::format(instr, fmt, output, config),
Code::MUL_T1 => MulT1::format(instr, fmt, output, config),
Code::MUL_T2 => MulT2::format(instr, fmt, output, config),
Code::MVNS_i_T1 => MvnsIT1::format(instr, fmt, output, config),
Code::MVNS_r_T2 => MvnsRT2::format(instr, fmt, output, config),
Code::MVNS_r_T2_RRX => MvnsRT2Rrx::format(instr, fmt, output, config),
Code::MVN_i_T1 => MvnIT1::format(instr, fmt, output, config),
Code::MVN_r_T1 => MvnRT1::format(instr, fmt, output, config),
Code::MVN_r_T2 => MvnRT2::format(instr, fmt, output, config),
Code::MVN_r_T2_RRX => MvnRT2Rrx::format(instr, fmt, output, config),
Code::NOP_T1 => NopT1::format(instr, fmt, output, config),
Code::NOP_T2 => NopT2::format(instr, fmt, output, config),
Code::ORNS_i_T1 => OrnsIT1::format(instr, fmt, output, config),
Code::ORNS_r_T1 => OrnsRT1::format(instr, fmt, output, config),
Code::ORNS_r_T1_RRX => OrnsRT1Rrx::format(instr, fmt, output, config),
Code::ORN_i_T1 => OrnIT1::format(instr, fmt, output, config),
Code::ORN_r_T1 => OrnRT1::format(instr, fmt, output, config),
Code::ORN_r_T1_RRX => OrnRT1Rrx::format(instr, fmt, output, config),
Code::ORRS_i_T1 => OrrsIT1::format(instr, fmt, output, config),
Code::ORRS_r_T2 => OrrsRT2::format(instr, fmt, output, config),
Code::ORRS_r_T2_RRX => OrrsRT2Rrx::format(instr, fmt, output, config),
Code::ORR_i_T1 => OrrIT1::format(instr, fmt, output, config),
Code::ORR_r_T1 => OrrRT1::format(instr, fmt, output, config),
Code::ORR_r_T2 => OrrRT2::format(instr, fmt, output, config),
Code::ORR_r_T2_RRX => OrrRT2Rrx::format(instr, fmt, output, config),
Code::PKHBT_T1 => PkhbtT1::format(instr, fmt, output, config),
Code::PKHTB_T1 => PkhtbT1::format(instr, fmt, output, config),
Code::PLDW_i_T1 => PldwIT1::format(instr, fmt, output, config),
Code::PLDW_i_T2 => PldwIT2::format(instr, fmt, output, config),
Code::PLDW_r_T1 => PldwRT1::format(instr, fmt, output, config),
Code::PLD_i_T1 => PldIT1::format(instr, fmt, output, config),
Code::PLD_i_T2 => PldIT2::format(instr, fmt, output, config),
Code::PLD_l_T1 => PldLT1::format(instr, fmt, output, config),
Code::PLD_r_T1 => PldRT1::format(instr, fmt, output, config),
Code::PLI_i_T1 => PliIT1::format(instr, fmt, output, config),
Code::PLI_i_T2 => PliIT2::format(instr, fmt, output, config),
Code::PLI_i_T3 => PliIT3::format(instr, fmt, output, config),
Code::PLI_r_T1 => PliRT1::format(instr, fmt, output, config),
Code::POP_LDM_T2 => PopLdmT2::format(instr, fmt, output, config),
Code::POP_LDR_i_T4_post => PopLdrIT4Post::format(instr, fmt, output, config),
Code::POP_T1 => PopT1::format(instr, fmt, output, config),
Code::PSSBB_T1 => PssbbT1::format(instr, fmt, output, config),
Code::PUSH_STMDB_T1 => PushStmdbT1::format(instr, fmt, output, config),
Code::PUSH_STR_i_T4_pre => PushStrIT4Pre::format(instr, fmt, output, config),
Code::PUSH_T1 => PushT1::format(instr, fmt, output, config),
Code::QADD16_T1 => Qadd16T1::format(instr, fmt, output, config),
Code::QADD8_T1 => Qadd8T1::format(instr, fmt, output, config),
Code::QADD_T1 => QaddT1::format(instr, fmt, output, config),
Code::QASX_T1 => QasxT1::format(instr, fmt, output, config),
Code::QDADD_T1 => QdaddT1::format(instr, fmt, output, config),
Code::QDSUB_T1 => QdsubT1::format(instr, fmt, output, config),
Code::QSAX_T1 => QsaxT1::format(instr, fmt, output, config),
Code::QSUB16_T1 => Qsub16T1::format(instr, fmt, output, config),
Code::QSUB8_T1 => Qsub8T1::format(instr, fmt, output, config),
Code::QSUB_T1 => QsubT1::format(instr, fmt, output, config),
Code::RBIT_T1 => RbitT1::format(instr, fmt, output, config),
Code::REV16_T1 => Rev16T1::format(instr, fmt, output, config),
Code::REV16_T2 => Rev16T2::format(instr, fmt, output, config),
Code::REVSH_T1 => RevshT1::format(instr, fmt, output, config),
Code::REVSH_T2 => RevshT2::format(instr, fmt, output, config),
Code::REV_T1 => RevT1::format(instr, fmt, output, config),
Code::REV_T2 => RevT2::format(instr, fmt, output, config),
Code::RFE_T1_AS => RfeT1As::format(instr, fmt, output, config),
Code::RFE_T2_AS => RfeT2As::format(instr, fmt, output, config),
Code::RORS_MOVS_r_T3 => RorsMovsRT3::format(instr, fmt, output, config),
Code::RORS_MOVS_rr_T2 => RorsMovsRrT2::format(instr, fmt, output, config),
Code::RORS_MOV_rr_T1_ROR => RorsMovRrT1Ror::format(instr, fmt, output, config),
Code::ROR_MOV_r_T3 => RorMovRT3::format(instr, fmt, output, config),
Code::ROR_MOV_rr_T1_ROR => RorMovRrT1Ror::format(instr, fmt, output, config),
Code::ROR_MOV_rr_T2 => RorMovRrT2::format(instr, fmt, output, config),
Code::RRXS_MOVS_r_T3_RRX => RrxsMovsRT3Rrx::format(instr, fmt, output, config),
Code::RRX_MOV_r_T3_RRX => RrxMovRT3Rrx::format(instr, fmt, output, config),
Code::RSBS_i_T2 => RsbsIT2::format(instr, fmt, output, config),
Code::RSBS_r_T1 => RsbsRT1::format(instr, fmt, output, config),
Code::RSBS_r_T1_RRX => RsbsRT1Rrx::format(instr, fmt, output, config),
Code::RSB_i_T1 => RsbIT1::format(instr, fmt, output, config),
Code::RSB_i_T2 => RsbIT2::format(instr, fmt, output, config),
Code::RSB_r_T1 => RsbRT1::format(instr, fmt, output, config),
Code::RSB_r_T1_RRX => RsbRT1Rrx::format(instr, fmt, output, config),
Code::SADD16_T1 => Sadd16T1::format(instr, fmt, output, config),
Code::SADD8_T1 => Sadd8T1::format(instr, fmt, output, config),
Code::SASX_T1 => SasxT1::format(instr, fmt, output, config),
Code::SBCS_i_T1 => SbcsIT1::format(instr, fmt, output, config),
Code::SBCS_r_T2 => SbcsRT2::format(instr, fmt, output, config),
Code::SBCS_r_T2_RRX => SbcsRT2Rrx::format(instr, fmt, output, config),
Code::SBC_i_T1 => SbcIT1::format(instr, fmt, output, config),
Code::SBC_r_T1 => SbcRT1::format(instr, fmt, output, config),
Code::SBC_r_T2 => SbcRT2::format(instr, fmt, output, config),
Code::SBC_r_T2_RRX => SbcRT2Rrx::format(instr, fmt, output, config),
Code::SBFX_T1 => SbfxT1::format(instr, fmt, output, config),
Code::SB_T1 => SbT1::format(instr, fmt, output, config),
Code::SDIV_T1 => SdivT1::format(instr, fmt, output, config),
Code::SEL_T1 => SelT1::format(instr, fmt, output, config),
Code::SETEND_T1 => SetendT1::format(instr, fmt, output, config),
Code::SETPAN_T1 => SetpanT1::format(instr, fmt, output, config),
Code::SEVL_T1 => SevlT1::format(instr, fmt, output, config),
Code::SEVL_T2 => SevlT2::format(instr, fmt, output, config),
Code::SEV_T1 => SevT1::format(instr, fmt, output, config),
Code::SEV_T2 => SevT2::format(instr, fmt, output, config),
Code::SHADD16_T1 => Shadd16T1::format(instr, fmt, output, config),
Code::SHADD8_T1 => Shadd8T1::format(instr, fmt, output, config),
Code::SHASX_T1 => ShasxT1::format(instr, fmt, output, config),
Code::SHSAX_T1 => ShsaxT1::format(instr, fmt, output, config),
Code::SHSUB16_T1 => Shsub16T1::format(instr, fmt, output, config),
Code::SHSUB8_T1 => Shsub8T1::format(instr, fmt, output, config),
Code::SMC_T1_AS => SmcT1As::format(instr, fmt, output, config),
Code::SMLABB_T1 => SmlabbT1::format(instr, fmt, output, config),
Code::SMLABT_T1 => SmlabtT1::format(instr, fmt, output, config),
Code::SMLADX_T1 => SmladxT1::format(instr, fmt, output, config),
Code::SMLAD_T1 => SmladT1::format(instr, fmt, output, config),
Code::SMLALBB_T1 => SmlalbbT1::format(instr, fmt, output, config),
Code::SMLALBT_T1 => SmlalbtT1::format(instr, fmt, output, config),
Code::SMLALDX_T1 => SmlaldxT1::format(instr, fmt, output, config),
Code::SMLALD_T1 => SmlaldT1::format(instr, fmt, output, config),
Code::SMLALTB_T1 => SmlaltbT1::format(instr, fmt, output, config),
Code::SMLALTT_T1 => SmlalttT1::format(instr, fmt, output, config),
Code::SMLAL_T1 => SmlalT1::format(instr, fmt, output, config),
Code::SMLATB_T1 => SmlatbT1::format(instr, fmt, output, config),
Code::SMLATT_T1 => SmlattT1::format(instr, fmt, output, config),
Code::SMLAWB_T1 => SmlawbT1::format(instr, fmt, output, config),
Code::SMLAWT_T1 => SmlawtT1::format(instr, fmt, output, config),
Code::SMLSDX_T1 => SmlsdxT1::format(instr, fmt, output, config),
Code::SMLSD_T1 => SmlsdT1::format(instr, fmt, output, config),
Code::SMLSLDX_T1 => SmlsldxT1::format(instr, fmt, output, config),
Code::SMLSLD_T1 => SmlsldT1::format(instr, fmt, output, config),
Code::SMMLAR_T1 => SmmlarT1::format(instr, fmt, output, config),
Code::SMMLA_T1 => SmmlaT1::format(instr, fmt, output, config),
Code::SMMLSR_T1 => SmmlsrT1::format(instr, fmt, output, config),
Code::SMMLS_T1 => SmmlsT1::format(instr, fmt, output, config),
Code::SMMULR_T1 => SmmulrT1::format(instr, fmt, output, config),
Code::SMMUL_T1 => SmmulT1::format(instr, fmt, output, config),
Code::SMUADX_T1 => SmuadxT1::format(instr, fmt, output, config),
Code::SMUAD_T1 => SmuadT1::format(instr, fmt, output, config),
Code::SMULBB_T1 => SmulbbT1::format(instr, fmt, output, config),
Code::SMULBT_T1 => SmulbtT1::format(instr, fmt, output, config),
Code::SMULL_T1 => SmullT1::format(instr, fmt, output, config),
Code::SMULTB_T1 => SmultbT1::format(instr, fmt, output, config),
Code::SMULTT_T1 => SmulttT1::format(instr, fmt, output, config),
Code::SMULWB_T1 => SmulwbT1::format(instr, fmt, output, config),
Code::SMULWT_T1 => SmulwtT1::format(instr, fmt, output, config),
Code::SMUSDX_T1 => SmusdxT1::format(instr, fmt, output, config),
Code::SMUSD_T1 => SmusdT1::format(instr, fmt, output, config),
Code::SRS_T1_AS => SrsT1As::format(instr, fmt, output, config),
Code::SRS_T2_AS => SrsT2As::format(instr, fmt, output, config),
Code::SSAT16_T1 => Ssat16T1::format(instr, fmt, output, config),
Code::SSAT_T1_ASR => SsatT1Asr::format(instr, fmt, output, config),
Code::SSAT_T1_LSL => SsatT1Lsl::format(instr, fmt, output, config),
Code::SSAX_T1 => SsaxT1::format(instr, fmt, output, config),
Code::SSBB_T1 => SsbbT1::format(instr, fmt, output, config),
Code::SSUB16_T1 => Ssub16T1::format(instr, fmt, output, config),
Code::SSUB8_T1 => Ssub8T1::format(instr, fmt, output, config),
Code::STC_T1_off => StcT1Off::format(instr, fmt, output, config),
Code::STC_T1_post => StcT1Post::format(instr, fmt, output, config),
Code::STC_T1_pre => StcT1Pre::format(instr, fmt, output, config),
Code::STC_T1_unind => StcT1Unind::format(instr, fmt, output, config),
Code::STLB_T1 => StlbT1::format(instr, fmt, output, config),
Code::STLEXB_T1 => StlexbT1::format(instr, fmt, output, config),
Code::STLEXD_T1 => StlexdT1::format(instr, fmt, output, config),
Code::STLEXH_T1 => StlexhT1::format(instr, fmt, output, config),
Code::STLEX_T1 => StlexT1::format(instr, fmt, output, config),
Code::STLH_T1 => StlhT1::format(instr, fmt, output, config),
Code::STL_T1 => StlT1::format(instr, fmt, output, config),
Code::STMDB_T1 => StmdbT1::format(instr, fmt, output, config),
Code::STM_T1 => StmT1::format(instr, fmt, output, config),
Code::STM_T2 => StmT2::format(instr, fmt, output, config),
Code::STRBT_T1 => StrbtT1::format(instr, fmt, output, config),
Code::STRB_i_T1 => StrbIT1::format(instr, fmt, output, config),
Code::STRB_i_T2 => StrbIT2::format(instr, fmt, output, config),
Code::STRB_i_T3_offn => StrbIT3Offn::format(instr, fmt, output, config),
Code::STRB_i_T3_post => StrbIT3Post::format(instr, fmt, output, config),
Code::STRB_i_T3_pre => StrbIT3Pre::format(instr, fmt, output, config),
Code::STRB_r_T1 => StrbRT1::format(instr, fmt, output, config),
Code::STRB_r_T2 => StrbRT2::format(instr, fmt, output, config),
Code::STRD_i_T1_off => StrdIT1Off::format(instr, fmt, output, config),
Code::STRD_i_T1_post => StrdIT1Post::format(instr, fmt, output, config),
Code::STRD_i_T1_pre => StrdIT1Pre::format(instr, fmt, output, config),
Code::STREXB_T1 => StrexbT1::format(instr, fmt, output, config),
Code::STREXD_T1 => StrexdT1::format(instr, fmt, output, config),
Code::STREXH_T1 => StrexhT1::format(instr, fmt, output, config),
Code::STREX_T1 => StrexT1::format(instr, fmt, output, config),
Code::STRHT_T1 => StrhtT1::format(instr, fmt, output, config),
Code::STRH_i_T1 => StrhIT1::format(instr, fmt, output, config),
Code::STRH_i_T2 => StrhIT2::format(instr, fmt, output, config),
Code::STRH_i_T3_offn => StrhIT3Offn::format(instr, fmt, output, config),
Code::STRH_i_T3_post => StrhIT3Post::format(instr, fmt, output, config),
Code::STRH_i_T3_pre => StrhIT3Pre::format(instr, fmt, output, config),
Code::STRH_r_T1 => StrhRT1::format(instr, fmt, output, config),
Code::STRH_r_T2 => StrhRT2::format(instr, fmt, output, config),
Code::STRT_T1 => StrtT1::format(instr, fmt, output, config),
Code::STR_i_T1 => StrIT1::format(instr, fmt, output, config),
Code::STR_i_T2 => StrIT2::format(instr, fmt, output, config),
Code::STR_i_T3 => StrIT3::format(instr, fmt, output, config),
Code::STR_i_T4_off => StrIT4Off::format(instr, fmt, output, config),
Code::STR_i_T4_post => StrIT4Post::format(instr, fmt, output, config),
Code::STR_i_T4_pre => StrIT4Pre::format(instr, fmt, output, config),
Code::STR_r_T1 => StrRT1::format(instr, fmt, output, config),
Code::STR_r_T2 => StrRT2::format(instr, fmt, output, config),
Code::SUBS_PC_T5_AS => SubsPcT5As::format(instr, fmt, output, config),
Code::SUBS_SP_i_T2 => SubsSpIT2::format(instr, fmt, output, config),
Code::SUBS_SP_r_T1 => SubsSpRT1::format(instr, fmt, output, config),
Code::SUBS_SP_r_T1_RRX => SubsSpRT1Rrx::format(instr, fmt, output, config),
Code::SUBS_i_T3 => SubsIT3::format(instr, fmt, output, config),
Code::SUBS_r_T2 => SubsRT2::format(instr, fmt, output, config),
Code::SUBS_r_T2_RRX => SubsRT2Rrx::format(instr, fmt, output, config),
Code::SUB_ADR_T2 => SubAdrT2::format(instr, fmt, output, config),
Code::SUB_SP_i_T1 => SubSpIT1::format(instr, fmt, output, config),
Code::SUB_SP_i_T2 => SubSpIT2::format(instr, fmt, output, config),
Code::SUB_SP_i_T3 => SubSpIT3::format(instr, fmt, output, config),
Code::SUB_SP_r_T1 => SubSpRT1::format(instr, fmt, output, config),
Code::SUB_SP_r_T1_RRX => SubSpRT1Rrx::format(instr, fmt, output, config),
Code::SUB_i_T1 => SubIT1::format(instr, fmt, output, config),
Code::SUB_i_T2 => SubIT2::format(instr, fmt, output, config),
Code::SUB_i_T3 => SubIT3::format(instr, fmt, output, config),
Code::SUB_i_T4 => SubIT4::format(instr, fmt, output, config),
Code::SUB_r_T1 => SubRT1::format(instr, fmt, output, config),
Code::SUB_r_T2 => SubRT2::format(instr, fmt, output, config),
Code::SUB_r_T2_RRX => SubRT2Rrx::format(instr, fmt, output, config),
Code::SVC_T1 => SvcT1::format(instr, fmt, output, config),
Code::SXTAB16_T1 => Sxtab16T1::format(instr, fmt, output, config),
Code::SXTAB_T1 => SxtabT1::format(instr, fmt, output, config),
Code::SXTAH_T1 => SxtahT1::format(instr, fmt, output, config),
Code::SXTB16_T1 => Sxtb16T1::format(instr, fmt, output, config),
Code::SXTB_T1 => SxtbT1::format(instr, fmt, output, config),
Code::SXTB_T2 => SxtbT2::format(instr, fmt, output, config),
Code::SXTH_T1 => SxthT1::format(instr, fmt, output, config),
Code::SXTH_T2 => SxthT2::format(instr, fmt, output, config),
Code::TBB_T1 => TbbT1::format(instr, fmt, output, config),
Code::TBH_T1 => TbhT1::format(instr, fmt, output, config),
Code::TEQ_i_T1 => TeqIT1::format(instr, fmt, output, config),
Code::TEQ_r_T1 => TeqRT1::format(instr, fmt, output, config),
Code::TEQ_r_T1_RRX => TeqRT1Rrx::format(instr, fmt, output, config),
Code::TSB_T1 => TsbT1::format(instr, fmt, output, config),
Code::TST_i_T1 => TstIT1::format(instr, fmt, output, config),
Code::TST_r_T1 => TstRT1::format(instr, fmt, output, config),
Code::TST_r_T2 => TstRT2::format(instr, fmt, output, config),
Code::TST_r_T2_RRX => TstRT2Rrx::format(instr, fmt, output, config),
Code::UADD16_T1 => Uadd16T1::format(instr, fmt, output, config),
Code::UADD8_T1 => Uadd8T1::format(instr, fmt, output, config),
Code::UASX_T1 => UasxT1::format(instr, fmt, output, config),
Code::UBFX_T1 => UbfxT1::format(instr, fmt, output, config),
Code::UDF_T1 => UdfT1::format(instr, fmt, output, config),
Code::UDF_T2 => UdfT2::format(instr, fmt, output, config),
Code::UDIV_T1 => UdivT1::format(instr, fmt, output, config),
Code::UHADD16_T1 => Uhadd16T1::format(instr, fmt, output, config),
Code::UHADD8_T1 => Uhadd8T1::format(instr, fmt, output, config),
Code::UHASX_T1 => UhasxT1::format(instr, fmt, output, config),
Code::UHSAX_T1 => UhsaxT1::format(instr, fmt, output, config),
Code::UHSUB16_T1 => Uhsub16T1::format(instr, fmt, output, config),
Code::UHSUB8_T1 => Uhsub8T1::format(instr, fmt, output, config),
Code::UMAAL_T1 => UmaalT1::format(instr, fmt, output, config),
Code::UMLAL_T1 => UmlalT1::format(instr, fmt, output, config),
Code::UMULL_T1 => UmullT1::format(instr, fmt, output, config),
Code::UQADD16_T1 => Uqadd16T1::format(instr, fmt, output, config),
Code::UQADD8_T1 => Uqadd8T1::format(instr, fmt, output, config),
Code::UQASX_T1 => UqasxT1::format(instr, fmt, output, config),
Code::UQSAX_T1 => UqsaxT1::format(instr, fmt, output, config),
Code::UQSUB16_T1 => Uqsub16T1::format(instr, fmt, output, config),
Code::UQSUB8_T1 => Uqsub8T1::format(instr, fmt, output, config),
Code::USAD8_T1 => Usad8T1::format(instr, fmt, output, config),
Code::USADA8_T1 => Usada8T1::format(instr, fmt, output, config),
Code::USAT16_T1 => Usat16T1::format(instr, fmt, output, config),
Code::USAT_T1_ASR => UsatT1Asr::format(instr, fmt, output, config),
Code::USAT_T1_LSL => UsatT1Lsl::format(instr, fmt, output, config),
Code::USAX_T1 => UsaxT1::format(instr, fmt, output, config),
Code::USUB16_T1 => Usub16T1::format(instr, fmt, output, config),
Code::USUB8_T1 => Usub8T1::format(instr, fmt, output, config),
Code::UXTAB16_T1 => Uxtab16T1::format(instr, fmt, output, config),
Code::UXTAB_T1 => UxtabT1::format(instr, fmt, output, config),
Code::UXTAH_T1 => UxtahT1::format(instr, fmt, output, config),
Code::UXTB16_T1 => Uxtb16T1::format(instr, fmt, output, config),
Code::UXTB_T1 => UxtbT1::format(instr, fmt, output, config),
Code::UXTB_T2 => UxtbT2::format(instr, fmt, output, config),
Code::UXTH_T1 => UxthT1::format(instr, fmt, output, config),
Code::UXTH_T2 => UxthT2::format(instr, fmt, output, config),
Code::WFE_T1 => WfeT1::format(instr, fmt, output, config),
Code::WFE_T2 => WfeT2::format(instr, fmt, output, config),
Code::WFI_T1 => WfiT1::format(instr, fmt, output, config),
Code::WFI_T2 => WfiT2::format(instr, fmt, output, config),
Code::YIELD_T1 => YieldT1::format(instr, fmt, output, config),
Code::YIELD_T2 => YieldT2::format(instr, fmt, output, config),
}
}
}