pub enum Register {
A,
B,
C,
D,
IP,
SP,
R,
S,
E,
F,
G,
H,
}
Expand description
Variants§
A
General-purpose register. Available in user and kernel mode.
B
General-purpose register. Available in user and kernel mode.
C
General-purpose register. Available in user and kernel mode.
D
General-purpose register. Available in user and kernel mode.
IP
This register contains the instruction pointer, i.e. the address (plus 4 bytes due to pipelining) at which the current instruction resides. The branch and jump instructions (br jsr ret are the only way to modify this value when in userspace. This is the only register which is in actuality 24-bit wide to match the size of the ISA’s address space.
SP
This register contains the stack pointer, i.e. the address in memory where the top of the stack is currently located. The instructions push and pop modify this value when in userspace.
R
This register contains the return address of the last-called function call (through the instruction jsr) and is used by the ret instruction.
S
This register contains the status register which is encoded as follows.
0bNZCMPPPP-SSSSSSSS
, where N
is the negative bit, (when the result
of the ALU calculation is negative) Z
is the zero bit, (when the
result of the ALU calculation is zero), C
is the carry bit, (when
the ALU carries or overflows in a given integer calculation), M
is
the mode bit, which indicates whether the current process is in user
mode (0) or kernel mode. (1) P
s designate the current process id,
which is important for controlling access to segments of memory, and
S
designates the currently accessed segment in memory.
E
General-purpose register. Available only in user mode.
F
General-purpose register. Available only in user mode.
G
General-purpose register. Available only in user mode.
H
General-purpose register. Available only in user mode.