cfavml 0.2.0

CF's Accelerated Vector Math Library providing SIMD optimzied routines for vector operations
Documentation 
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#![allow(clippy::missing_transmute_annotations)]

mod core_simd_api;
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
mod impl_avx2;
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
mod impl_avx2fma;
#[cfg(all(any(target_arch = "x86", target_arch = "x86_64"), feature = "nightly"))]
mod impl_avx512;
mod impl_fallback;
#[cfg(target_arch = "aarch64")]
mod impl_neon;
mod op_cosine;
mod op_dot;
mod op_euclidean;
mod op_max;
mod op_min;
mod op_norm;
mod op_sum;
mod op_vector_x_value;
mod op_vector_x_vector;

pub mod export_agg_ops;
pub mod export_arithmetic_ops;
pub mod export_cmp_ops;
pub mod export_distance_ops;
#[cfg(test)]
mod impl_test;
#[cfg(test)]
mod test_suite;

pub use self::core_simd_api::{DenseLane, SimdRegister};
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
pub use self::impl_avx2::*;
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
pub use self::impl_avx2fma::*;
#[cfg(all(any(target_arch = "x86", target_arch = "x86_64"), feature = "nightly"))]
pub use self::impl_avx512::*;
pub use self::impl_fallback::*;
#[cfg(target_arch = "aarch64")]
pub use self::impl_neon::*;
#[cfg(test)]
pub(crate) use self::op_cosine::cosine;
pub use self::op_cosine::generic_cosine;
pub use self::op_dot::generic_dot;
pub use self::op_euclidean::generic_squared_euclidean;
pub use self::op_max::{generic_max_horizontal, generic_max_value, generic_max_vector};
pub use self::op_min::{generic_min_horizontal, generic_min_value, generic_min_vector};
pub use self::op_norm::generic_squared_norm;
pub use self::op_sum::generic_sum;
pub use self::op_vector_x_value::{
    generic_add_value,
    generic_div_value,
    generic_mul_value,
    generic_sub_value,
};
pub use self::op_vector_x_vector::{
    generic_add_vector,
    generic_div_vector,
    generic_mul_vector,
    generic_sub_vector,
};

#[allow(non_snake_case)]
pub(crate) const fn _MM_SHUFFLE(z: u32, y: u32, x: u32, w: u32) -> i32 {
    ((z << 6) | (y << 4) | (x << 2) | w) as i32
}