celox 0.4.1

Celox HDL Simulator
Documentation 
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[package]
name                  = "celox"
version.workspace     = true
publish               = ["crates-io"]
authors.workspace     = true
repository.workspace  = true
license.workspace     = true
description.workspace = true
readme                = "README.md"
edition.workspace     = true
rust-version.workspace = true

[features]
default = ["host-runtime"]
host-runtime = [
    "dep:celox-backend-cranelift",
    "dep:celox-backend-x86",
    "dep:celox-macros",
    "dep:wasmtime",
    "dep:veryl-component-sys",
    "dep:libloading",
    "rand/thread_rng",
    "celox-sir-opt/timing",
]
systemverilog = ["dep:celox-frontend-sv"]
arm64-codegen = ["host-runtime", "dep:celox-backend-arm64"]
x86_64-codegen = [
    "host-runtime",
    "dep:celox-backend-x86",
    "celox-backend-x86/cross-codegen",
]

[dependencies]
toml                  = { workspace = true }
veryl-analyzer        = { workspace = true }
veryl-metadata        = { workspace = true }
veryl-parser          = { workspace = true }
veryl-path            = { workspace = true }
veryl-component-sys   = { version = "0.1.1", optional = true }
libloading            = { version = "0.9", optional = true }
celox-analysis        = { workspace = true }
celox-backend-wasm    = { workspace = true }
celox-design          = { workspace = true }
celox-frontend-core   = { workspace = true }
celox-frontend-sdk    = { workspace = true }
celox-frontend-sv     = { workspace = true, optional = true }
celox-frontend-veryl  = { workspace = true }
celox-sir             = { workspace = true }
celox-sir-opt         = { workspace = true, default-features = false }
celox-slt             = { workspace = true }
celox-state-layout    = { workspace = true }
celox-runtime         = { workspace = true }
celox-testbench       = { workspace = true }
fxhash                = { workspace = true }
thiserror             = { workspace = true }
clap                  = { workspace = true }
miette                = { workspace = true }
num-bigint            = "0.5"
rand                  = { workspace = true }
rand_pcg              = { workspace = true }
serde                 = { workspace = true }
serde_json            = { workspace = true }
postcard              = { version = "1.1", features = ["alloc"] }
num-traits            = { workspace = true }
bit-set               = { workspace = true }
itertools             = { workspace = true }
tracing               = { workspace = true }
celox-macros          = { workspace = true, optional = true }
celox-backend-cranelift = { workspace = true, optional = true }
celox-backend-arm64   = { workspace = true, optional = true }
wasmtime              = { version = "48", optional = true }

[target.'cfg(any(target_arch = "x86_64", target_arch = "aarch64"))'.dependencies]
celox-backend-x86     = { workspace = true, optional = true }

[target.'cfg(target_arch = "x86_64")'.dependencies]
celox-sir-opt         = { workspace = true, default-features = false, features = ["wide-native-memory"] }

[target.'cfg(target_arch = "aarch64")'.dependencies]
celox-backend-arm64   = { workspace = true }

[dev-dependencies]
insta      = "1.46"
criterion  = "0.8"
codspeed-criterion-compat = "5.0.1"
proptest   = "1.10"
test-case  = "3"
tempfile.workspace = true
veryl-std = { workspace = true }
veryl-emitter = { workspace = true }
veryl-simulator = { workspace = true }

[[bench]]
name = "simulation"
harness = false

[[bench]]
name = "overhead"
harness = false

[[test]]
name = "systemverilog"
path = "tests/systemverilog.rs"
required-features = ["systemverilog"]

[[bench]]
name = "compilation"
harness = false
bench = false

[[example]]
name = "frontend_binary"
path = "examples/frontend_binary.rs"
required-features = ["host-runtime"]

[lints]
workspace = true