List of all items
Structs
- ADC
- CBP
- CCT
- CPUID
- CorePeripherals
- DCB
- DMA_CHAN00
- DMA_CHAN01
- DMA_CHAN02
- DMA_CHAN03
- DMA_CHAN04
- DMA_CHAN05
- DMA_CHAN06
- DMA_CHAN07
- DMA_CHAN08
- DMA_CHAN09
- DMA_CHAN10
- DMA_CHAN11
- DMA_MAIN
- DWT
- ECIA
- EC_REG_BANK
- FPB
- GCR
- GPIO
- HTM0
- HTM1
- I2C0
- I2C1
- I2C2
- ITM
- LED0
- LED1
- MPU
- NVIC
- PCR
- PWM0
- PWM2
- PWM3
- PWM5
- PWM6
- PWM7
- Peripherals
- QMSPI
- RTC
- RTOS
- SCB
- SMB0
- SMB1
- SMB2
- SMB3
- SMB4
- SYST
- SYSTEM_CONTROL
- SYS_TICK
- TACH0
- TACH1
- TFDP
- TIMER16_0
- TIMER16_1
- TIMER32_0
- TIMER32_1
- TPIU
- UART0
- UART1
- UART2
- VBAT
- VBAT_RAM
- VCI
- WDT
- WEEK
- adc::RegisterBlock
- adc::cfg::CFG_SPEC
- adc::cfg::R
- adc::cfg::W
- adc::chan_rd::CHAN_RD_SPEC
- adc::chan_rd::R
- adc::chan_rd::W
- adc::chan_sts::CHAN_STS_SPEC
- adc::chan_sts::R
- adc::chan_sts::W
- adc::ctrl::CTRL_SPEC
- adc::ctrl::R
- adc::ctrl::W
- adc::delay::DELAY_SPEC
- adc::delay::R
- adc::delay::W
- adc::rept_en::R
- adc::rept_en::REPT_EN_SPEC
- adc::rept_en::W
- adc::sar_cfg::R
- adc::sar_cfg::SAR_CFG_SPEC
- adc::sar_cfg::W
- adc::sar_ctrl::R
- adc::sar_ctrl::SAR_CTRL_SPEC
- adc::sar_ctrl::W
- adc::sng_en::R
- adc::sng_en::SNG_EN_SPEC
- adc::sng_en::W
- adc::vref_chan::R
- adc::vref_chan::VREF_CHAN_SPEC
- adc::vref_chan::W
- adc::vref_ctrl::R
- adc::vref_ctrl::VREF_CTRL_SPEC
- adc::vref_ctrl::W
- cct::RegisterBlock
- cct::cap0::CAP0_SPEC
- cct::cap0::R
- cct::cap0::W
- cct::cap0_ctrl::CAP0_CTRL_SPEC
- cct::cap0_ctrl::R
- cct::cap0_ctrl::W
- cct::cap1::CAP1_SPEC
- cct::cap1::R
- cct::cap1::W
- cct::cap1_ctrl::CAP1_CTRL_SPEC
- cct::cap1_ctrl::R
- cct::cap1_ctrl::W
- cct::cap2::CAP2_SPEC
- cct::cap2::R
- cct::cap2::W
- cct::cap3::CAP3_SPEC
- cct::cap3::R
- cct::cap3::W
- cct::cap4::CAP4_SPEC
- cct::cap4::R
- cct::cap4::W
- cct::cap5::CAP5_SPEC
- cct::cap5::R
- cct::cap5::W
- cct::comp0::COMP0_SPEC
- cct::comp0::R
- cct::comp0::W
- cct::comp1::COMP1_SPEC
- cct::comp1::R
- cct::comp1::W
- cct::ctrl::CTRL_SPEC
- cct::ctrl::R
- cct::ctrl::W
- cct::free_run::FREE_RUN_SPEC
- cct::free_run::R
- cct::free_run::W
- cct::mux_sel::MUX_SEL_SPEC
- cct::mux_sel::R
- cct::mux_sel::W
- dma_chan00::RegisterBlock
- dma_chan00::activate::ACTIVATE_SPEC
- dma_chan00::activate::R
- dma_chan00::activate::W
- dma_chan00::crc_data::CRC_DATA_SPEC
- dma_chan00::crc_data::R
- dma_chan00::crc_data::W
- dma_chan00::crc_en::CRC_EN_SPEC
- dma_chan00::crc_en::R
- dma_chan00::crc_en::W
- dma_chan00::crc_post_sts::CRC_POST_STS_SPEC
- dma_chan00::crc_post_sts::R
- dma_chan00::crc_post_sts::W
- dma_chan00::ctrl::CTRL_SPEC
- dma_chan00::ctrl::R
- dma_chan00::ctrl::W
- dma_chan00::dstart::DSTART_SPEC
- dma_chan00::dstart::R
- dma_chan00::dstart::W
- dma_chan00::ien::IEN_SPEC
- dma_chan00::ien::R
- dma_chan00::ien::W
- dma_chan00::ists::ISTS_SPEC
- dma_chan00::ists::R
- dma_chan00::ists::W
- dma_chan00::mend::MEND_SPEC
- dma_chan00::mend::R
- dma_chan00::mend::W
- dma_chan00::mstart::MSTART_SPEC
- dma_chan00::mstart::R
- dma_chan00::mstart::W
- dma_chan01::RegisterBlock
- dma_chan01::activate::ACTIVATE_SPEC
- dma_chan01::activate::R
- dma_chan01::activate::W
- dma_chan01::ctrl::CTRL_SPEC
- dma_chan01::ctrl::R
- dma_chan01::ctrl::W
- dma_chan01::dstart::DSTART_SPEC
- dma_chan01::dstart::R
- dma_chan01::dstart::W
- dma_chan01::fill_data::FILL_DATA_SPEC
- dma_chan01::fill_data::R
- dma_chan01::fill_data::W
- dma_chan01::fill_en::FILL_EN_SPEC
- dma_chan01::fill_en::R
- dma_chan01::fill_en::W
- dma_chan01::fill_sts::FILL_STS_SPEC
- dma_chan01::fill_sts::R
- dma_chan01::fill_sts::W
- dma_chan01::ien::IEN_SPEC
- dma_chan01::ien::R
- dma_chan01::ien::W
- dma_chan01::ists::ISTS_SPEC
- dma_chan01::ists::R
- dma_chan01::ists::W
- dma_chan01::mend::MEND_SPEC
- dma_chan01::mend::R
- dma_chan01::mend::W
- dma_chan01::mstart::MSTART_SPEC
- dma_chan01::mstart::R
- dma_chan01::mstart::W
- dma_chan02::RegisterBlock
- dma_chan02::activate::ACTIVATE_SPEC
- dma_chan02::activate::R
- dma_chan02::activate::W
- dma_chan02::ctrl::CTRL_SPEC
- dma_chan02::ctrl::R
- dma_chan02::ctrl::W
- dma_chan02::dstart::DSTART_SPEC
- dma_chan02::dstart::R
- dma_chan02::dstart::W
- dma_chan02::ien::IEN_SPEC
- dma_chan02::ien::R
- dma_chan02::ien::W
- dma_chan02::ists::ISTS_SPEC
- dma_chan02::ists::R
- dma_chan02::ists::W
- dma_chan02::mend::MEND_SPEC
- dma_chan02::mend::R
- dma_chan02::mend::W
- dma_chan02::mstart::MSTART_SPEC
- dma_chan02::mstart::R
- dma_chan02::mstart::W
- dma_main::RegisterBlock
- dma_main::actrst::ACTRST_SPEC
- dma_main::actrst::R
- dma_main::actrst::W
- dma_main::data_pkt::DATA_PKT_SPEC
- dma_main::data_pkt::R
- ec_reg_bank::RegisterBlock
- ec_reg_bank::aesh_bswap_ctrl::AESH_BSWAP_CTRL_SPEC
- ec_reg_bank::aesh_bswap_ctrl::R
- ec_reg_bank::aesh_bswap_ctrl::W
- ec_reg_bank::ahb_err_addr::AHB_ERR_ADDR_SPEC
- ec_reg_bank::ahb_err_addr::R
- ec_reg_bank::ahb_err_addr::W
- ec_reg_bank::ahb_err_ctrl::AHB_ERR_CTRL_SPEC
- ec_reg_bank::ahb_err_ctrl::R
- ec_reg_bank::ahb_err_ctrl::W
- ec_reg_bank::brom_sts::BROM_STS_SPEC
- ec_reg_bank::brom_sts::R
- ec_reg_bank::brom_sts::W
- ec_reg_bank::crypto_srst::CRYPTO_SRST_SPEC
- ec_reg_bank::crypto_srst::R
- ec_reg_bank::crypto_srst::W
- ec_reg_bank::debug_ctrl::DEBUG_CTRL_SPEC
- ec_reg_bank::debug_ctrl::R
- ec_reg_bank::debug_ctrl::W
- ec_reg_bank::etm_ctrl::ETM_CTRL_SPEC
- ec_reg_bank::etm_ctrl::R
- ec_reg_bank::etm_ctrl::W
- ec_reg_bank::fw_scr0::FW_SCR0_SPEC
- ec_reg_bank::fw_scr0::R
- ec_reg_bank::fw_scr0::W
- ec_reg_bank::fw_scr1::FW_SCR1_SPEC
- ec_reg_bank::fw_scr1::R
- ec_reg_bank::fw_scr1::W
- ec_reg_bank::fw_scr2::FW_SCR2_SPEC
- ec_reg_bank::fw_scr2::R
- ec_reg_bank::fw_scr2::W
- ec_reg_bank::fw_scr3::FW_SCR3_SPEC
- ec_reg_bank::fw_scr3::R
- ec_reg_bank::fw_scr3::W
- ec_reg_bank::gpio_bank_pwr::GPIO_BANK_PWR_SPEC
- ec_reg_bank::gpio_bank_pwr::R
- ec_reg_bank::gpio_bank_pwr::W
- ec_reg_bank::intr_ctrl::INTR_CTRL_SPEC
- ec_reg_bank::intr_ctrl::R
- ec_reg_bank::intr_ctrl::W
- ec_reg_bank::jtag_mcfg::JTAG_MCFG_SPEC
- ec_reg_bank::jtag_mcfg::R
- ec_reg_bank::jtag_mcfg::W
- ec_reg_bank::jtag_mcmd::JTAG_MCMD_SPEC
- ec_reg_bank::jtag_mcmd::R
- ec_reg_bank::jtag_mcmd::W
- ec_reg_bank::jtag_msts::JTAG_MSTS_SPEC
- ec_reg_bank::jtag_msts::R
- ec_reg_bank::jtag_mtdi::JTAG_MTDI_SPEC
- ec_reg_bank::jtag_mtdi::R
- ec_reg_bank::jtag_mtdi::W
- ec_reg_bank::jtag_mtdo::JTAG_MTDO_SPEC
- ec_reg_bank::jtag_mtdo::R
- ec_reg_bank::jtag_mtdo::W
- ec_reg_bank::jtag_mtms::JTAG_MTMS_SPEC
- ec_reg_bank::jtag_mtms::R
- ec_reg_bank::jtag_mtms::W
- ec_reg_bank::otp_lock::OTP_LOCK_SPEC
- ec_reg_bank::otp_lock::R
- ec_reg_bank::otp_lock::W
- ec_reg_bank::peci_dis::PECI_DIS_SPEC
- ec_reg_bank::peci_dis::R
- ec_reg_bank::peci_dis::W
- ec_reg_bank::stap_tmir::R
- ec_reg_bank::stap_tmir::STAP_TMIR_SPEC
- ec_reg_bank::wdt_cnt::R
- ec_reg_bank::wdt_cnt::W
- ec_reg_bank::wdt_cnt::WDT_CNT_SPEC
- ecia::RegisterBlock
- ecia::blk_en_clr::BLK_EN_CLR_SPEC
- ecia::blk_en_clr::R
- ecia::blk_en_clr::W
- ecia::blk_en_set::BLK_EN_SET_SPEC
- ecia::blk_en_set::R
- ecia::blk_en_set::W
- ecia::blk_irq_vtor::BLK_IRQ_VTOR_SPEC
- ecia::blk_irq_vtor::R
- ecia::en_clr10::EN_CLR10_SPEC
- ecia::en_clr10::R
- ecia::en_clr10::W
- ecia::en_clr11::EN_CLR11_SPEC
- ecia::en_clr11::R
- ecia::en_clr11::W
- ecia::en_clr12::EN_CLR12_SPEC
- ecia::en_clr12::R
- ecia::en_clr12::W
- ecia::en_clr13::EN_CLR13_SPEC
- ecia::en_clr13::R
- ecia::en_clr13::W
- ecia::en_clr14::EN_CLR14_SPEC
- ecia::en_clr14::R
- ecia::en_clr14::W
- ecia::en_clr15::EN_CLR15_SPEC
- ecia::en_clr15::R
- ecia::en_clr15::W
- ecia::en_clr16::EN_CLR16_SPEC
- ecia::en_clr16::R
- ecia::en_clr16::W
- ecia::en_clr17::EN_CLR17_SPEC
- ecia::en_clr17::R
- ecia::en_clr17::W
- ecia::en_clr18::EN_CLR18_SPEC
- ecia::en_clr18::R
- ecia::en_clr18::W
- ecia::en_clr19::EN_CLR19_SPEC
- ecia::en_clr19::R
- ecia::en_clr19::W
- ecia::en_clr20::EN_CLR20_SPEC
- ecia::en_clr20::R
- ecia::en_clr20::W
- ecia::en_clr21::EN_CLR21_SPEC
- ecia::en_clr21::R
- ecia::en_clr21::W
- ecia::en_clr22::EN_CLR22_SPEC
- ecia::en_clr22::R
- ecia::en_clr22::W
- ecia::en_clr23::EN_CLR23_SPEC
- ecia::en_clr23::R
- ecia::en_clr23::W
- ecia::en_clr24::EN_CLR24_SPEC
- ecia::en_clr24::R
- ecia::en_clr24::W
- ecia::en_clr25::EN_CLR25_SPEC
- ecia::en_clr25::R
- ecia::en_clr25::W
- ecia::en_clr26::EN_CLR26_SPEC
- ecia::en_clr26::R
- ecia::en_clr26::W
- ecia::en_clr8::EN_CLR8_SPEC
- ecia::en_clr8::R
- ecia::en_clr8::W
- ecia::en_clr9::EN_CLR9_SPEC
- ecia::en_clr9::R
- ecia::en_clr9::W
- ecia::en_set10::EN_SET10_SPEC
- ecia::en_set10::R
- ecia::en_set10::W
- ecia::en_set11::EN_SET11_SPEC
- ecia::en_set11::R
- ecia::en_set11::W
- ecia::en_set12::EN_SET12_SPEC
- ecia::en_set12::R
- ecia::en_set12::W
- ecia::en_set13::EN_SET13_SPEC
- ecia::en_set13::R
- ecia::en_set13::W
- ecia::en_set14::EN_SET14_SPEC
- ecia::en_set14::R
- ecia::en_set14::W
- ecia::en_set15::EN_SET15_SPEC
- ecia::en_set15::R
- ecia::en_set15::W
- ecia::en_set16::EN_SET16_SPEC
- ecia::en_set16::R
- ecia::en_set16::W
- ecia::en_set17::EN_SET17_SPEC
- ecia::en_set17::R
- ecia::en_set17::W
- ecia::en_set18::EN_SET18_SPEC
- ecia::en_set18::R
- ecia::en_set18::W
- ecia::en_set19::EN_SET19_SPEC
- ecia::en_set19::R
- ecia::en_set19::W
- ecia::en_set20::EN_SET20_SPEC
- ecia::en_set20::R
- ecia::en_set20::W
- ecia::en_set21::EN_SET21_SPEC
- ecia::en_set21::R
- ecia::en_set21::W
- ecia::en_set22::EN_SET22_SPEC
- ecia::en_set22::R
- ecia::en_set22::W
- ecia::en_set23::EN_SET23_SPEC
- ecia::en_set23::R
- ecia::en_set23::W
- ecia::en_set24::EN_SET24_SPEC
- ecia::en_set24::R
- ecia::en_set24::W
- ecia::en_set25::EN_SET25_SPEC
- ecia::en_set25::R
- ecia::en_set25::W
- ecia::en_set26::EN_SET26_SPEC
- ecia::en_set26::R
- ecia::en_set26::W
- ecia::en_set8::EN_SET8_SPEC
- ecia::en_set8::R
- ecia::en_set8::W
- ecia::en_set9::EN_SET9_SPEC
- ecia::en_set9::R
- ecia::en_set9::W
- ecia::result10::R
- ecia::result10::RESULT10_SPEC
- ecia::result11::R
- ecia::result11::RESULT11_SPEC
- ecia::result12::R
- ecia::result12::RESULT12_SPEC
- ecia::result13::R
- ecia::result13::RESULT13_SPEC
- ecia::result14::R
- ecia::result14::RESULT14_SPEC
- ecia::result15::R
- ecia::result15::RESULT15_SPEC
- ecia::result16::R
- ecia::result16::RESULT16_SPEC
- ecia::result17::R
- ecia::result17::RESULT17_SPEC
- ecia::result18::R
- ecia::result18::RESULT18_SPEC
- ecia::result19::R
- ecia::result19::RESULT19_SPEC
- ecia::result20::R
- ecia::result20::RESULT20_SPEC
- ecia::result21::R
- ecia::result21::RESULT21_SPEC
- ecia::result22::R
- ecia::result22::RESULT22_SPEC
- ecia::result23::R
- ecia::result23::RESULT23_SPEC
- ecia::result24::R
- ecia::result24::RESULT24_SPEC
- ecia::result25::R
- ecia::result25::RESULT25_SPEC
- ecia::result26::R
- ecia::result26::RESULT26_SPEC
- ecia::result8::R
- ecia::result8::RESULT8_SPEC
- ecia::result9::R
- ecia::result9::RESULT9_SPEC
- ecia::src10::R
- ecia::src10::SRC10_SPEC
- ecia::src10::W
- ecia::src11::R
- ecia::src11::SRC11_SPEC
- ecia::src11::W
- ecia::src12::R
- ecia::src12::SRC12_SPEC
- ecia::src12::W
- ecia::src13::R
- ecia::src13::SRC13_SPEC
- ecia::src13::W
- ecia::src14::R
- ecia::src14::SRC14_SPEC
- ecia::src14::W
- ecia::src15::R
- ecia::src15::SRC15_SPEC
- ecia::src15::W
- ecia::src16::R
- ecia::src16::SRC16_SPEC
- ecia::src16::W
- ecia::src17::R
- ecia::src17::SRC17_SPEC
- ecia::src17::W
- ecia::src18::R
- ecia::src18::SRC18_SPEC
- ecia::src18::W
- ecia::src19::R
- ecia::src19::SRC19_SPEC
- ecia::src19::W
- ecia::src20::R
- ecia::src20::SRC20_SPEC
- ecia::src20::W
- ecia::src21::R
- ecia::src21::SRC21_SPEC
- ecia::src21::W
- ecia::src22::R
- ecia::src22::SRC22_SPEC
- ecia::src22::W
- ecia::src23::R
- ecia::src23::SRC23_SPEC
- ecia::src23::W
- ecia::src24::R
- ecia::src24::SRC24_SPEC
- ecia::src24::W
- ecia::src25::R
- ecia::src25::SRC25_SPEC
- ecia::src25::W
- ecia::src26::R
- ecia::src26::SRC26_SPEC
- ecia::src26::W
- ecia::src8::R
- ecia::src8::SRC8_SPEC
- ecia::src8::W
- ecia::src9::R
- ecia::src9::SRC9_SPEC
- ecia::src9::W
- gcr::RegisterBlock
- gcr::dev_id::DEV_ID_SPEC
- gcr::dev_id::R
- gcr::dev_rev::DEV_REV_SPEC
- gcr::dev_rev::R
- gcr::dev_subid::DEV_SUBID_SPEC
- gcr::dev_subid::R
- gcr::ldn::LDN_SPEC
- gcr::ldn::R
- gcr::ldn::W
- gcr::leg_dev_id::LEG_DEV_ID_SPEC
- gcr::leg_dev_id::R
- gcr::leg_dev_rev::LEG_DEV_REV_SPEC
- gcr::leg_dev_rev::R
- generic::ArrayProxy
- generic::R
- generic::Reg
- generic::W
- gpio::RegisterBlock
- gpio::ctrl0::CTRL0_SPEC
- gpio::ctrl0::R
- gpio::ctrl0::W
- gpio::ctrl10::CTRL10_SPEC
- gpio::ctrl10::R
- gpio::ctrl10::W
- gpio::ctrl11::CTRL11_SPEC
- gpio::ctrl11::R
- gpio::ctrl11::W
- gpio::ctrl12::CTRL12_SPEC
- gpio::ctrl12::R
- gpio::ctrl12::W
- gpio::ctrl13::CTRL13_SPEC
- gpio::ctrl13::R
- gpio::ctrl13::W
- gpio::ctrl14::CTRL14_SPEC
- gpio::ctrl14::R
- gpio::ctrl14::W
- gpio::ctrl15::CTRL15_SPEC
- gpio::ctrl15::R
- gpio::ctrl15::W
- gpio::ctrl16::CTRL16_SPEC
- gpio::ctrl16::R
- gpio::ctrl16::W
- gpio::ctrl17::CTRL17_SPEC
- gpio::ctrl17::R
- gpio::ctrl17::W
- gpio::ctrl1::CTRL1_SPEC
- gpio::ctrl1::R
- gpio::ctrl1::W
- gpio::ctrl20::CTRL20_SPEC
- gpio::ctrl20::R
- gpio::ctrl20::W
- gpio::ctrl21::CTRL21_SPEC
- gpio::ctrl21::R
- gpio::ctrl21::W
- gpio::ctrl22::CTRL22_SPEC
- gpio::ctrl22::R
- gpio::ctrl22::W
- gpio::ctrl23::CTRL23_SPEC
- gpio::ctrl23::R
- gpio::ctrl23::W
- gpio::ctrl24::CTRL24_SPEC
- gpio::ctrl24::R
- gpio::ctrl24::W
- gpio::ctrl25::CTRL25_SPEC
- gpio::ctrl25::R
- gpio::ctrl25::W
- gpio::ctrl26::CTRL26_SPEC
- gpio::ctrl26::R
- gpio::ctrl26::W
- gpio::ctrl2::CTRL2_SPEC
- gpio::ctrl2::R
- gpio::ctrl2::W
- gpio::ctrl2p0::CTRL2P0_SPEC
- gpio::ctrl2p0::R
- gpio::ctrl2p0::W
- gpio::ctrl2p10::CTRL2P10_SPEC
- gpio::ctrl2p10::R
- gpio::ctrl2p10::W
- gpio::ctrl2p11::CTRL2P11_SPEC
- gpio::ctrl2p11::R
- gpio::ctrl2p11::W
- gpio::ctrl2p12::CTRL2P12_SPEC
- gpio::ctrl2p12::R
- gpio::ctrl2p12::W
- gpio::ctrl2p13::CTRL2P13_SPEC
- gpio::ctrl2p13::R
- gpio::ctrl2p13::W
- gpio::ctrl2p14::CTRL2P14_SPEC
- gpio::ctrl2p14::R
- gpio::ctrl2p14::W
- gpio::ctrl2p15::CTRL2P15_SPEC
- gpio::ctrl2p15::R
- gpio::ctrl2p15::W
- gpio::ctrl2p16::CTRL2P16_SPEC
- gpio::ctrl2p16::R
- gpio::ctrl2p16::W
- gpio::ctrl2p17::CTRL2P17_SPEC
- gpio::ctrl2p17::R
- gpio::ctrl2p17::W
- gpio::ctrl2p1::CTRL2P1_SPEC
- gpio::ctrl2p1::R
- gpio::ctrl2p1::W
- gpio::ctrl2p20::CTRL2P20_SPEC
- gpio::ctrl2p20::R
- gpio::ctrl2p20::W
- gpio::ctrl2p21::CTRL2P21_SPEC
- gpio::ctrl2p21::R
- gpio::ctrl2p21::W
- gpio::ctrl2p22::CTRL2P22_SPEC
- gpio::ctrl2p22::R
- gpio::ctrl2p22::W
- gpio::ctrl2p23::CTRL2P23_SPEC
- gpio::ctrl2p23::R
- gpio::ctrl2p23::W
- gpio::ctrl2p24::CTRL2P24_SPEC
- gpio::ctrl2p24::R
- gpio::ctrl2p24::W
- gpio::ctrl2p25::CTRL2P25_SPEC
- gpio::ctrl2p25::R
- gpio::ctrl2p25::W
- gpio::ctrl2p26::CTRL2P26_SPEC
- gpio::ctrl2p26::R
- gpio::ctrl2p26::W
- gpio::ctrl2p2::CTRL2P2_SPEC
- gpio::ctrl2p2::R
- gpio::ctrl2p2::W
- gpio::ctrl2p3::CTRL2P3_SPEC
- gpio::ctrl2p3::R
- gpio::ctrl2p3::W
- gpio::ctrl2p4::CTRL2P4_SPEC
- gpio::ctrl2p4::R
- gpio::ctrl2p4::W
- gpio::ctrl2p5::CTRL2P5_SPEC
- gpio::ctrl2p5::R
- gpio::ctrl2p5::W
- gpio::ctrl2p6::CTRL2P6_SPEC
- gpio::ctrl2p6::R
- gpio::ctrl2p6::W
- gpio::ctrl2p7::CTRL2P7_SPEC
- gpio::ctrl2p7::R
- gpio::ctrl2p7::W
- gpio::ctrl3::CTRL3_SPEC
- gpio::ctrl3::R
- gpio::ctrl3::W
- gpio::ctrl4::CTRL4_SPEC
- gpio::ctrl4::R
- gpio::ctrl4::W
- gpio::ctrl5::CTRL5_SPEC
- gpio::ctrl5::R
- gpio::ctrl5::W
- gpio::ctrl6::CTRL6_SPEC
- gpio::ctrl6::R
- gpio::ctrl6::W
- gpio::ctrl7::CTRL7_SPEC
- gpio::ctrl7::R
- gpio::ctrl7::W
- gpio::parin::PARIN_SPEC
- gpio::parin::R
- gpio::parin::W
- gpio::parout::PAROUT_SPEC
- gpio::parout::R
- gpio::parout::W
- htm0::RegisterBlock
- htm0::cnt::CNT_SPEC
- htm0::cnt::R
- htm0::ctrl::CTRL_SPEC
- htm0::ctrl::R
- htm0::ctrl::W
- htm0::prld::PRLD_SPEC
- htm0::prld::R
- htm0::prld::W
- i2c0::RegisterBlock
- i2c0::bb_ctrl::BB_CTRL_SPEC
- i2c0::bb_ctrl::R
- i2c0::bb_ctrl::W
- i2c0::blkid::BLKID_SPEC
- i2c0::blkid::R
- i2c0::blkrev::BLKREV_SPEC
- i2c0::blkrev::R
- i2c0::busclk::BUSCLK_SPEC
- i2c0::busclk::R
- i2c0::busclk::W
- i2c0::cfg::CFG_SPEC
- i2c0::cfg::R
- i2c0::cfg::W
- i2c0::clksync::CLKSYNC_SPEC
- i2c0::clksync::R
- i2c0::compl::COMPL_SPEC
- i2c0::compl::R
- i2c0::compl::W
- i2c0::datatm::DATATM_SPEC
- i2c0::datatm::R
- i2c0::datatm::W
- i2c0::i2cdata::I2CDATA_SPEC
- i2c0::i2cdata::R
- i2c0::i2cdata::W
- i2c0::own_addr::OWN_ADDR_SPEC
- i2c0::own_addr::R
- i2c0::own_addr::W
- i2c0::prm_ctrl::PRM_CTRL_SPEC
- i2c0::prm_ctrl::R
- i2c0::prm_ctrl::W
- i2c0::prm_ien::PRM_IEN_SPEC
- i2c0::prm_ien::R
- i2c0::prm_ien::W
- i2c0::prm_sts::PRM_STS_SPEC
- i2c0::prm_sts::R
- i2c0::prm_sts::W
- i2c0::rshtm::R
- i2c0::rshtm::RSHTM_SPEC
- i2c0::rshtm::W
- i2c0::rsts::R
- i2c0::rsts::RSTS_SPEC
- i2c0::rsvd1::R
- i2c0::rsvd1::RSVD1_SPEC
- i2c0::rsvd2::R
- i2c0::rsvd2::RSVD2_SPEC
- i2c0::slv_addr::R
- i2c0::slv_addr::SLV_ADDR_SPEC
- i2c0::slv_addr::W
- i2c0::tmoutsc::R
- i2c0::tmoutsc::TMOUTSC_SPEC
- i2c0::tmoutsc::W
- i2c0::wake_en::R
- i2c0::wake_en::W
- i2c0::wake_en::WAKE_EN_SPEC
- i2c0::wake_sts::R
- i2c0::wake_sts::W
- i2c0::wake_sts::WAKE_STS_SPEC
- i2c0::wctrl::W
- i2c0::wctrl::WCTRL_SPEC
- led0::RegisterBlock
- led0::cfg::CFG_SPEC
- led0::cfg::R
- led0::cfg::W
- led0::dly::DLY_SPEC
- led0::dly::R
- led0::dly::W
- led0::intrvl::INTRVL_SPEC
- led0::intrvl::R
- led0::intrvl::W
- led0::limit::LIMIT_SPEC
- led0::limit::R
- led0::limit::W
- led0::outdly::OUTDLY_SPEC
- led0::outdly::R
- led0::outdly::W
- led0::step::R
- led0::step::STEP_SPEC
- led0::step::W
- pcr::RegisterBlock
- pcr::clk_req_0::CLK_REQ_0_SPEC
- pcr::clk_req_0::R
- pcr::clk_req_0::W
- pcr::clk_req_1::CLK_REQ_1_SPEC
- pcr::clk_req_1::R
- pcr::clk_req_1::W
- pcr::clk_req_2::CLK_REQ_2_SPEC
- pcr::clk_req_2::R
- pcr::clk_req_2::W
- pcr::clk_req_3::CLK_REQ_3_SPEC
- pcr::clk_req_3::R
- pcr::clk_req_3::W
- pcr::clk_req_4::CLK_REQ_4_SPEC
- pcr::clk_req_4::R
- pcr::clk_req_4::W
- pcr::lock_reg::LOCK_REG_SPEC
- pcr::lock_reg::R
- pcr::lock_reg::W
- pcr::osc_id::OSC_ID_SPEC
- pcr::osc_id::R
- pcr::osc_id::W
- pcr::proc_clk_ctrl::PROC_CLK_CTRL_SPEC
- pcr::proc_clk_ctrl::R
- pcr::proc_clk_ctrl::W
- pcr::pwr_rst_ctrl::PWR_RST_CTRL_SPEC
- pcr::pwr_rst_ctrl::R
- pcr::pwr_rst_ctrl::W
- pcr::pwr_rst_sts::PWR_RST_STS_SPEC
- pcr::pwr_rst_sts::R
- pcr::pwr_rst_sts::W
- pcr::rst_en_0::R
- pcr::rst_en_0::RST_EN_0_SPEC
- pcr::rst_en_0::W
- pcr::rst_en_1::R
- pcr::rst_en_1::RST_EN_1_SPEC
- pcr::rst_en_1::W
- pcr::rst_en_2::R
- pcr::rst_en_2::RST_EN_2_SPEC
- pcr::rst_en_2::W
- pcr::rst_en_3::R
- pcr::rst_en_3::RST_EN_3_SPEC
- pcr::rst_en_3::W
- pcr::rst_en_4::R
- pcr::rst_en_4::RST_EN_4_SPEC
- pcr::rst_en_4::W
- pcr::slow_clk_ctrl::R
- pcr::slow_clk_ctrl::SLOW_CLK_CTRL_SPEC
- pcr::slow_clk_ctrl::W
- pcr::slp_en_0::R
- pcr::slp_en_0::SLP_EN_0_SPEC
- pcr::slp_en_0::W
- pcr::slp_en_1::R
- pcr::slp_en_1::SLP_EN_1_SPEC
- pcr::slp_en_1::W
- pcr::slp_en_2::R
- pcr::slp_en_2::SLP_EN_2_SPEC
- pcr::slp_en_2::W
- pcr::slp_en_3::R
- pcr::slp_en_3::SLP_EN_3_SPEC
- pcr::slp_en_3::W
- pcr::slp_en_4::R
- pcr::slp_en_4::SLP_EN_4_SPEC
- pcr::slp_en_4::W
- pcr::sys_rst::R
- pcr::sys_rst::SYS_RST_SPEC
- pcr::sys_rst::W
- pcr::sys_slp_ctrl::R
- pcr::sys_slp_ctrl::SYS_SLP_CTRL_SPEC
- pcr::sys_slp_ctrl::W
- pwm0::RegisterBlock
- pwm0::cfg::CFG_SPEC
- pwm0::cfg::R
- pwm0::cfg::W
- pwm0::cnt_off::CNT_OFF_SPEC
- pwm0::cnt_off::R
- pwm0::cnt_off::W
- pwm0::cnt_on::CNT_ON_SPEC
- pwm0::cnt_on::R
- pwm0::cnt_on::W
- qmspi::RegisterBlock
- qmspi::buf_cnt_sts::BUF_CNT_STS_SPEC
- qmspi::buf_cnt_sts::R
- qmspi::buf_cnt_sts::W
- qmspi::buf_cnt_trig::BUF_CNT_TRIG_SPEC
- qmspi::buf_cnt_trig::R
- qmspi::buf_cnt_trig::W
- qmspi::cstm::CSTM_SPEC
- qmspi::cstm::R
- qmspi::cstm::W
- qmspi::ctrl::CTRL_SPEC
- qmspi::ctrl::R
- qmspi::ctrl::W
- qmspi::descr::DESCR_SPEC
- qmspi::descr::R
- qmspi::descr::W
- qmspi::exe::EXE_SPEC
- qmspi::exe::R
- qmspi::exe::W
- qmspi::ien::IEN_SPEC
- qmspi::ien::R
- qmspi::ien::W
- qmspi::ifctrl::IFCTRL_SPEC
- qmspi::ifctrl::R
- qmspi::ifctrl::W
- qmspi::mode::MODE_SPEC
- qmspi::mode::R
- qmspi::mode::W
- qmspi::rx_fifo::R
- qmspi::rx_fifo::RX_FIFO_SPEC
- qmspi::rx_fifo::W
- qmspi::sts::R
- qmspi::sts::STS_SPEC
- qmspi::sts::W
- qmspi::tx_fifo::R
- qmspi::tx_fifo::TX_FIFO_SPEC
- qmspi::tx_fifo::W
- rtc::RegisterBlock
- rtc::ctrl::CTRL_SPEC
- rtc::ctrl::R
- rtc::ctrl::W
- rtc::day_of_mon::DAY_OF_MON_SPEC
- rtc::day_of_mon::R
- rtc::day_of_mon::W
- rtc::day_of_wk::DAY_OF_WK_SPEC
- rtc::day_of_wk::R
- rtc::day_of_wk::W
- rtc::daylt_savb::DAYLT_SAVB_SPEC
- rtc::daylt_savb::R
- rtc::daylt_savb::W
- rtc::daylt_savf::DAYLT_SAVF_SPEC
- rtc::daylt_savf::R
- rtc::daylt_savf::W
- rtc::hr::HR_SPEC
- rtc::hr::R
- rtc::hr::W
- rtc::hr_alarm::HR_ALARM_SPEC
- rtc::hr_alarm::R
- rtc::hr_alarm::W
- rtc::min::MIN_SPEC
- rtc::min::R
- rtc::min::W
- rtc::min_alarm::MIN_ALARM_SPEC
- rtc::min_alarm::R
- rtc::min_alarm::W
- rtc::month::MONTH_SPEC
- rtc::month::R
- rtc::month::W
- rtc::rega::R
- rtc::rega::REGA_SPEC
- rtc::rega::W
- rtc::regb::R
- rtc::regb::REGB_SPEC
- rtc::regb::W
- rtc::regc::R
- rtc::regc::REGC_SPEC
- rtc::regc::W
- rtc::regd::R
- rtc::regd::REGD_SPEC
- rtc::regd::W
- rtc::sec::R
- rtc::sec::SEC_SPEC
- rtc::sec::W
- rtc::sec_alarm::R
- rtc::sec_alarm::SEC_ALARM_SPEC
- rtc::sec_alarm::W
- rtc::wk_alarm::R
- rtc::wk_alarm::W
- rtc::wk_alarm::WK_ALARM_SPEC
- rtc::year::R
- rtc::year::W
- rtc::year::YEAR_SPEC
- rtos::RegisterBlock
- rtos::cnt::CNT_SPEC
- rtos::cnt::R
- rtos::cnt::W
- rtos::ctrl::CTRL_SPEC
- rtos::ctrl::R
- rtos::ctrl::W
- rtos::prld::PRLD_SPEC
- rtos::prld::R
- rtos::prld::W
- rtos::softirq::SOFTIRQ_SPEC
- rtos::softirq::W
- smb0::RegisterBlock
- smb0::bbctrl::BBCTRL_SPEC
- smb0::bbctrl::R
- smb0::bbctrl::W
- smb0::blkid::BLKID_SPEC
- smb0::blkid::R
- smb0::blkrev::BLKREV_SPEC
- smb0::blkrev::R
- smb0::busclk::BUSCLK_SPEC
- smb0::busclk::R
- smb0::busclk::W
- smb0::cfg::CFG_SPEC
- smb0::cfg::R
- smb0::cfg::W
- smb0::compl::COMPL_SPEC
- smb0::compl::R
- smb0::compl::W
- smb0::datatm::DATATM_SPEC
- smb0::datatm::R
- smb0::datatm::W
- smb0::i2cdata::I2CDATA_SPEC
- smb0::i2cdata::R
- smb0::i2cdata::W
- smb0::idlsc::IDLSC_SPEC
- smb0::idlsc::R
- smb0::idlsc::W
- smb0::mcmd::MCMD_SPEC
- smb0::mcmd::R
- smb0::mcmd::W
- smb0::mtr_rxb::MTR_RXB_SPEC
- smb0::mtr_rxb::R
- smb0::mtr_rxb::W
- smb0::mtr_txb::MTR_TXB_SPEC
- smb0::mtr_txb::R
- smb0::mtr_txb::W
- smb0::own_addr::OWN_ADDR_SPEC
- smb0::own_addr::R
- smb0::own_addr::W
- smb0::pec::PEC_SPEC
- smb0::pec::R
- smb0::pec::W
- smb0::prm_ctrl::PRM_CTRL_SPEC
- smb0::prm_ctrl::R
- smb0::prm_ctrl::W
- smb0::prm_ien::PRM_IEN_SPEC
- smb0::prm_ien::R
- smb0::prm_ien::W
- smb0::prm_sts::PRM_STS_SPEC
- smb0::prm_sts::R
- smb0::prm_sts::W
- smb0::rshtm::R
- smb0::rshtm::RSHTM_SPEC
- smb0::rshtm::W
- smb0::rsts::R
- smb0::rsts::RSTS_SPEC
- smb0::rsvd1::R
- smb0::rsvd1::RSVD1_SPEC
- smb0::rsvd2::R
- smb0::rsvd2::RSVD2_SPEC
- smb0::scmd::R
- smb0::scmd::SCMD_SPEC
- smb0::scmd::W
- smb0::slv_addr::R
- smb0::slv_addr::SLV_ADDR_SPEC
- smb0::slv_addr::W
- smb0::slv_rxb::R
- smb0::slv_rxb::SLV_RXB_SPEC
- smb0::slv_rxb::W
- smb0::slv_txb::R
- smb0::slv_txb::SLV_TXB_SPEC
- smb0::slv_txb::W
- smb0::test::R
- smb0::test::TEST_SPEC
- smb0::tmoutsc::R
- smb0::tmoutsc::TMOUTSC_SPEC
- smb0::tmoutsc::W
- smb0::wake_en::R
- smb0::wake_en::W
- smb0::wake_en::WAKE_EN_SPEC
- smb0::wake_sts::R
- smb0::wake_sts::W
- smb0::wake_sts::WAKE_STS_SPEC
- smb0::wctrl::W
- smb0::wctrl::WCTRL_SPEC
- sys_tick::RegisterBlock
- sys_tick::calib::CALIB_SPEC
- sys_tick::calib::R
- sys_tick::csr::CSR_SPEC
- sys_tick::csr::R
- sys_tick::csr::W
- sys_tick::cvr::CVR_SPEC
- sys_tick::cvr::R
- sys_tick::cvr::W
- sys_tick::rvr::R
- sys_tick::rvr::RVR_SPEC
- sys_tick::rvr::W
- system_control::RegisterBlock
- system_control::actlr::ACTLR_SPEC
- system_control::actlr::R
- system_control::actlr::W
- system_control::adr::ADR_SPEC
- system_control::adr::R
- system_control::afsr::AFSR_SPEC
- system_control::afsr::R
- system_control::afsr::W
- system_control::aircr::AIRCR_SPEC
- system_control::aircr::R
- system_control::aircr::W
- system_control::bfar::BFAR_SPEC
- system_control::bfar::R
- system_control::bfar::W
- system_control::ccr::CCR_SPEC
- system_control::ccr::R
- system_control::ccr::W
- system_control::cfsr::CFSR_SPEC
- system_control::cfsr::R
- system_control::cfsr::W
- system_control::cpacr::CPACR_SPEC
- system_control::cpacr::R
- system_control::cpacr::W
- system_control::cpuid::CPUID_SPEC
- system_control::cpuid::R
- system_control::dfr::DFR_SPEC
- system_control::dfr::R
- system_control::dfsr::DFSR_SPEC
- system_control::dfsr::R
- system_control::dfsr::W
- system_control::hfsr::HFSR_SPEC
- system_control::hfsr::R
- system_control::hfsr::W
- system_control::icsr::ICSR_SPEC
- system_control::icsr::R
- system_control::icsr::W
- system_control::ictr::ICTR_SPEC
- system_control::ictr::R
- system_control::isar::ISAR_SPEC
- system_control::isar::R
- system_control::mmfar::MMFAR_SPEC
- system_control::mmfar::R
- system_control::mmfar::W
- system_control::mmfr::MMFR_SPEC
- system_control::mmfr::R
- system_control::pfr::PFR_SPEC
- system_control::pfr::R
- system_control::pfr::W
- system_control::scr::R
- system_control::scr::SCR_SPEC
- system_control::scr::W
- system_control::shcsr::R
- system_control::shcsr::SHCSR_SPEC
- system_control::shcsr::W
- system_control::shpr1::R
- system_control::shpr1::SHPR1_SPEC
- system_control::shpr1::W
- system_control::shpr2::R
- system_control::shpr2::SHPR2_SPEC
- system_control::shpr2::W
- system_control::shpr3::R
- system_control::shpr3::SHPR3_SPEC
- system_control::shpr3::W
- tach0::RegisterBlock
- tach0::ctrl::CTRL_SPEC
- tach0::ctrl::R
- tach0::ctrl::W
- tach0::lim_hi::LIM_HI_SPEC
- tach0::lim_hi::R
- tach0::lim_hi::W
- tach0::lim_lo::LIM_LO_SPEC
- tach0::lim_lo::R
- tach0::lim_lo::W
- tach0::sts::R
- tach0::sts::STS_SPEC
- tach0::sts::W
- tfdp::RegisterBlock
- tfdp::ctrl::CTRL_SPEC
- tfdp::ctrl::R
- tfdp::ctrl::W
- tfdp::msdata::MSDATA_SPEC
- tfdp::msdata::R
- tfdp::msdata::W
- timer16_0::RegisterBlock
- timer16_0::cnt::CNT_SPEC
- timer16_0::cnt::R
- timer16_0::cnt::W
- timer16_0::ctrl::CTRL_SPEC
- timer16_0::ctrl::R
- timer16_0::ctrl::W
- timer16_0::ien::IEN_SPEC
- timer16_0::ien::R
- timer16_0::ien::W
- timer16_0::prld::PRLD_SPEC
- timer16_0::prld::R
- timer16_0::prld::W
- timer16_0::sts::R
- timer16_0::sts::STS_SPEC
- timer16_0::sts::W
- timer32_0::RegisterBlock
- timer32_0::cnt::CNT_SPEC
- timer32_0::cnt::R
- timer32_0::cnt::W
- timer32_0::ctrl::CTRL_SPEC
- timer32_0::ctrl::R
- timer32_0::ctrl::W
- timer32_0::ien::IEN_SPEC
- timer32_0::ien::R
- timer32_0::ien::W
- timer32_0::prld::PRLD_SPEC
- timer32_0::prld::R
- timer32_0::prld::W
- timer32_0::sts::R
- timer32_0::sts::STS_SPEC
- timer32_0::sts::W
- uart0::RegisterBlock
- uart0::data::DATA
- uart0::data::activate::ACTIVATE_SPEC
- uart0::data::activate::R
- uart0::data::activate::W
- uart0::data::cfg_sel::CFG_SEL_SPEC
- uart0::data::cfg_sel::R
- uart0::data::cfg_sel::W
- uart0::data::fifo_cr::FIFO_CR_SPEC
- uart0::data::fifo_cr::W
- uart0::data::ien::IEN_SPEC
- uart0::data::ien::R
- uart0::data::ien::W
- uart0::data::int_id::INT_ID_SPEC
- uart0::data::int_id::R
- uart0::data::lcr::LCR_SPEC
- uart0::data::lcr::R
- uart0::data::lcr::W
- uart0::data::lsr::LSR_SPEC
- uart0::data::lsr::R
- uart0::data::mcr::MCR_SPEC
- uart0::data::mcr::R
- uart0::data::mcr::W
- uart0::data::msr::MSR_SPEC
- uart0::data::msr::R
- uart0::data::rx_dat::R
- uart0::data::rx_dat::RX_DAT_SPEC
- uart0::data::scr::R
- uart0::data::scr::SCR_SPEC
- uart0::data::scr::W
- uart0::data::tx_dat::TX_DAT_SPEC
- uart0::data::tx_dat::W
- uart0::dlab::DLAB
- uart0::dlab::activate::ACTIVATE_SPEC
- uart0::dlab::activate::R
- uart0::dlab::activate::W
- uart0::dlab::baudrt_lsb::BAUDRT_LSB_SPEC
- uart0::dlab::baudrt_lsb::R
- uart0::dlab::baudrt_lsb::W
- uart0::dlab::baudrt_msb::BAUDRT_MSB_SPEC
- uart0::dlab::baudrt_msb::R
- uart0::dlab::baudrt_msb::W
- uart0::dlab::cfg_sel::CFG_SEL_SPEC
- uart0::dlab::cfg_sel::R
- uart0::dlab::cfg_sel::W
- uart0::dlab::fifo_cr::FIFO_CR_SPEC
- uart0::dlab::fifo_cr::W
- uart0::dlab::int_id::INT_ID_SPEC
- uart0::dlab::int_id::R
- uart0::dlab::lcr::LCR_SPEC
- uart0::dlab::lcr::R
- uart0::dlab::lcr::W
- uart0::dlab::lsr::LSR_SPEC
- uart0::dlab::lsr::R
- uart0::dlab::mcr::MCR_SPEC
- uart0::dlab::mcr::R
- uart0::dlab::mcr::W
- uart0::dlab::msr::MSR_SPEC
- uart0::dlab::msr::R
- uart0::dlab::scr::R
- uart0::dlab::scr::SCR_SPEC
- uart0::dlab::scr::W
- vbat::RegisterBlock
- vbat::clk32_en::CLK32_EN_SPEC
- vbat::clk32_en::R
- vbat::clk32_en::W
- vbat::mcnt_hi::MCNT_HI_SPEC
- vbat::mcnt_hi::R
- vbat::mcnt_hi::W
- vbat::mcnt_lo::MCNT_LO_SPEC
- vbat::mcnt_lo::R
- vbat::mcnt_lo::W
- vbat::pfrs::PFRS_SPEC
- vbat::pfrs::R
- vbat::pfrs::W
- vbat::sys_shdn::R
- vbat::sys_shdn::SYS_SHDN_SPEC
- vbat::sys_shdn::W
- vbat::vwr_bckp::R
- vbat::vwr_bckp::VWR_BCKP_SPEC
- vbat::vwr_bckp::W
- vbat_ram::RegisterBlock
- vbat_ram::mem::MEM_SPEC
- vbat_ram::mem::R
- vbat_ram::mem::W
- vci::RegisterBlock
- vci::buffer_en::BUFFER_EN_SPEC
- vci::buffer_en::R
- vci::buffer_en::W
- vci::ctrl_sts::CTRL_STS_SPEC
- vci::ctrl_sts::R
- vci::ctrl_sts::W
- vci::hldoff_cnt::HLDOFF_CNT_SPEC
- vci::hldoff_cnt::R
- vci::hldoff_cnt::W
- vci::input_en::INPUT_EN_SPEC
- vci::input_en::R
- vci::input_en::W
- vci::latch_en::LATCH_EN_SPEC
- vci::latch_en::R
- vci::latch_en::W
- vci::latch_rst::LATCH_RST_SPEC
- vci::latch_rst::R
- vci::latch_rst::W
- vci::nedge_det::NEDGE_DET_SPEC
- vci::nedge_det::R
- vci::nedge_det::W
- vci::pedge_det::PEDGE_DET_SPEC
- vci::pedge_det::R
- vci::pedge_det::W
- vci::polarity::POLARITY_SPEC
- vci::polarity::R
- vci::polarity::W
- wdt::RegisterBlock
- wdt::cnt::CNT_SPEC
- wdt::cnt::R
- wdt::ctrl::CTRL_SPEC
- wdt::ctrl::R
- wdt::ctrl::W
- wdt::ien::IEN_SPEC
- wdt::ien::R
- wdt::ien::W
- wdt::kick::KICK_SPEC
- wdt::kick::W
- wdt::load::LOAD_SPEC
- wdt::load::R
- wdt::load::W
- wdt::sts::R
- wdt::sts::STS_SPEC
- wdt::sts::W
- week::RegisterBlock
- week::alarm_cnt::ALARM_CNT_SPEC
- week::alarm_cnt::R
- week::alarm_cnt::W
- week::clkdiv::CLKDIV_SPEC
- week::clkdiv::R
- week::clkdiv::W
- week::ctrl::CTRL_SPEC
- week::ctrl::R
- week::ctrl::W
- week::ss_intr_sel::R
- week::ss_intr_sel::SS_INTR_SEL_SPEC
- week::ss_intr_sel::W
- week::swk_alarm::R
- week::swk_alarm::SWK_ALARM_SPEC
- week::swk_ctrl::R
- week::swk_ctrl::SWK_CTRL_SPEC
- week::tmr_comp::R
- week::tmr_comp::TMR_COMP_SPEC
- week::tmr_comp::W
Enums
- Interrupt
- dma_chan00::ctrl::STSSELECT_A
- dma_chan01::ctrl::STSSELECT_A
- dma_chan02::ctrl::STSSELECT_A
- ec_reg_bank::aesh_bswap_ctrl::IP_BLK_SWAP_ENSELECT_A
- ec_reg_bank::aesh_bswap_ctrl::OP_BLK_SWAP_ENSELECT_A
- ec_reg_bank::debug_ctrl::PIN_CFGSELECT_A
- ec_reg_bank::jtag_mcfg::JTM_CLKSELECT_A
- pcr::proc_clk_ctrl::DIVSELECT_A
- sys_tick::calib::NOREFSELECT_A
- sys_tick::calib::SKEWSELECT_A
- sys_tick::csr::CLKSOURCESELECT_A
- sys_tick::csr::ENABLESELECT_A
- sys_tick::csr::TICKINTSELECT_A
- system_control::aircr::ENDIANNESSSELECT_A
- system_control::aircr::SYSRESETREQSELECT_A
- system_control::ccr::STKALIGNSELECT_A
- system_control::ccr::UNALIGN_TRPSELECT_A
- system_control::cpacr::CP10SELECT_A
- system_control::cpacr::CP11SELECT_A
- system_control::icsr::NMIPENDSETSELECT_A
- system_control::icsr::PENDSTCLRSELECT_A
- system_control::icsr::PENDSTSETSELECT_A
- system_control::icsr::PENDSVCLRSELECT_A
- system_control::icsr::PENDSVSETSELECT_A
- system_control::scr::SEVONPENDSELECT_A
- system_control::scr::SLEEPDEEPSELECT_A
- system_control::scr::SLEEPONEXITSELECT_A
Traits
Attribute Macros
Typedefs
- adc::CFG
- adc::CHAN_RD
- adc::CHAN_STS
- adc::CTRL
- adc::DELAY
- adc::REPT_EN
- adc::SAR_CFG
- adc::SAR_CTRL
- adc::SNG_EN
- adc::VREF_CHAN
- adc::VREF_CTRL
- adc::cfg::CLKDUMY_TIM_R
- adc::cfg::CLKDUMY_TIM_W
- adc::cfg::CLKHIGH_TIM_R
- adc::cfg::CLKHIGH_TIM_W
- adc::cfg::CLKLW_TIM_R
- adc::cfg::CLKLW_TIM_W
- adc::cfg::DUMYCYC_GAP_R
- adc::cfg::DUMYCYC_GAP_W
- adc::cfg::PWRUP_DLY_R
- adc::cfg::PWRUP_DLY_W
- adc::chan_sts::STS_R
- adc::chan_sts::STS_W
- adc::ctrl::ACT_R
- adc::ctrl::ACT_W
- adc::ctrl::PWR_SAV_DIS_R
- adc::ctrl::PWR_SAV_DIS_W
- adc::ctrl::RPT_DONE_STS_R
- adc::ctrl::RPT_DONE_STS_W
- adc::ctrl::SFT_RST_R
- adc::ctrl::SFT_RST_W
- adc::ctrl::SIN_DONE_STS_R
- adc::ctrl::SIN_DONE_STS_W
- adc::ctrl::STRT_RPT_R
- adc::ctrl::STRT_RPT_W
- adc::ctrl::STRT_SIN_R
- adc::ctrl::STRT_SIN_W
- adc::delay::RPT_DLY_R
- adc::delay::RPT_DLY_W
- adc::delay::STRT_DLY_R
- adc::delay::STRT_DLY_W
- adc::rept_en::R_EN_R
- adc::rept_en::R_EN_W
- adc::sar_cfg::CLK_DIV_R
- adc::sar_cfg::CLK_DIV_W
- adc::sar_cfg::DIS_DOUT_R
- adc::sar_cfg::DIS_DOUT_W
- adc::sar_cfg::EN_CMBF_R
- adc::sar_cfg::EN_CMBF_W
- adc::sar_cfg::EN_DITHER_R
- adc::sar_cfg::EN_DITHER_W
- adc::sar_cfg::EN_EXT_BIAS_R
- adc::sar_cfg::EN_EXT_BIAS_W
- adc::sar_cfg::EN_RADC_R
- adc::sar_cfg::EN_RADC_W
- adc::sar_cfg::FAZ_AU_ZERO_R
- adc::sar_cfg::FAZ_AU_ZERO_W
- adc::sar_cfg::IADC_RANGE1_R
- adc::sar_cfg::IADC_RANGE1_W
- adc::sar_cfg::IADC_RANGE2_R
- adc::sar_cfg::IADC_RANGE2_W
- adc::sar_cfg::ICMBF_R
- adc::sar_cfg::ICMBF_STG1_R
- adc::sar_cfg::ICMBF_STG1_W
- adc::sar_cfg::ICMBF_STG2_R
- adc::sar_cfg::ICMBF_STG2_W
- adc::sar_cfg::ICMBF_W
- adc::sar_cfg::LAZ_AU_ZERO_R
- adc::sar_cfg::LAZ_AU_ZERO_W
- adc::sar_cfg::REGEN_DLY_R
- adc::sar_cfg::REGEN_DLY_W
- adc::sar_cfg::SAZ_AU_ZERO_R
- adc::sar_cfg::SAZ_AU_ZERO_W
- adc::sar_ctrl::EN_ASYN_SMPL_R
- adc::sar_ctrl::EN_ASYN_SMPL_W
- adc::sar_ctrl::EN_SERIAL_R
- adc::sar_ctrl::EN_SERIAL_W
- adc::sar_ctrl::SEL_DIFF_R
- adc::sar_ctrl::SEL_DIFF_W
- adc::sar_ctrl::SEL_RES_R
- adc::sar_ctrl::SEL_RES_W
- adc::sar_ctrl::SHIFT_DAT_R
- adc::sar_ctrl::SHIFT_DAT_W
- adc::sar_ctrl::WARM_UP_DLY_R
- adc::sar_ctrl::WARM_UP_DLY_W
- adc::sng_en::S_EN_R
- adc::sng_en::S_EN_W
- adc::vref_chan::SEL0_R
- adc::vref_chan::SEL0_W
- adc::vref_chan::SEL10_R
- adc::vref_chan::SEL10_W
- adc::vref_chan::SEL11_R
- adc::vref_chan::SEL11_W
- adc::vref_chan::SEL12_R
- adc::vref_chan::SEL12_W
- adc::vref_chan::SEL13_R
- adc::vref_chan::SEL13_W
- adc::vref_chan::SEL14_R
- adc::vref_chan::SEL14_W
- adc::vref_chan::SEL15_R
- adc::vref_chan::SEL15_W
- adc::vref_chan::SEL1_R
- adc::vref_chan::SEL1_W
- adc::vref_chan::SEL2_R
- adc::vref_chan::SEL2_W
- adc::vref_chan::SEL3_R
- adc::vref_chan::SEL3_W
- adc::vref_chan::SEL4_R
- adc::vref_chan::SEL4_W
- adc::vref_chan::SEL5_R
- adc::vref_chan::SEL5_W
- adc::vref_chan::SEL6_R
- adc::vref_chan::SEL6_W
- adc::vref_chan::SEL7_R
- adc::vref_chan::SEL7_W
- adc::vref_chan::SEL8_R
- adc::vref_chan::SEL8_W
- adc::vref_chan::SEL9_R
- adc::vref_chan::SEL9_W
- adc::vref_ctrl::CHRG_DLY_R
- adc::vref_ctrl::CHRG_DLY_W
- adc::vref_ctrl::PADCTRL_R
- adc::vref_ctrl::PADCTRL_W
- adc::vref_ctrl::SELSTAT_R
- adc::vref_ctrl::SELSTAT_W
- adc::vref_ctrl::SWITCH_DLY_R
- adc::vref_ctrl::SWITCH_DLY_W
- cct::CAP0
- cct::CAP0_CTRL
- cct::CAP1
- cct::CAP1_CTRL
- cct::CAP2
- cct::CAP3
- cct::CAP4
- cct::CAP5
- cct::COMP0
- cct::COMP1
- cct::CTRL
- cct::FREE_RUN
- cct::MUX_SEL
- cct::cap0::CAP_0_R
- cct::cap0::CAP_0_W
- cct::cap0_ctrl::CAP_EDGE0_R
- cct::cap0_ctrl::CAP_EDGE0_W
- cct::cap0_ctrl::CAP_EDGE1_R
- cct::cap0_ctrl::CAP_EDGE1_W
- cct::cap0_ctrl::CAP_EDGE2_R
- cct::cap0_ctrl::CAP_EDGE2_W
- cct::cap0_ctrl::CAP_EDGE3_R
- cct::cap0_ctrl::CAP_EDGE3_W
- cct::cap0_ctrl::FCLK_SEL0_R
- cct::cap0_ctrl::FCLK_SEL0_W
- cct::cap0_ctrl::FCLK_SEL1_R
- cct::cap0_ctrl::FCLK_SEL1_W
- cct::cap0_ctrl::FCLK_SEL2_R
- cct::cap0_ctrl::FCLK_SEL2_W
- cct::cap0_ctrl::FCLK_SEL3_R
- cct::cap0_ctrl::FCLK_SEL3_W
- cct::cap0_ctrl::FILTER_BYP0_R
- cct::cap0_ctrl::FILTER_BYP0_W
- cct::cap0_ctrl::FILTER_BYP1_R
- cct::cap0_ctrl::FILTER_BYP1_W
- cct::cap0_ctrl::FILTER_BYP2_R
- cct::cap0_ctrl::FILTER_BYP2_W
- cct::cap0_ctrl::FILTER_BYP3_R
- cct::cap0_ctrl::FILTER_BYP3_W
- cct::cap1::CAP_1_R
- cct::cap1::CAP_1_W
- cct::cap1_ctrl::CAP_EDGE4_R
- cct::cap1_ctrl::CAP_EDGE4_W
- cct::cap1_ctrl::CAP_EDGE5_R
- cct::cap1_ctrl::CAP_EDGE5_W
- cct::cap1_ctrl::FCLK_SEL4_R
- cct::cap1_ctrl::FCLK_SEL4_W
- cct::cap1_ctrl::FCLK_SEL5_R
- cct::cap1_ctrl::FCLK_SEL5_W
- cct::cap1_ctrl::FILTER_BYP4_R
- cct::cap1_ctrl::FILTER_BYP4_W
- cct::cap1_ctrl::FILTER_BYP5_R
- cct::cap1_ctrl::FILTER_BYP5_W
- cct::cap2::CAP_2_R
- cct::cap2::CAP_2_W
- cct::cap3::CAP_3_R
- cct::cap3::CAP_3_W
- cct::cap4::CAP_4_R
- cct::cap4::CAP_4_W
- cct::cap5::CAP_5_R
- cct::cap5::CAP_5_W
- cct::comp0::COMP_0_R
- cct::comp0::COMP_0_W
- cct::comp1::COMP_1_R
- cct::comp1::COMP_1_W
- cct::ctrl::ACT_R
- cct::ctrl::ACT_W
- cct::ctrl::CMP_CLR0_R
- cct::ctrl::CMP_CLR0_W
- cct::ctrl::CMP_CLR1_R
- cct::ctrl::CMP_CLR1_W
- cct::ctrl::CMP_EN0_R
- cct::ctrl::CMP_EN0_W
- cct::ctrl::CMP_EN1_R
- cct::ctrl::CMP_EN1_W
- cct::ctrl::CMP_SET0_R
- cct::ctrl::CMP_SET0_W
- cct::ctrl::CMP_SET1_R
- cct::ctrl::CMP_SET1_W
- cct::ctrl::FREE_EN_R
- cct::ctrl::FREE_EN_W
- cct::ctrl::FREE_RST_R
- cct::ctrl::FREE_RST_W
- cct::ctrl::TCLK_R
- cct::ctrl::TCLK_W
- cct::free_run::TMR_R
- cct::free_run::TMR_W
- cct::mux_sel::CAP0_R
- cct::mux_sel::CAP0_W
- cct::mux_sel::CAP1_R
- cct::mux_sel::CAP1_W
- cct::mux_sel::CAP2_R
- cct::mux_sel::CAP2_W
- cct::mux_sel::CAP3_R
- cct::mux_sel::CAP3_W
- cct::mux_sel::CAP4_R
- cct::mux_sel::CAP4_W
- cct::mux_sel::CAP5_R
- cct::mux_sel::CAP5_W
- dma_chan00::ACTIVATE
- dma_chan00::CRC_DATA
- dma_chan00::CRC_EN
- dma_chan00::CRC_POST_STS
- dma_chan00::CTRL
- dma_chan00::DSTART
- dma_chan00::IEN
- dma_chan00::ISTS
- dma_chan00::MEND
- dma_chan00::MSTART
- dma_chan00::activate::CHN_R
- dma_chan00::activate::CHN_W
- dma_chan00::crc_data::CRC_R
- dma_chan00::crc_data::CRC_W
- dma_chan00::crc_en::MODE_R
- dma_chan00::crc_en::MODE_W
- dma_chan00::crc_en::POST_TRANS_R
- dma_chan00::crc_en::POST_TRANS_W
- dma_chan00::crc_post_sts::CRC_DATA_DONE_R
- dma_chan00::crc_post_sts::CRC_DATA_DONE_W
- dma_chan00::crc_post_sts::CRC_DATA_READY_R
- dma_chan00::crc_post_sts::CRC_DATA_READY_W
- dma_chan00::crc_post_sts::CRC_DONE_R
- dma_chan00::crc_post_sts::CRC_DONE_W
- dma_chan00::crc_post_sts::CRC_RUNNING_R
- dma_chan00::crc_post_sts::CRC_RUNNING_W
- dma_chan00::ctrl::BUSY_R
- dma_chan00::ctrl::BUSY_W
- dma_chan00::ctrl::DIS_HW_FLOW_CTRL_R
- dma_chan00::ctrl::DIS_HW_FLOW_CTRL_W
- dma_chan00::ctrl::DONE_R
- dma_chan00::ctrl::DONE_W
- dma_chan00::ctrl::HW_FLOW_CTRL_DEV_R
- dma_chan00::ctrl::HW_FLOW_CTRL_DEV_W
- dma_chan00::ctrl::INC_DEV_ADDR_R
- dma_chan00::ctrl::INC_DEV_ADDR_W
- dma_chan00::ctrl::INC_MEM_ADDR_R
- dma_chan00::ctrl::INC_MEM_ADDR_W
- dma_chan00::ctrl::LOCK_R
- dma_chan00::ctrl::LOCK_W
- dma_chan00::ctrl::REQ_R
- dma_chan00::ctrl::REQ_W
- dma_chan00::ctrl::RUN_R
- dma_chan00::ctrl::RUN_W
- dma_chan00::ctrl::STS_R
- dma_chan00::ctrl::STS_W
- dma_chan00::ctrl::TRANS_ABORT_R
- dma_chan00::ctrl::TRANS_ABORT_W
- dma_chan00::ctrl::TRANS_GO_R
- dma_chan00::ctrl::TRANS_GO_W
- dma_chan00::ctrl::TRANS_SIZE_R
- dma_chan00::ctrl::TRANS_SIZE_W
- dma_chan00::ctrl::TX_DIR_R
- dma_chan00::ctrl::TX_DIR_W
- dma_chan00::ien::STS_EN_BUS_ERR_R
- dma_chan00::ien::STS_EN_BUS_ERR_W
- dma_chan00::ien::STS_EN_DONE_R
- dma_chan00::ien::STS_EN_DONE_W
- dma_chan00::ien::STS_EN_FLOW_CTRL_R
- dma_chan00::ien::STS_EN_FLOW_CTRL_W
- dma_chan00::ists::BUS_ERR_R
- dma_chan00::ists::BUS_ERR_W
- dma_chan00::ists::DONE_R
- dma_chan00::ists::DONE_W
- dma_chan00::ists::FLOW_CTRL_R
- dma_chan00::ists::FLOW_CTRL_W
- dma_chan01::ACTIVATE
- dma_chan01::CTRL
- dma_chan01::DSTART
- dma_chan01::FILL_DATA
- dma_chan01::FILL_EN
- dma_chan01::FILL_STS
- dma_chan01::IEN
- dma_chan01::ISTS
- dma_chan01::MEND
- dma_chan01::MSTART
- dma_chan01::activate::CHN_R
- dma_chan01::activate::CHN_W
- dma_chan01::ctrl::BUSY_R
- dma_chan01::ctrl::BUSY_W
- dma_chan01::ctrl::DIS_HW_FLOW_CTRL_R
- dma_chan01::ctrl::DIS_HW_FLOW_CTRL_W
- dma_chan01::ctrl::DONE_R
- dma_chan01::ctrl::DONE_W
- dma_chan01::ctrl::HW_FLOW_CTRL_DEV_R
- dma_chan01::ctrl::HW_FLOW_CTRL_DEV_W
- dma_chan01::ctrl::INC_DEV_ADDR_R
- dma_chan01::ctrl::INC_DEV_ADDR_W
- dma_chan01::ctrl::INC_MEM_ADDR_R
- dma_chan01::ctrl::INC_MEM_ADDR_W
- dma_chan01::ctrl::LOCK_R
- dma_chan01::ctrl::LOCK_W
- dma_chan01::ctrl::REQ_R
- dma_chan01::ctrl::REQ_W
- dma_chan01::ctrl::RUN_R
- dma_chan01::ctrl::RUN_W
- dma_chan01::ctrl::STS_R
- dma_chan01::ctrl::STS_W
- dma_chan01::ctrl::TRANS_ABORT_R
- dma_chan01::ctrl::TRANS_ABORT_W
- dma_chan01::ctrl::TRANS_GO_R
- dma_chan01::ctrl::TRANS_GO_W
- dma_chan01::ctrl::TRANS_SIZE_R
- dma_chan01::ctrl::TRANS_SIZE_W
- dma_chan01::ctrl::TX_DIR_R
- dma_chan01::ctrl::TX_DIR_W
- dma_chan01::fill_data::DATA_R
- dma_chan01::fill_data::DATA_W
- dma_chan01::fill_en::MODE_R
- dma_chan01::fill_en::MODE_W
- dma_chan01::fill_sts::DONE_R
- dma_chan01::fill_sts::DONE_W
- dma_chan01::fill_sts::RUNNING_R
- dma_chan01::fill_sts::RUNNING_W
- dma_chan01::ien::STS_EN_BUS_ERR_R
- dma_chan01::ien::STS_EN_BUS_ERR_W
- dma_chan01::ien::STS_EN_DONE_R
- dma_chan01::ien::STS_EN_DONE_W
- dma_chan01::ien::STS_EN_FLOW_CTRL_R
- dma_chan01::ien::STS_EN_FLOW_CTRL_W
- dma_chan01::ists::BUS_ERROR_R
- dma_chan01::ists::BUS_ERROR_W
- dma_chan01::ists::DONE_R
- dma_chan01::ists::DONE_W
- dma_chan01::ists::FLOW_CTRL_R
- dma_chan01::ists::FLOW_CTRL_W
- dma_chan02::ACTIVATE
- dma_chan02::CTRL
- dma_chan02::DSTART
- dma_chan02::IEN
- dma_chan02::ISTS
- dma_chan02::MEND
- dma_chan02::MSTART
- dma_chan02::activate::CHN_R
- dma_chan02::activate::CHN_W
- dma_chan02::ctrl::BUSY_R
- dma_chan02::ctrl::BUSY_W
- dma_chan02::ctrl::DIS_HW_FLOW_CTRL_R
- dma_chan02::ctrl::DIS_HW_FLOW_CTRL_W
- dma_chan02::ctrl::DONE_R
- dma_chan02::ctrl::DONE_W
- dma_chan02::ctrl::HW_FLOW_CTRL_DEV_R
- dma_chan02::ctrl::HW_FLOW_CTRL_DEV_W
- dma_chan02::ctrl::INC_DEV_ADDR_R
- dma_chan02::ctrl::INC_DEV_ADDR_W
- dma_chan02::ctrl::INC_MEM_ADDR_R
- dma_chan02::ctrl::INC_MEM_ADDR_W
- dma_chan02::ctrl::LOCK_R
- dma_chan02::ctrl::LOCK_W
- dma_chan02::ctrl::REQ_R
- dma_chan02::ctrl::REQ_W
- dma_chan02::ctrl::RUN_R
- dma_chan02::ctrl::RUN_W
- dma_chan02::ctrl::STS_R
- dma_chan02::ctrl::STS_W
- dma_chan02::ctrl::TRANS_ABORT_R
- dma_chan02::ctrl::TRANS_ABORT_W
- dma_chan02::ctrl::TRANS_GO_R
- dma_chan02::ctrl::TRANS_GO_W
- dma_chan02::ctrl::TRANS_SIZE_R
- dma_chan02::ctrl::TRANS_SIZE_W
- dma_chan02::ctrl::TX_DIR_R
- dma_chan02::ctrl::TX_DIR_W
- dma_chan02::ien::STS_EN_BUS_ERR_R
- dma_chan02::ien::STS_EN_BUS_ERR_W
- dma_chan02::ien::STS_EN_DONE_R
- dma_chan02::ien::STS_EN_DONE_W
- dma_chan02::ien::STS_EN_FLOW_CTRL_R
- dma_chan02::ien::STS_EN_FLOW_CTRL_W
- dma_chan02::ists::BUS_ERR_R
- dma_chan02::ists::BUS_ERR_W
- dma_chan02::ists::DONE_R
- dma_chan02::ists::DONE_W
- dma_chan02::ists::FLOW_CTRL_R
- dma_chan02::ists::FLOW_CTRL_W
- dma_main::ACTRST
- dma_main::DATA_PKT
- dma_main::actrst::ACT_R
- dma_main::actrst::ACT_W
- dma_main::actrst::SOFT_RST_R
- dma_main::actrst::SOFT_RST_W
- ec_reg_bank::AESH_BSWAP_CTRL
- ec_reg_bank::AHB_ERR_ADDR
- ec_reg_bank::AHB_ERR_CTRL
- ec_reg_bank::BROM_STS
- ec_reg_bank::CRYPTO_SRST
- ec_reg_bank::DEBUG_CTRL
- ec_reg_bank::ETM_CTRL
- ec_reg_bank::FW_SCR0
- ec_reg_bank::FW_SCR1
- ec_reg_bank::FW_SCR2
- ec_reg_bank::FW_SCR3
- ec_reg_bank::GPIO_BANK_PWR
- ec_reg_bank::INTR_CTRL
- ec_reg_bank::JTAG_MCFG
- ec_reg_bank::JTAG_MCMD
- ec_reg_bank::JTAG_MSTS
- ec_reg_bank::JTAG_MTDI
- ec_reg_bank::JTAG_MTDO
- ec_reg_bank::JTAG_MTMS
- ec_reg_bank::OTP_LOCK
- ec_reg_bank::PECI_DIS
- ec_reg_bank::STAP_TMIR
- ec_reg_bank::WDT_CNT
- ec_reg_bank::aesh_bswap_ctrl::IP_BLK_SWAP_EN_R
- ec_reg_bank::aesh_bswap_ctrl::IP_BLK_SWAP_EN_W
- ec_reg_bank::aesh_bswap_ctrl::IP_BYTE_SWAP_EN_R
- ec_reg_bank::aesh_bswap_ctrl::IP_BYTE_SWAP_EN_W
- ec_reg_bank::aesh_bswap_ctrl::OP_BLK_SWAP_EN_R
- ec_reg_bank::aesh_bswap_ctrl::OP_BLK_SWAP_EN_W
- ec_reg_bank::aesh_bswap_ctrl::OP_BYTE_SWAP_EN_R
- ec_reg_bank::aesh_bswap_ctrl::OP_BYTE_SWAP_EN_W
- ec_reg_bank::brom_sts::VTR_RST_STS_R
- ec_reg_bank::brom_sts::VTR_RST_STS_W
- ec_reg_bank::brom_sts::WDT_EVT_R
- ec_reg_bank::brom_sts::WDT_EVT_W
- ec_reg_bank::crypto_srst::AES_HASH_R
- ec_reg_bank::crypto_srst::AES_HASH_W
- ec_reg_bank::crypto_srst::PUB_KEY_R
- ec_reg_bank::crypto_srst::PUB_KEY_W
- ec_reg_bank::crypto_srst::RNG_R
- ec_reg_bank::crypto_srst::RNG_W
- ec_reg_bank::debug_ctrl::BSP_EN_R
- ec_reg_bank::debug_ctrl::BSP_EN_W
- ec_reg_bank::debug_ctrl::EN_R
- ec_reg_bank::debug_ctrl::EN_W
- ec_reg_bank::debug_ctrl::PIN_CFG_R
- ec_reg_bank::debug_ctrl::PIN_CFG_W
- ec_reg_bank::debug_ctrl::PU_EN_R
- ec_reg_bank::debug_ctrl::PU_EN_W
- ec_reg_bank::fw_scr0::SCR0_R
- ec_reg_bank::fw_scr0::SCR0_W
- ec_reg_bank::fw_scr1::SCR1_R
- ec_reg_bank::fw_scr1::SCR1_W
- ec_reg_bank::fw_scr2::SCR2_R
- ec_reg_bank::fw_scr2::SCR2_W
- ec_reg_bank::fw_scr3::SCR3_R
- ec_reg_bank::fw_scr3::SCR3_W
- ec_reg_bank::gpio_bank_pwr::GPIO_BANK_PWR_LOCK_R
- ec_reg_bank::gpio_bank_pwr::GPIO_BANK_PWR_LOCK_W
- ec_reg_bank::gpio_bank_pwr::TEST_R
- ec_reg_bank::gpio_bank_pwr::TEST_W
- ec_reg_bank::gpio_bank_pwr::VTR_LVL2_R
- ec_reg_bank::gpio_bank_pwr::VTR_LVL2_W
- ec_reg_bank::gpio_bank_pwr::VTR_LVL3_R
- ec_reg_bank::gpio_bank_pwr::VTR_LVL3_W
- ec_reg_bank::jtag_mcfg::JTM_CLK_R
- ec_reg_bank::jtag_mcfg::JTM_CLK_W
- ec_reg_bank::jtag_mcfg::MAS_SLV_R
- ec_reg_bank::jtag_mcfg::MAS_SLV_W
- ec_reg_bank::jtag_mcmd::JTM_COUNT_R
- ec_reg_bank::jtag_mcmd::JTM_COUNT_W
- ec_reg_bank::jtag_msts::JTM_DONE_R
- ec_reg_bank::jtag_mtdi::JTM_TDI_R
- ec_reg_bank::jtag_mtdi::JTM_TDI_W
- ec_reg_bank::jtag_mtdo::JTM_TDO_R
- ec_reg_bank::jtag_mtdo::JTM_TDO_W
- ec_reg_bank::jtag_mtms::JTM_TMS_R
- ec_reg_bank::jtag_mtms::JTM_TMS_W
- ec_reg_bank::otp_lock::TEST_R
- ec_reg_bank::otp_lock::TEST_W
- ec_reg_bank::otp_lock::VBAT_RAM_LOCK_R
- ec_reg_bank::otp_lock::VBAT_RAM_LOCK_W
- ec_reg_bank::otp_lock::VBAT_REG_LOCK_R
- ec_reg_bank::otp_lock::VBAT_REG_LOCK_W
- ec_reg_bank::peci_dis::P_DIS_R
- ec_reg_bank::peci_dis::P_DIS_W
- ec_reg_bank::stap_tmir::BS_STATUS_R
- ec_reg_bank::stap_tmir::INT_SPI_RECOV_R
- ec_reg_bank::stap_tmir::QA_MODE_R
- ec_reg_bank::stap_tmir::VLD_MODE_R
- ecia::BLK_EN_CLR
- ecia::BLK_EN_SET
- ecia::BLK_IRQ_VTOR
- ecia::EN_CLR10
- ecia::EN_CLR11
- ecia::EN_CLR12
- ecia::EN_CLR13
- ecia::EN_CLR14
- ecia::EN_CLR15
- ecia::EN_CLR16
- ecia::EN_CLR17
- ecia::EN_CLR18
- ecia::EN_CLR19
- ecia::EN_CLR20
- ecia::EN_CLR21
- ecia::EN_CLR22
- ecia::EN_CLR23
- ecia::EN_CLR24
- ecia::EN_CLR25
- ecia::EN_CLR26
- ecia::EN_CLR8
- ecia::EN_CLR9
- ecia::EN_SET10
- ecia::EN_SET11
- ecia::EN_SET12
- ecia::EN_SET13
- ecia::EN_SET14
- ecia::EN_SET15
- ecia::EN_SET16
- ecia::EN_SET17
- ecia::EN_SET18
- ecia::EN_SET19
- ecia::EN_SET20
- ecia::EN_SET21
- ecia::EN_SET22
- ecia::EN_SET23
- ecia::EN_SET24
- ecia::EN_SET25
- ecia::EN_SET26
- ecia::EN_SET8
- ecia::EN_SET9
- ecia::RESULT10
- ecia::RESULT11
- ecia::RESULT12
- ecia::RESULT13
- ecia::RESULT14
- ecia::RESULT15
- ecia::RESULT16
- ecia::RESULT17
- ecia::RESULT18
- ecia::RESULT19
- ecia::RESULT20
- ecia::RESULT21
- ecia::RESULT22
- ecia::RESULT23
- ecia::RESULT24
- ecia::RESULT25
- ecia::RESULT26
- ecia::RESULT8
- ecia::RESULT9
- ecia::SRC10
- ecia::SRC11
- ecia::SRC12
- ecia::SRC13
- ecia::SRC14
- ecia::SRC15
- ecia::SRC16
- ecia::SRC17
- ecia::SRC18
- ecia::SRC19
- ecia::SRC20
- ecia::SRC21
- ecia::SRC22
- ecia::SRC23
- ecia::SRC24
- ecia::SRC25
- ecia::SRC26
- ecia::SRC8
- ecia::SRC9
- ecia::blk_en_clr::VTOR_EN_CLR_R
- ecia::blk_en_clr::VTOR_EN_CLR_W
- ecia::blk_en_set::VTOR_EN_SET_R
- ecia::blk_en_set::VTOR_EN_SET_W
- ecia::blk_irq_vtor::VTOR_R
- gcr::DEV_ID
- gcr::DEV_REV
- gcr::DEV_SUBID
- gcr::LDN
- gcr::LEG_DEV_ID
- gcr::LEG_DEV_REV
- generic::BitReader
- generic::BitWriter
- generic::BitWriter0C
- generic::BitWriter0S
- generic::BitWriter0T
- generic::BitWriter1C
- generic::BitWriter1S
- generic::BitWriter1T
- generic::FieldReader
- generic::FieldWriter
- generic::FieldWriterSafe
- gpio::CTRL0
- gpio::CTRL1
- gpio::CTRL10
- gpio::CTRL11
- gpio::CTRL12
- gpio::CTRL13
- gpio::CTRL14
- gpio::CTRL15
- gpio::CTRL16
- gpio::CTRL17
- gpio::CTRL2
- gpio::CTRL20
- gpio::CTRL21
- gpio::CTRL22
- gpio::CTRL23
- gpio::CTRL24
- gpio::CTRL25
- gpio::CTRL26
- gpio::CTRL2P0
- gpio::CTRL2P1
- gpio::CTRL2P10
- gpio::CTRL2P11
- gpio::CTRL2P12
- gpio::CTRL2P13
- gpio::CTRL2P14
- gpio::CTRL2P15
- gpio::CTRL2P16
- gpio::CTRL2P17
- gpio::CTRL2P2
- gpio::CTRL2P20
- gpio::CTRL2P21
- gpio::CTRL2P22
- gpio::CTRL2P23
- gpio::CTRL2P24
- gpio::CTRL2P25
- gpio::CTRL2P26
- gpio::CTRL2P3
- gpio::CTRL2P4
- gpio::CTRL2P5
- gpio::CTRL2P6
- gpio::CTRL2P7
- gpio::CTRL3
- gpio::CTRL4
- gpio::CTRL5
- gpio::CTRL6
- gpio::CTRL7
- gpio::PARIN
- gpio::PAROUT
- gpio::ctrl0::ALT_GPIO_DATA_R
- gpio::ctrl0::ALT_GPIO_DATA_W
- gpio::ctrl0::EDGE_EN_R
- gpio::ctrl0::EDGE_EN_W
- gpio::ctrl0::GPIO_DIR_R
- gpio::ctrl0::GPIO_DIR_W
- gpio::ctrl0::GPIO_INP_R
- gpio::ctrl0::GPIO_INP_W
- gpio::ctrl0::GPIO_OUT_SEL_R
- gpio::ctrl0::GPIO_OUT_SEL_W
- gpio::ctrl0::INP_DIS_R
- gpio::ctrl0::INP_DIS_W
- gpio::ctrl0::INTR_DET_R
- gpio::ctrl0::INTR_DET_W
- gpio::ctrl0::MUX_CTRL_R
- gpio::ctrl0::MUX_CTRL_W
- gpio::ctrl0::OUT_BUFF_TYPE_R
- gpio::ctrl0::OUT_BUFF_TYPE_W
- gpio::ctrl0::POL_R
- gpio::ctrl0::POL_W
- gpio::ctrl0::PU_PD_R
- gpio::ctrl0::PU_PD_W
- gpio::ctrl0::PWR_GATING_R
- gpio::ctrl0::PWR_GATING_W
- gpio::ctrl10::ALT_GPIO_DATA_R
- gpio::ctrl10::ALT_GPIO_DATA_W
- gpio::ctrl10::EDGE_EN_R
- gpio::ctrl10::EDGE_EN_W
- gpio::ctrl10::GPIO_DIR_R
- gpio::ctrl10::GPIO_DIR_W
- gpio::ctrl10::GPIO_INP_R
- gpio::ctrl10::GPIO_INP_W
- gpio::ctrl10::GPIO_OUT_SEL_R
- gpio::ctrl10::GPIO_OUT_SEL_W
- gpio::ctrl10::INP_DIS_R
- gpio::ctrl10::INP_DIS_W
- gpio::ctrl10::INTR_DET_R
- gpio::ctrl10::INTR_DET_W
- gpio::ctrl10::MUX_CTRL_R
- gpio::ctrl10::MUX_CTRL_W
- gpio::ctrl10::OUT_BUFF_TYPE_R
- gpio::ctrl10::OUT_BUFF_TYPE_W
- gpio::ctrl10::POL_R
- gpio::ctrl10::POL_W
- gpio::ctrl10::PU_PD_R
- gpio::ctrl10::PU_PD_W
- gpio::ctrl10::PWR_GATING_R
- gpio::ctrl10::PWR_GATING_W
- gpio::ctrl11::ALT_GPIO_DATA_R
- gpio::ctrl11::ALT_GPIO_DATA_W
- gpio::ctrl11::EDGE_EN_R
- gpio::ctrl11::EDGE_EN_W
- gpio::ctrl11::GPIO_DIR_R
- gpio::ctrl11::GPIO_DIR_W
- gpio::ctrl11::GPIO_INP_R
- gpio::ctrl11::GPIO_INP_W
- gpio::ctrl11::GPIO_OUT_SEL_R
- gpio::ctrl11::GPIO_OUT_SEL_W
- gpio::ctrl11::INP_DIS_R
- gpio::ctrl11::INP_DIS_W
- gpio::ctrl11::INTR_DET_R
- gpio::ctrl11::INTR_DET_W
- gpio::ctrl11::MUX_CTRL_R
- gpio::ctrl11::MUX_CTRL_W
- gpio::ctrl11::OUT_BUFF_TYPE_R
- gpio::ctrl11::OUT_BUFF_TYPE_W
- gpio::ctrl11::POL_R
- gpio::ctrl11::POL_W
- gpio::ctrl11::PU_PD_R
- gpio::ctrl11::PU_PD_W
- gpio::ctrl11::PWR_GATING_R
- gpio::ctrl11::PWR_GATING_W
- gpio::ctrl12::ALT_GPIO_DATA_R
- gpio::ctrl12::ALT_GPIO_DATA_W
- gpio::ctrl12::EDGE_EN_R
- gpio::ctrl12::EDGE_EN_W
- gpio::ctrl12::GPIO_DIR_R
- gpio::ctrl12::GPIO_DIR_W
- gpio::ctrl12::GPIO_INP_R
- gpio::ctrl12::GPIO_INP_W
- gpio::ctrl12::GPIO_OUT_SEL_R
- gpio::ctrl12::GPIO_OUT_SEL_W
- gpio::ctrl12::INP_DIS_R
- gpio::ctrl12::INP_DIS_W
- gpio::ctrl12::INTR_DET_R
- gpio::ctrl12::INTR_DET_W
- gpio::ctrl12::MUX_CTRL_R
- gpio::ctrl12::MUX_CTRL_W
- gpio::ctrl12::OUT_BUFF_TYPE_R
- gpio::ctrl12::OUT_BUFF_TYPE_W
- gpio::ctrl12::POL_R
- gpio::ctrl12::POL_W
- gpio::ctrl12::PU_PD_R
- gpio::ctrl12::PU_PD_W
- gpio::ctrl12::PWR_GATING_R
- gpio::ctrl12::PWR_GATING_W
- gpio::ctrl13::ALT_GPIO_DATA_R
- gpio::ctrl13::ALT_GPIO_DATA_W
- gpio::ctrl13::EDGE_EN_R
- gpio::ctrl13::EDGE_EN_W
- gpio::ctrl13::GPIO_DIR_R
- gpio::ctrl13::GPIO_DIR_W
- gpio::ctrl13::GPIO_INP_R
- gpio::ctrl13::GPIO_INP_W
- gpio::ctrl13::GPIO_OUT_SEL_R
- gpio::ctrl13::GPIO_OUT_SEL_W
- gpio::ctrl13::INP_DIS_R
- gpio::ctrl13::INP_DIS_W
- gpio::ctrl13::INTR_DET_R
- gpio::ctrl13::INTR_DET_W
- gpio::ctrl13::MUX_CTRL_R
- gpio::ctrl13::MUX_CTRL_W
- gpio::ctrl13::OUT_BUFF_TYPE_R
- gpio::ctrl13::OUT_BUFF_TYPE_W
- gpio::ctrl13::POL_R
- gpio::ctrl13::POL_W
- gpio::ctrl13::PU_PD_R
- gpio::ctrl13::PU_PD_W
- gpio::ctrl13::PWR_GATING_R
- gpio::ctrl13::PWR_GATING_W
- gpio::ctrl14::ALT_GPIO_DATA_R
- gpio::ctrl14::ALT_GPIO_DATA_W
- gpio::ctrl14::EDGE_EN_R
- gpio::ctrl14::EDGE_EN_W
- gpio::ctrl14::GPIO_DIR_R
- gpio::ctrl14::GPIO_DIR_W
- gpio::ctrl14::GPIO_INP_R
- gpio::ctrl14::GPIO_INP_W
- gpio::ctrl14::GPIO_OUT_SEL_R
- gpio::ctrl14::GPIO_OUT_SEL_W
- gpio::ctrl14::INP_DIS_R
- gpio::ctrl14::INP_DIS_W
- gpio::ctrl14::INTR_DET_R
- gpio::ctrl14::INTR_DET_W
- gpio::ctrl14::MUX_CTRL_R
- gpio::ctrl14::MUX_CTRL_W
- gpio::ctrl14::OUT_BUFF_TYPE_R
- gpio::ctrl14::OUT_BUFF_TYPE_W
- gpio::ctrl14::POL_R
- gpio::ctrl14::POL_W
- gpio::ctrl14::PU_PD_R
- gpio::ctrl14::PU_PD_W
- gpio::ctrl14::PWR_GATING_R
- gpio::ctrl14::PWR_GATING_W
- gpio::ctrl15::ALT_GPIO_DATA_R
- gpio::ctrl15::ALT_GPIO_DATA_W
- gpio::ctrl15::EDGE_EN_R
- gpio::ctrl15::EDGE_EN_W
- gpio::ctrl15::GPIO_DIR_R
- gpio::ctrl15::GPIO_DIR_W
- gpio::ctrl15::GPIO_INP_R
- gpio::ctrl15::GPIO_INP_W
- gpio::ctrl15::GPIO_OUT_SEL_R
- gpio::ctrl15::GPIO_OUT_SEL_W
- gpio::ctrl15::INP_DIS_R
- gpio::ctrl15::INP_DIS_W
- gpio::ctrl15::INTR_DET_R
- gpio::ctrl15::INTR_DET_W
- gpio::ctrl15::MUX_CTRL_R
- gpio::ctrl15::MUX_CTRL_W
- gpio::ctrl15::OUT_BUFF_TYPE_R
- gpio::ctrl15::OUT_BUFF_TYPE_W
- gpio::ctrl15::POL_R
- gpio::ctrl15::POL_W
- gpio::ctrl15::PU_PD_R
- gpio::ctrl15::PU_PD_W
- gpio::ctrl15::PWR_GATING_R
- gpio::ctrl15::PWR_GATING_W
- gpio::ctrl16::ALT_GPIO_DATA_R
- gpio::ctrl16::ALT_GPIO_DATA_W
- gpio::ctrl16::EDGE_EN_R
- gpio::ctrl16::EDGE_EN_W
- gpio::ctrl16::GPIO_DIR_R
- gpio::ctrl16::GPIO_DIR_W
- gpio::ctrl16::GPIO_INP_R
- gpio::ctrl16::GPIO_INP_W
- gpio::ctrl16::GPIO_OUT_SEL_R
- gpio::ctrl16::GPIO_OUT_SEL_W
- gpio::ctrl16::INP_DIS_R
- gpio::ctrl16::INP_DIS_W
- gpio::ctrl16::INTR_DET_R
- gpio::ctrl16::INTR_DET_W
- gpio::ctrl16::MUX_CTRL_R
- gpio::ctrl16::MUX_CTRL_W
- gpio::ctrl16::OUT_BUFF_TYPE_R
- gpio::ctrl16::OUT_BUFF_TYPE_W
- gpio::ctrl16::POL_R
- gpio::ctrl16::POL_W
- gpio::ctrl16::PU_PD_R
- gpio::ctrl16::PU_PD_W
- gpio::ctrl16::PWR_GATING_R
- gpio::ctrl16::PWR_GATING_W
- gpio::ctrl17::ALT_GPIO_DATA_R
- gpio::ctrl17::ALT_GPIO_DATA_W
- gpio::ctrl17::EDGE_EN_R
- gpio::ctrl17::EDGE_EN_W
- gpio::ctrl17::GPIO_DIR_R
- gpio::ctrl17::GPIO_DIR_W
- gpio::ctrl17::GPIO_INP_R
- gpio::ctrl17::GPIO_INP_W
- gpio::ctrl17::GPIO_OUT_SEL_R
- gpio::ctrl17::GPIO_OUT_SEL_W
- gpio::ctrl17::INP_DIS_R
- gpio::ctrl17::INP_DIS_W
- gpio::ctrl17::INTR_DET_R
- gpio::ctrl17::INTR_DET_W
- gpio::ctrl17::MUX_CTRL_R
- gpio::ctrl17::MUX_CTRL_W
- gpio::ctrl17::OUT_BUFF_TYPE_R
- gpio::ctrl17::OUT_BUFF_TYPE_W
- gpio::ctrl17::POL_R
- gpio::ctrl17::POL_W
- gpio::ctrl17::PU_PD_R
- gpio::ctrl17::PU_PD_W
- gpio::ctrl17::PWR_GATING_R
- gpio::ctrl17::PWR_GATING_W
- gpio::ctrl1::ALT_GPIO_DATA_R
- gpio::ctrl1::ALT_GPIO_DATA_W
- gpio::ctrl1::EDGE_EN_R
- gpio::ctrl1::EDGE_EN_W
- gpio::ctrl1::GPIO_DIR_R
- gpio::ctrl1::GPIO_DIR_W
- gpio::ctrl1::GPIO_INP_R
- gpio::ctrl1::GPIO_INP_W
- gpio::ctrl1::GPIO_OUT_SEL_R
- gpio::ctrl1::GPIO_OUT_SEL_W
- gpio::ctrl1::INP_DIS_R
- gpio::ctrl1::INP_DIS_W
- gpio::ctrl1::INTR_DET_R
- gpio::ctrl1::INTR_DET_W
- gpio::ctrl1::MUX_CTRL_R
- gpio::ctrl1::MUX_CTRL_W
- gpio::ctrl1::OUT_BUFF_TYPE_R
- gpio::ctrl1::OUT_BUFF_TYPE_W
- gpio::ctrl1::POL_R
- gpio::ctrl1::POL_W
- gpio::ctrl1::PU_PD_R
- gpio::ctrl1::PU_PD_W
- gpio::ctrl1::PWR_GATING_R
- gpio::ctrl1::PWR_GATING_W
- gpio::ctrl20::ALT_GPIO_DATA_R
- gpio::ctrl20::ALT_GPIO_DATA_W
- gpio::ctrl20::EDGE_EN_R
- gpio::ctrl20::EDGE_EN_W
- gpio::ctrl20::GPIO_DIR_R
- gpio::ctrl20::GPIO_DIR_W
- gpio::ctrl20::GPIO_INP_R
- gpio::ctrl20::GPIO_INP_W
- gpio::ctrl20::GPIO_OUT_SEL_R
- gpio::ctrl20::GPIO_OUT_SEL_W
- gpio::ctrl20::INP_DIS_R
- gpio::ctrl20::INP_DIS_W
- gpio::ctrl20::INTR_DET_R
- gpio::ctrl20::INTR_DET_W
- gpio::ctrl20::MUX_CTRL_R
- gpio::ctrl20::MUX_CTRL_W
- gpio::ctrl20::OUT_BUFF_TYPE_R
- gpio::ctrl20::OUT_BUFF_TYPE_W
- gpio::ctrl20::POL_R
- gpio::ctrl20::POL_W
- gpio::ctrl20::PU_PD_R
- gpio::ctrl20::PU_PD_W
- gpio::ctrl20::PWR_GATING_R
- gpio::ctrl20::PWR_GATING_W
- gpio::ctrl21::ALT_GPIO_DATA_R
- gpio::ctrl21::ALT_GPIO_DATA_W
- gpio::ctrl21::EDGE_EN_R
- gpio::ctrl21::EDGE_EN_W
- gpio::ctrl21::GPIO_DIR_R
- gpio::ctrl21::GPIO_DIR_W
- gpio::ctrl21::GPIO_INP_R
- gpio::ctrl21::GPIO_INP_W
- gpio::ctrl21::GPIO_OUT_SEL_R
- gpio::ctrl21::GPIO_OUT_SEL_W
- gpio::ctrl21::INP_DIS_R
- gpio::ctrl21::INP_DIS_W
- gpio::ctrl21::INTR_DET_R
- gpio::ctrl21::INTR_DET_W
- gpio::ctrl21::MUX_CTRL_R
- gpio::ctrl21::MUX_CTRL_W
- gpio::ctrl21::OUT_BUFF_TYPE_R
- gpio::ctrl21::OUT_BUFF_TYPE_W
- gpio::ctrl21::POL_R
- gpio::ctrl21::POL_W
- gpio::ctrl21::PU_PD_R
- gpio::ctrl21::PU_PD_W
- gpio::ctrl21::PWR_GATING_R
- gpio::ctrl21::PWR_GATING_W
- gpio::ctrl22::ALT_GPIO_DATA_R
- gpio::ctrl22::ALT_GPIO_DATA_W
- gpio::ctrl22::EDGE_EN_R
- gpio::ctrl22::EDGE_EN_W
- gpio::ctrl22::GPIO_DIR_R
- gpio::ctrl22::GPIO_DIR_W
- gpio::ctrl22::GPIO_INP_R
- gpio::ctrl22::GPIO_INP_W
- gpio::ctrl22::GPIO_OUT_SEL_R
- gpio::ctrl22::GPIO_OUT_SEL_W
- gpio::ctrl22::INP_DIS_R
- gpio::ctrl22::INP_DIS_W
- gpio::ctrl22::INTR_DET_R
- gpio::ctrl22::INTR_DET_W
- gpio::ctrl22::MUX_CTRL_R
- gpio::ctrl22::MUX_CTRL_W
- gpio::ctrl22::OUT_BUFF_TYPE_R
- gpio::ctrl22::OUT_BUFF_TYPE_W
- gpio::ctrl22::POL_R
- gpio::ctrl22::POL_W
- gpio::ctrl22::PU_PD_R
- gpio::ctrl22::PU_PD_W
- gpio::ctrl22::PWR_GATING_R
- gpio::ctrl22::PWR_GATING_W
- gpio::ctrl23::ALT_GPIO_DATA_R
- gpio::ctrl23::ALT_GPIO_DATA_W
- gpio::ctrl23::EDGE_EN_R
- gpio::ctrl23::EDGE_EN_W
- gpio::ctrl23::GPIO_DIR_R
- gpio::ctrl23::GPIO_DIR_W
- gpio::ctrl23::GPIO_INP_R
- gpio::ctrl23::GPIO_INP_W
- gpio::ctrl23::GPIO_OUT_SEL_R
- gpio::ctrl23::GPIO_OUT_SEL_W
- gpio::ctrl23::INP_DIS_R
- gpio::ctrl23::INP_DIS_W
- gpio::ctrl23::INTR_DET_R
- gpio::ctrl23::INTR_DET_W
- gpio::ctrl23::MUX_CTRL_R
- gpio::ctrl23::MUX_CTRL_W
- gpio::ctrl23::OUT_BUFF_TYPE_R
- gpio::ctrl23::OUT_BUFF_TYPE_W
- gpio::ctrl23::POL_R
- gpio::ctrl23::POL_W
- gpio::ctrl23::PU_PD_R
- gpio::ctrl23::PU_PD_W
- gpio::ctrl23::PWR_GATING_R
- gpio::ctrl23::PWR_GATING_W
- gpio::ctrl24::ALT_GPIO_DATA_R
- gpio::ctrl24::ALT_GPIO_DATA_W
- gpio::ctrl24::EDGE_EN_R
- gpio::ctrl24::EDGE_EN_W
- gpio::ctrl24::GPIO_DIR_R
- gpio::ctrl24::GPIO_DIR_W
- gpio::ctrl24::GPIO_INP_R
- gpio::ctrl24::GPIO_INP_W
- gpio::ctrl24::GPIO_OUT_SEL_R
- gpio::ctrl24::GPIO_OUT_SEL_W
- gpio::ctrl24::INP_DIS_R
- gpio::ctrl24::INP_DIS_W
- gpio::ctrl24::INTR_DET_R
- gpio::ctrl24::INTR_DET_W
- gpio::ctrl24::MUX_CTRL_R
- gpio::ctrl24::MUX_CTRL_W
- gpio::ctrl24::OUT_BUFF_TYPE_R
- gpio::ctrl24::OUT_BUFF_TYPE_W
- gpio::ctrl24::POL_R
- gpio::ctrl24::POL_W
- gpio::ctrl24::PU_PD_R
- gpio::ctrl24::PU_PD_W
- gpio::ctrl24::PWR_GATING_R
- gpio::ctrl24::PWR_GATING_W
- gpio::ctrl25::ALT_GPIO_DATA_R
- gpio::ctrl25::ALT_GPIO_DATA_W
- gpio::ctrl25::EDGE_EN_R
- gpio::ctrl25::EDGE_EN_W
- gpio::ctrl25::GPIO_DIR_R
- gpio::ctrl25::GPIO_DIR_W
- gpio::ctrl25::GPIO_INP_R
- gpio::ctrl25::GPIO_INP_W
- gpio::ctrl25::GPIO_OUT_SEL_R
- gpio::ctrl25::GPIO_OUT_SEL_W
- gpio::ctrl25::INP_DIS_R
- gpio::ctrl25::INP_DIS_W
- gpio::ctrl25::INTR_DET_R
- gpio::ctrl25::INTR_DET_W
- gpio::ctrl25::MUX_CTRL_R
- gpio::ctrl25::MUX_CTRL_W
- gpio::ctrl25::OUT_BUFF_TYPE_R
- gpio::ctrl25::OUT_BUFF_TYPE_W
- gpio::ctrl25::POL_R
- gpio::ctrl25::POL_W
- gpio::ctrl25::PU_PD_R
- gpio::ctrl25::PU_PD_W
- gpio::ctrl25::PWR_GATING_R
- gpio::ctrl25::PWR_GATING_W
- gpio::ctrl26::ALT_GPIO_DATA_R
- gpio::ctrl26::ALT_GPIO_DATA_W
- gpio::ctrl26::EDGE_EN_R
- gpio::ctrl26::EDGE_EN_W
- gpio::ctrl26::GPIO_DIR_R
- gpio::ctrl26::GPIO_DIR_W
- gpio::ctrl26::GPIO_INP_R
- gpio::ctrl26::GPIO_INP_W
- gpio::ctrl26::GPIO_OUT_SEL_R
- gpio::ctrl26::GPIO_OUT_SEL_W
- gpio::ctrl26::INP_DIS_R
- gpio::ctrl26::INP_DIS_W
- gpio::ctrl26::INTR_DET_R
- gpio::ctrl26::INTR_DET_W
- gpio::ctrl26::MUX_CTRL_R
- gpio::ctrl26::MUX_CTRL_W
- gpio::ctrl26::OUT_BUFF_TYPE_R
- gpio::ctrl26::OUT_BUFF_TYPE_W
- gpio::ctrl26::POL_R
- gpio::ctrl26::POL_W
- gpio::ctrl26::PU_PD_R
- gpio::ctrl26::PU_PD_W
- gpio::ctrl26::PWR_GATING_R
- gpio::ctrl26::PWR_GATING_W
- gpio::ctrl2::ALT_GPIO_DATA_R
- gpio::ctrl2::ALT_GPIO_DATA_W
- gpio::ctrl2::EDGE_EN_R
- gpio::ctrl2::EDGE_EN_W
- gpio::ctrl2::GPIO_DIR_R
- gpio::ctrl2::GPIO_DIR_W
- gpio::ctrl2::GPIO_INP_R
- gpio::ctrl2::GPIO_INP_W
- gpio::ctrl2::GPIO_OUT_SEL_R
- gpio::ctrl2::GPIO_OUT_SEL_W
- gpio::ctrl2::INP_DIS_R
- gpio::ctrl2::INP_DIS_W
- gpio::ctrl2::INTR_DET_R
- gpio::ctrl2::INTR_DET_W
- gpio::ctrl2::MUX_CTRL_R
- gpio::ctrl2::MUX_CTRL_W
- gpio::ctrl2::OUT_BUFF_TYPE_R
- gpio::ctrl2::OUT_BUFF_TYPE_W
- gpio::ctrl2::POL_R
- gpio::ctrl2::POL_W
- gpio::ctrl2::PU_PD_R
- gpio::ctrl2::PU_PD_W
- gpio::ctrl2::PWR_GATING_R
- gpio::ctrl2::PWR_GATING_W
- gpio::ctrl2p0::DRIV_STREN_R
- gpio::ctrl2p0::DRIV_STREN_W
- gpio::ctrl2p0::SLEW_CTRL_R
- gpio::ctrl2p0::SLEW_CTRL_W
- gpio::ctrl2p10::DRIV_STREN_R
- gpio::ctrl2p10::DRIV_STREN_W
- gpio::ctrl2p10::SLEW_CTRL_R
- gpio::ctrl2p10::SLEW_CTRL_W
- gpio::ctrl2p11::DRIV_STREN_R
- gpio::ctrl2p11::DRIV_STREN_W
- gpio::ctrl2p11::SLEW_CTRL_R
- gpio::ctrl2p11::SLEW_CTRL_W
- gpio::ctrl2p12::DRIV_STREN_R
- gpio::ctrl2p12::DRIV_STREN_W
- gpio::ctrl2p12::SLEW_CTRL_R
- gpio::ctrl2p12::SLEW_CTRL_W
- gpio::ctrl2p13::DRIV_STREN_R
- gpio::ctrl2p13::DRIV_STREN_W
- gpio::ctrl2p13::SLEW_CTRL_R
- gpio::ctrl2p13::SLEW_CTRL_W
- gpio::ctrl2p14::DRIV_STREN_R
- gpio::ctrl2p14::DRIV_STREN_W
- gpio::ctrl2p14::SLEW_CTRL_R
- gpio::ctrl2p14::SLEW_CTRL_W
- gpio::ctrl2p15::DRIV_STREN_R
- gpio::ctrl2p15::DRIV_STREN_W
- gpio::ctrl2p15::SLEW_CTRL_R
- gpio::ctrl2p15::SLEW_CTRL_W
- gpio::ctrl2p16::DRIV_STREN_R
- gpio::ctrl2p16::DRIV_STREN_W
- gpio::ctrl2p16::SLEW_CTRL_R
- gpio::ctrl2p16::SLEW_CTRL_W
- gpio::ctrl2p17::DRIV_STREN_R
- gpio::ctrl2p17::DRIV_STREN_W
- gpio::ctrl2p17::SLEW_CTRL_R
- gpio::ctrl2p17::SLEW_CTRL_W
- gpio::ctrl2p1::DRIV_STREN_R
- gpio::ctrl2p1::DRIV_STREN_W
- gpio::ctrl2p1::SLEW_CTRL_R
- gpio::ctrl2p1::SLEW_CTRL_W
- gpio::ctrl2p20::DRIV_STREN_R
- gpio::ctrl2p20::DRIV_STREN_W
- gpio::ctrl2p20::SLEW_CTRL_R
- gpio::ctrl2p20::SLEW_CTRL_W
- gpio::ctrl2p21::DRIV_STREN_R
- gpio::ctrl2p21::DRIV_STREN_W
- gpio::ctrl2p21::SLEW_CTRL_R
- gpio::ctrl2p21::SLEW_CTRL_W
- gpio::ctrl2p22::DRIV_STREN_R
- gpio::ctrl2p22::DRIV_STREN_W
- gpio::ctrl2p22::SLEW_CTRL_R
- gpio::ctrl2p22::SLEW_CTRL_W
- gpio::ctrl2p23::DRIV_STREN_R
- gpio::ctrl2p23::DRIV_STREN_W
- gpio::ctrl2p23::SLEW_CTRL_R
- gpio::ctrl2p23::SLEW_CTRL_W
- gpio::ctrl2p24::DRIV_STREN_R
- gpio::ctrl2p24::DRIV_STREN_W
- gpio::ctrl2p24::SLEW_CTRL_R
- gpio::ctrl2p24::SLEW_CTRL_W
- gpio::ctrl2p25::DRIV_STREN_R
- gpio::ctrl2p25::DRIV_STREN_W
- gpio::ctrl2p25::SLEW_CTRL_R
- gpio::ctrl2p25::SLEW_CTRL_W
- gpio::ctrl2p26::DRIV_STREN_R
- gpio::ctrl2p26::DRIV_STREN_W
- gpio::ctrl2p26::SLEW_CTRL_R
- gpio::ctrl2p26::SLEW_CTRL_W
- gpio::ctrl2p2::DRIV_STREN_R
- gpio::ctrl2p2::DRIV_STREN_W
- gpio::ctrl2p2::SLEW_CTRL_R
- gpio::ctrl2p2::SLEW_CTRL_W
- gpio::ctrl2p3::DRIV_STREN_R
- gpio::ctrl2p3::DRIV_STREN_W
- gpio::ctrl2p3::SLEW_CTRL_R
- gpio::ctrl2p3::SLEW_CTRL_W
- gpio::ctrl2p4::DRIV_STREN_R
- gpio::ctrl2p4::DRIV_STREN_W
- gpio::ctrl2p4::SLEW_CTRL_R
- gpio::ctrl2p4::SLEW_CTRL_W
- gpio::ctrl2p5::DRIV_STREN_R
- gpio::ctrl2p5::DRIV_STREN_W
- gpio::ctrl2p5::SLEW_CTRL_R
- gpio::ctrl2p5::SLEW_CTRL_W
- gpio::ctrl2p6::DRIV_STREN_R
- gpio::ctrl2p6::DRIV_STREN_W
- gpio::ctrl2p6::SLEW_CTRL_R
- gpio::ctrl2p6::SLEW_CTRL_W
- gpio::ctrl2p7::DRIV_STREN_R
- gpio::ctrl2p7::DRIV_STREN_W
- gpio::ctrl2p7::SLEW_CTRL_R
- gpio::ctrl2p7::SLEW_CTRL_W
- gpio::ctrl3::ALT_GPIO_DATA_R
- gpio::ctrl3::ALT_GPIO_DATA_W
- gpio::ctrl3::EDGE_EN_R
- gpio::ctrl3::EDGE_EN_W
- gpio::ctrl3::GPIO_DIR_R
- gpio::ctrl3::GPIO_DIR_W
- gpio::ctrl3::GPIO_INP_R
- gpio::ctrl3::GPIO_INP_W
- gpio::ctrl3::GPIO_OUT_SEL_R
- gpio::ctrl3::GPIO_OUT_SEL_W
- gpio::ctrl3::INP_DIS_R
- gpio::ctrl3::INP_DIS_W
- gpio::ctrl3::INTR_DET_R
- gpio::ctrl3::INTR_DET_W
- gpio::ctrl3::MUX_CTRL_R
- gpio::ctrl3::MUX_CTRL_W
- gpio::ctrl3::OUT_BUFF_TYPE_R
- gpio::ctrl3::OUT_BUFF_TYPE_W
- gpio::ctrl3::POL_R
- gpio::ctrl3::POL_W
- gpio::ctrl3::PU_PD_R
- gpio::ctrl3::PU_PD_W
- gpio::ctrl3::PWR_GATING_R
- gpio::ctrl3::PWR_GATING_W
- gpio::ctrl4::ALT_GPIO_DATA_R
- gpio::ctrl4::ALT_GPIO_DATA_W
- gpio::ctrl4::EDGE_EN_R
- gpio::ctrl4::EDGE_EN_W
- gpio::ctrl4::GPIO_DIR_R
- gpio::ctrl4::GPIO_DIR_W
- gpio::ctrl4::GPIO_INP_R
- gpio::ctrl4::GPIO_INP_W
- gpio::ctrl4::GPIO_OUT_SEL_R
- gpio::ctrl4::GPIO_OUT_SEL_W
- gpio::ctrl4::INP_DIS_R
- gpio::ctrl4::INP_DIS_W
- gpio::ctrl4::INTR_DET_R
- gpio::ctrl4::INTR_DET_W
- gpio::ctrl4::MUX_CTRL_R
- gpio::ctrl4::MUX_CTRL_W
- gpio::ctrl4::OUT_BUFF_TYPE_R
- gpio::ctrl4::OUT_BUFF_TYPE_W
- gpio::ctrl4::POL_R
- gpio::ctrl4::POL_W
- gpio::ctrl4::PU_PD_R
- gpio::ctrl4::PU_PD_W
- gpio::ctrl4::PWR_GATING_R
- gpio::ctrl4::PWR_GATING_W
- gpio::ctrl5::ALT_GPIO_DATA_R
- gpio::ctrl5::ALT_GPIO_DATA_W
- gpio::ctrl5::EDGE_EN_R
- gpio::ctrl5::EDGE_EN_W
- gpio::ctrl5::GPIO_DIR_R
- gpio::ctrl5::GPIO_DIR_W
- gpio::ctrl5::GPIO_INP_R
- gpio::ctrl5::GPIO_INP_W
- gpio::ctrl5::GPIO_OUT_SEL_R
- gpio::ctrl5::GPIO_OUT_SEL_W
- gpio::ctrl5::INP_DIS_R
- gpio::ctrl5::INP_DIS_W
- gpio::ctrl5::INTR_DET_R
- gpio::ctrl5::INTR_DET_W
- gpio::ctrl5::MUX_CTRL_R
- gpio::ctrl5::MUX_CTRL_W
- gpio::ctrl5::OUT_BUFF_TYPE_R
- gpio::ctrl5::OUT_BUFF_TYPE_W
- gpio::ctrl5::POL_R
- gpio::ctrl5::POL_W
- gpio::ctrl5::PU_PD_R
- gpio::ctrl5::PU_PD_W
- gpio::ctrl5::PWR_GATING_R
- gpio::ctrl5::PWR_GATING_W
- gpio::ctrl6::ALT_GPIO_DATA_R
- gpio::ctrl6::ALT_GPIO_DATA_W
- gpio::ctrl6::EDGE_EN_R
- gpio::ctrl6::EDGE_EN_W
- gpio::ctrl6::GPIO_DIR_R
- gpio::ctrl6::GPIO_DIR_W
- gpio::ctrl6::GPIO_INP_R
- gpio::ctrl6::GPIO_INP_W
- gpio::ctrl6::GPIO_OUT_SEL_R
- gpio::ctrl6::GPIO_OUT_SEL_W
- gpio::ctrl6::INP_DIS_R
- gpio::ctrl6::INP_DIS_W
- gpio::ctrl6::INTR_DET_R
- gpio::ctrl6::INTR_DET_W
- gpio::ctrl6::MUX_CTRL_R
- gpio::ctrl6::MUX_CTRL_W
- gpio::ctrl6::OUT_BUFF_TYPE_R
- gpio::ctrl6::OUT_BUFF_TYPE_W
- gpio::ctrl6::POL_R
- gpio::ctrl6::POL_W
- gpio::ctrl6::PU_PD_R
- gpio::ctrl6::PU_PD_W
- gpio::ctrl6::PWR_GATING_R
- gpio::ctrl6::PWR_GATING_W
- gpio::ctrl7::ALT_GPIO_DATA_R
- gpio::ctrl7::ALT_GPIO_DATA_W
- gpio::ctrl7::EDGE_EN_R
- gpio::ctrl7::EDGE_EN_W
- gpio::ctrl7::GPIO_DIR_R
- gpio::ctrl7::GPIO_DIR_W
- gpio::ctrl7::GPIO_INP_R
- gpio::ctrl7::GPIO_INP_W
- gpio::ctrl7::GPIO_OUT_SEL_R
- gpio::ctrl7::GPIO_OUT_SEL_W
- gpio::ctrl7::INP_DIS_R
- gpio::ctrl7::INP_DIS_W
- gpio::ctrl7::INTR_DET_R
- gpio::ctrl7::INTR_DET_W
- gpio::ctrl7::MUX_CTRL_R
- gpio::ctrl7::MUX_CTRL_W
- gpio::ctrl7::OUT_BUFF_TYPE_R
- gpio::ctrl7::OUT_BUFF_TYPE_W
- gpio::ctrl7::POL_R
- gpio::ctrl7::POL_W
- gpio::ctrl7::PU_PD_R
- gpio::ctrl7::PU_PD_W
- gpio::ctrl7::PWR_GATING_R
- gpio::ctrl7::PWR_GATING_W
- htm0::CNT
- htm0::CTRL
- htm0::PRLD
- htm0::ctrl::CTRL_R
- htm0::ctrl::CTRL_W
- i2c0::BB_CTRL
- i2c0::BLKID
- i2c0::BLKREV
- i2c0::BUSCLK
- i2c0::CFG
- i2c0::CLKSYNC
- i2c0::COMPL
- i2c0::DATATM
- i2c0::I2CDATA
- i2c0::OWN_ADDR
- i2c0::PRM_CTRL
- i2c0::PRM_IEN
- i2c0::PRM_STS
- i2c0::RSHTM
- i2c0::RSTS
- i2c0::RSVD1
- i2c0::RSVD2
- i2c0::SLV_ADDR
- i2c0::TMOUTSC
- i2c0::WAKE_EN
- i2c0::WAKE_STS
- i2c0::WCTRL
- i2c0::bb_ctrl::BBCLKI_R
- i2c0::bb_ctrl::BBCLKI_W
- i2c0::bb_ctrl::BBCLK_R
- i2c0::bb_ctrl::BBCLK_W
- i2c0::bb_ctrl::BBDATI_R
- i2c0::bb_ctrl::BBDATI_W
- i2c0::bb_ctrl::BBDAT_R
- i2c0::bb_ctrl::BBDAT_W
- i2c0::bb_ctrl::BBEN_R
- i2c0::bb_ctrl::BBEN_W
- i2c0::bb_ctrl::CLDIR_R
- i2c0::bb_ctrl::CLDIR_W
- i2c0::bb_ctrl::DADIR_R
- i2c0::bb_ctrl::DADIR_W
- i2c0::blkid::ID_R
- i2c0::blkrev::REV_R
- i2c0::busclk::HIGH_PER_R
- i2c0::busclk::HIGH_PER_W
- i2c0::busclk::LOW_PER_R
- i2c0::busclk::LOW_PER_W
- i2c0::cfg::CNFG_PROMIS_R
- i2c0::cfg::CNFG_PROMIS_W
- i2c0::cfg::EN_R
- i2c0::cfg::EN_W
- i2c0::cfg::FEN_R
- i2c0::cfg::FEN_W
- i2c0::cfg::GC_DIS_R
- i2c0::cfg::GC_DIS_W
- i2c0::cfg::PORT_SEL_R
- i2c0::cfg::PORT_SEL_W
- i2c0::cfg::RST_R
- i2c0::cfg::RST_W
- i2c0::cfg::SLOW_CLK_R
- i2c0::cfg::SLOW_CLK_W
- i2c0::cfg::TCEN_R
- i2c0::cfg::TCEN_W
- i2c0::cfg::TEST0_R
- i2c0::cfg::TEST0_W
- i2c0::cfg::TEST_R
- i2c0::cfg::TEST_W
- i2c0::clksync::CLK_SYNC_R
- i2c0::compl::BER_R
- i2c0::compl::BER_W
- i2c0::compl::BIDEN_R
- i2c0::compl::BIDEN_W
- i2c0::compl::CHDH_R
- i2c0::compl::CHDH_W
- i2c0::compl::CHDL_R
- i2c0::compl::CHDL_W
- i2c0::compl::DTEN_R
- i2c0::compl::DTEN_W
- i2c0::compl::DTO_R
- i2c0::compl::DTO_W
- i2c0::compl::IDLE_R
- i2c0::compl::IDLE_W
- i2c0::compl::LAB_R
- i2c0::compl::LAB_W
- i2c0::compl::MCEN_R
- i2c0::compl::MCEN_W
- i2c0::compl::MCTO_R
- i2c0::compl::MCTO_W
- i2c0::compl::MDONE_R
- i2c0::compl::MDONE_W
- i2c0::compl::MNAKX_R
- i2c0::compl::MNAKX_W
- i2c0::compl::MTR_R
- i2c0::compl::MTR_W
- i2c0::compl::REP_RD_R
- i2c0::compl::REP_RD_W
- i2c0::compl::REP_WR_R
- i2c0::compl::REP_WR_W
- i2c0::compl::SCEN_R
- i2c0::compl::SCEN_W
- i2c0::compl::SCTO_R
- i2c0::compl::SCTO_W
- i2c0::compl::SDONE_R
- i2c0::compl::SDONE_W
- i2c0::compl::SNAKR_R
- i2c0::compl::SNAKR_W
- i2c0::compl::STR_R
- i2c0::compl::STR_W
- i2c0::compl::TIMERR_R
- i2c0::compl::TIMERR_W
- i2c0::datatm::DATA_HOLD_R
- i2c0::datatm::DATA_HOLD_W
- i2c0::datatm::FIRST_START_HOLD_R
- i2c0::datatm::FIRST_START_HOLD_W
- i2c0::datatm::RESTART_SETUP_R
- i2c0::datatm::RESTART_SETUP_W
- i2c0::datatm::STOP_SETUP_R
- i2c0::datatm::STOP_SETUP_W
- i2c0::own_addr::ADDR1_R
- i2c0::own_addr::ADDR1_W
- i2c0::own_addr::ADDR2_R
- i2c0::own_addr::ADDR2_W
- i2c0::prm_ctrl::ACK_NAK_R
- i2c0::prm_ctrl::ACK_NAK_W
- i2c0::prm_ien::ADDR_R
- i2c0::prm_ien::ADDR_W
- i2c0::prm_sts::ADDR_INTR_R
- i2c0::prm_sts::ADDR_INTR_W
- i2c0::rshtm::RSHTM_R
- i2c0::rshtm::RSHTM_W
- i2c0::rsts::AAS_R
- i2c0::rsts::BER_R
- i2c0::rsts::LAB_R
- i2c0::rsts::LRB_AD0_R
- i2c0::rsts::NBB_R
- i2c0::rsts::PIN_R
- i2c0::rsts::SAD_R
- i2c0::rsts::STS_R
- i2c0::slv_addr::SADDR_R
- i2c0::slv_addr::SADDR_W
- i2c0::tmoutsc::BUS_IDLE_MIN_R
- i2c0::tmoutsc::BUS_IDLE_MIN_W
- i2c0::wake_en::START_DET_INT_EN_R
- i2c0::wake_en::START_DET_INT_EN_W
- i2c0::wake_sts::START_BIT_DET_R
- i2c0::wake_sts::START_BIT_DET_W
- i2c0::wctrl::ACK_W
- i2c0::wctrl::ENI_W
- i2c0::wctrl::ESO_W
- i2c0::wctrl::PIN_W
- i2c0::wctrl::STA_W
- i2c0::wctrl::STO_W
- led0::CFG
- led0::DLY
- led0::INTRVL
- led0::LIMIT
- led0::OUTDLY
- led0::STEP
- led0::cfg::CLK_SRC_R
- led0::cfg::CLK_SRC_W
- led0::cfg::CTRL_R
- led0::cfg::CTRL_W
- led0::cfg::EN_UPDATE_R
- led0::cfg::EN_UPDATE_W
- led0::cfg::PWM_SIZE_R
- led0::cfg::PWM_SIZE_W
- led0::cfg::RST_R
- led0::cfg::RST_W
- led0::cfg::SYMMETRY_R
- led0::cfg::SYMMETRY_W
- led0::cfg::SYNCH_R
- led0::cfg::SYNCH_W
- led0::cfg::WDT_RELOAD_R
- led0::cfg::WDT_RELOAD_W
- led0::dly::HIGH_PULSE_R
- led0::dly::HIGH_PULSE_W
- led0::dly::LOW_PULSE_R
- led0::dly::LOW_PULSE_W
- led0::intrvl::I0_R
- led0::intrvl::I0_W
- led0::intrvl::I1_R
- led0::intrvl::I1_W
- led0::intrvl::I2_R
- led0::intrvl::I2_W
- led0::intrvl::I3_R
- led0::intrvl::I3_W
- led0::intrvl::I4_R
- led0::intrvl::I4_W
- led0::intrvl::I5_R
- led0::intrvl::I5_W
- led0::intrvl::I6_R
- led0::intrvl::I6_W
- led0::intrvl::I7_R
- led0::intrvl::I7_W
- led0::limit::MAX_R
- led0::limit::MAX_W
- led0::limit::MIN_R
- led0::limit::MIN_W
- led0::outdly::DELAY_R
- led0::outdly::DELAY_W
- led0::step::S0_R
- led0::step::S0_W
- led0::step::S1_R
- led0::step::S1_W
- led0::step::S2_R
- led0::step::S2_W
- led0::step::S3_R
- led0::step::S3_W
- led0::step::S4_R
- led0::step::S4_W
- led0::step::S5_R
- led0::step::S5_W
- led0::step::S6_R
- led0::step::S6_W
- led0::step::S7_R
- led0::step::S7_W
- pcr::CLK_REQ_0
- pcr::CLK_REQ_1
- pcr::CLK_REQ_2
- pcr::CLK_REQ_3
- pcr::CLK_REQ_4
- pcr::LOCK_REG
- pcr::OSC_ID
- pcr::PROC_CLK_CTRL
- pcr::PWR_RST_CTRL
- pcr::PWR_RST_STS
- pcr::RST_EN_0
- pcr::RST_EN_1
- pcr::RST_EN_2
- pcr::RST_EN_3
- pcr::RST_EN_4
- pcr::SLOW_CLK_CTRL
- pcr::SLP_EN_0
- pcr::SLP_EN_1
- pcr::SLP_EN_2
- pcr::SLP_EN_3
- pcr::SLP_EN_4
- pcr::SYS_RST
- pcr::SYS_SLP_CTRL
- pcr::clk_req_0::JTAG_STAP_CLK_REQ_R
- pcr::clk_req_0::JTAG_STAP_CLK_REQ_W
- pcr::clk_req_0::OTP_CLK_REQ_R
- pcr::clk_req_0::OTP_CLK_REQ_W
- pcr::clk_req_1::DMA_CLK_REQ_R
- pcr::clk_req_1::DMA_CLK_REQ_W
- pcr::clk_req_1::EC_REG_BANK_CLK_REQ_R
- pcr::clk_req_1::EC_REG_BANK_CLK_REQ_W
- pcr::clk_req_1::INT_CLK_REQ_R
- pcr::clk_req_1::INT_CLK_REQ_W
- pcr::clk_req_1::PMC_CLK_REQ_R
- pcr::clk_req_1::PMC_CLK_REQ_W
- pcr::clk_req_1::PROC_CLK_REQ_R
- pcr::clk_req_1::PROC_CLK_REQ_W
- pcr::clk_req_1::PWM0_CLK_REQ_R
- pcr::clk_req_1::PWM0_CLK_REQ_W
- pcr::clk_req_1::PWM1_CLK_REQ_R
- pcr::clk_req_1::PWM1_CLK_REQ_W
- pcr::clk_req_1::PWM4_CLK_REQ_R
- pcr::clk_req_1::PWM4_CLK_REQ_W
- pcr::clk_req_1::PWM6_CLK_REQ_R
- pcr::clk_req_1::PWM6_CLK_REQ_W
- pcr::clk_req_1::PWM7_CLK_REQ_R
- pcr::clk_req_1::PWM7_CLK_REQ_W
- pcr::clk_req_1::SMB0_CLK_REQ_R
- pcr::clk_req_1::SMB0_CLK_REQ_W
- pcr::clk_req_1::TACH0_CLK_REQ_R
- pcr::clk_req_1::TACH0_CLK_REQ_W
- pcr::clk_req_1::TACH2_CLK_REQ_R
- pcr::clk_req_1::TACH2_CLK_REQ_W
- pcr::clk_req_1::TFDP_CLK_REQ_R
- pcr::clk_req_1::TFDP_CLK_REQ_W
- pcr::clk_req_1::TMR16_0_CLK_REQ_R
- pcr::clk_req_1::TMR16_0_CLK_REQ_W
- pcr::clk_req_1::TMR16_1_CLK_REQ_R
- pcr::clk_req_1::TMR16_1_CLK_REQ_W
- pcr::clk_req_1::WDT_CLK_REQ_R
- pcr::clk_req_1::WDT_CLK_REQ_W
- pcr::clk_req_2::GLBL_CFG_CLK_REQ_R
- pcr::clk_req_2::GLBL_CFG_CLK_REQ_W
- pcr::clk_req_2::IMAP_CLK_REQ_R
- pcr::clk_req_2::IMAP_CLK_REQ_W
- pcr::clk_req_2::RTC_CLK_REQ_R
- pcr::clk_req_2::RTC_CLK_REQ_W
- pcr::clk_req_2::UART0_CLK_REQ_R
- pcr::clk_req_2::UART0_CLK_REQ_W
- pcr::clk_req_2::UART1_CLK_REQ_R
- pcr::clk_req_2::UART1_CLK_REQ_W
- pcr::clk_req_3::ADC_CLK_REQ_R
- pcr::clk_req_3::ADC_CLK_REQ_W
- pcr::clk_req_3::AES_HASH_CLK_REQ_R
- pcr::clk_req_3::AES_HASH_CLK_REQ_W
- pcr::clk_req_3::CCTIMER_CLK_REQ_R
- pcr::clk_req_3::CCTIMER_CLK_REQ_W
- pcr::clk_req_3::HTM0_CLK_REQ_R
- pcr::clk_req_3::HTM0_CLK_REQ_W
- pcr::clk_req_3::HTM_1_CLK_REQ_R
- pcr::clk_req_3::HTM_1_CLK_REQ_W
- pcr::clk_req_3::LED0_CLK_REQ_R
- pcr::clk_req_3::LED0_CLK_REQ_W
- pcr::clk_req_3::PKE_CLK_REQ_R
- pcr::clk_req_3::PKE_CLK_REQ_W
- pcr::clk_req_3::PS2_0_CLK_REQ_R
- pcr::clk_req_3::PS2_0_CLK_REQ_W
- pcr::clk_req_3::RNG_CLK_REQ_R
- pcr::clk_req_3::RNG_CLK_REQ_W
- pcr::clk_req_3::SMB1_CLK_REQ_R
- pcr::clk_req_3::SMB1_CLK_REQ_W
- pcr::clk_req_3::SMB2_CLK_REQ_R
- pcr::clk_req_3::SMB2_CLK_REQ_W
- pcr::clk_req_3::SMB3_CLK_REQ_R
- pcr::clk_req_3::SMB3_CLK_REQ_W
- pcr::clk_req_3::SMB_4_CLK_REQ_R
- pcr::clk_req_3::SMB_4_CLK_REQ_W
- pcr::clk_req_3::TMR32_0_CLK_REQ_R
- pcr::clk_req_3::TMR32_0_CLK_REQ_W
- pcr::clk_req_3::TMR32_1_CLK_REQ_R
- pcr::clk_req_3::TMR32_1_CLK_REQ_W
- pcr::clk_req_4::QMSPI_CLK_REQ_R
- pcr::clk_req_4::QMSPI_CLK_REQ_W
- pcr::clk_req_4::RTOS_CLK_REQ_R
- pcr::clk_req_4::RTOS_CLK_REQ_W
- pcr::lock_reg::PCR_RST_EN_LOCK_R
- pcr::lock_reg::PCR_RST_EN_LOCK_W
- pcr::osc_id::PLL_LOCK_R
- pcr::osc_id::PLL_LOCK_W
- pcr::osc_id::TEST_R
- pcr::osc_id::TEST_W
- pcr::proc_clk_ctrl::DIV_R
- pcr::proc_clk_ctrl::DIV_W
- pcr::pwr_rst_ctrl::H_RST_SEL_R
- pcr::pwr_rst_ctrl::H_RST_SEL_W
- pcr::pwr_rst_ctrl::PWR_INV_R
- pcr::pwr_rst_ctrl::PWR_INV_W
- pcr::pwr_rst_sts::ACTIVE_32K_R
- pcr::pwr_rst_sts::ACTIVE_32K_W
- pcr::pwr_rst_sts::JTAG_RST_STS_R
- pcr::pwr_rst_sts::JTAG_RST_STS_W
- pcr::pwr_rst_sts::PCICLK_ACTIVE_R
- pcr::pwr_rst_sts::PCICLK_ACTIVE_W
- pcr::pwr_rst_sts::RST_H_STS_R
- pcr::pwr_rst_sts::RST_H_STS_W
- pcr::pwr_rst_sts::RST_SYS_STS_R
- pcr::pwr_rst_sts::RST_SYS_STS_W
- pcr::pwr_rst_sts::RST_VTR_STS_R
- pcr::pwr_rst_sts::RST_VTR_STS_W
- pcr::pwr_rst_sts::VBAT_RST_STS_R
- pcr::pwr_rst_sts::VBAT_RST_STS_W
- pcr::pwr_rst_sts::VCC_PWRGD_STS_R
- pcr::pwr_rst_sts::VCC_PWRGD_STS_W
- pcr::pwr_rst_sts::WDT_EVENT_R
- pcr::pwr_rst_sts::WDT_EVENT_W
- pcr::rst_en_0::OTP_RST_EN_R
- pcr::rst_en_0::OTP_RST_EN_W
- pcr::rst_en_1::DMA_RST_EN_R
- pcr::rst_en_1::DMA_RST_EN_W
- pcr::rst_en_1::INT_RST_EN_R
- pcr::rst_en_1::INT_RST_EN_W
- pcr::rst_en_1::PWM0_RST_EN_R
- pcr::rst_en_1::PWM0_RST_EN_W
- pcr::rst_en_1::PWM1_RST_EN_R
- pcr::rst_en_1::PWM1_RST_EN_W
- pcr::rst_en_1::PWM4_RST_EN_R
- pcr::rst_en_1::PWM4_RST_EN_W
- pcr::rst_en_1::PWM6_RST_EN_R
- pcr::rst_en_1::PWM6_RST_EN_W
- pcr::rst_en_1::PWM7_RST_EN_R
- pcr::rst_en_1::PWM7_RST_EN_W
- pcr::rst_en_1::SMB0_RST_EN_R
- pcr::rst_en_1::SMB0_RST_EN_W
- pcr::rst_en_1::TACH0_RST_EN_R
- pcr::rst_en_1::TACH0_RST_EN_W
- pcr::rst_en_1::TACH2_RST_EN_R
- pcr::rst_en_1::TACH2_RST_EN_W
- pcr::rst_en_1::TFDP_RST_EN_R
- pcr::rst_en_1::TFDP_RST_EN_W
- pcr::rst_en_1::TMR16_0_RST_EN_R
- pcr::rst_en_1::TMR16_0_RST_EN_W
- pcr::rst_en_1::TMR16_1_RST_EN_R
- pcr::rst_en_1::TMR16_1_RST_EN_W
- pcr::rst_en_1::WDT_RST_EN_R
- pcr::rst_en_1::WDT_RST_EN_W
- pcr::rst_en_2::ACPI_EC0_RST_EN_R
- pcr::rst_en_2::ACPI_EC0_RST_EN_W
- pcr::rst_en_2::ACPI_EC1_RST_EN_R
- pcr::rst_en_2::ACPI_EC1_RST_EN_W
- pcr::rst_en_2::ACPI_EC_2_RST_EN_R
- pcr::rst_en_2::ACPI_EC_2_RST_EN_W
- pcr::rst_en_2::ACPI_EC_3_RST_EN_R
- pcr::rst_en_2::ACPI_EC_3_RST_EN_W
- pcr::rst_en_2::ACPI_PM1_RST_EN_R
- pcr::rst_en_2::ACPI_PM1_RST_EN_W
- pcr::rst_en_2::IMAP_RST_EN_R
- pcr::rst_en_2::IMAP_RST_EN_W
- pcr::rst_en_2::MBX_RST_EN_R
- pcr::rst_en_2::MBX_RST_EN_W
- pcr::rst_en_2::PORT_80_0_RST_EN_R
- pcr::rst_en_2::PORT_80_0_RST_EN_W
- pcr::rst_en_2::PORT_80_1_RST_EN_R
- pcr::rst_en_2::PORT_80_1_RST_EN_W
- pcr::rst_en_2::RTC_RST_EN_R
- pcr::rst_en_2::RTC_RST_EN_W
- pcr::rst_en_2::SCRATCH_32_RST_EN_R
- pcr::rst_en_2::SCRATCH_32_RST_EN_W
- pcr::rst_en_2::UART0_RST_EN_R
- pcr::rst_en_2::UART0_RST_EN_W
- pcr::rst_en_2::UART1_RST_EN_R
- pcr::rst_en_2::UART1_RST_EN_W
- pcr::rst_en_3::ADC_RST_EN_R
- pcr::rst_en_3::ADC_RST_EN_W
- pcr::rst_en_3::AES_HASH_RST_EN_R
- pcr::rst_en_3::AES_HASH_RST_EN_W
- pcr::rst_en_3::CCTIMER_RST_EN_R
- pcr::rst_en_3::CCTIMER_RST_EN_W
- pcr::rst_en_3::HTM_0_RST_EN_R
- pcr::rst_en_3::HTM_0_RST_EN_W
- pcr::rst_en_3::HTM_1_RST_EN_R
- pcr::rst_en_3::HTM_1_RST_EN_W
- pcr::rst_en_3::LED0_RST_EN_R
- pcr::rst_en_3::LED0_RST_EN_W
- pcr::rst_en_3::PKE_RST_EN_R
- pcr::rst_en_3::PKE_RST_EN_W
- pcr::rst_en_3::PS2_0_RST_EN_R
- pcr::rst_en_3::PS2_0_RST_EN_W
- pcr::rst_en_3::RNG_RST_EN_R
- pcr::rst_en_3::RNG_RST_EN_W
- pcr::rst_en_3::SMB1_RST_EN_R
- pcr::rst_en_3::SMB1_RST_EN_W
- pcr::rst_en_3::SMB2_RST_EN_R
- pcr::rst_en_3::SMB2_RST_EN_W
- pcr::rst_en_3::SMB3_RST_EN_R
- pcr::rst_en_3::SMB3_RST_EN_W
- pcr::rst_en_3::SMB_4_RST_EN_R
- pcr::rst_en_3::SMB_4_RST_EN_W
- pcr::rst_en_3::TMR32_0_RST_EN_R
- pcr::rst_en_3::TMR32_0_RST_EN_W
- pcr::rst_en_3::TMR32_1_RST_EN_R
- pcr::rst_en_3::TMR32_1_RST_EN_W
- pcr::rst_en_4::QMSPI_RST_EN_R
- pcr::rst_en_4::QMSPI_RST_EN_W
- pcr::rst_en_4::RTOS_RST_EN_R
- pcr::rst_en_4::RTOS_RST_EN_W
- pcr::slow_clk_ctrl::DIV_R
- pcr::slow_clk_ctrl::DIV_W
- pcr::slp_en_0::OTP_SLP_EN_R
- pcr::slp_en_0::OTP_SLP_EN_W
- pcr::slp_en_1::DMA_SLP_EN_R
- pcr::slp_en_1::DMA_SLP_EN_W
- pcr::slp_en_1::EC_REG_BANK_SLP_EN_R
- pcr::slp_en_1::EC_REG_BANK_SLP_EN_W
- pcr::slp_en_1::INT_SLP_EN_R
- pcr::slp_en_1::INT_SLP_EN_W
- pcr::slp_en_1::PMC_SLP_EN_R
- pcr::slp_en_1::PMC_SLP_EN_W
- pcr::slp_en_1::PROC_SLP_EN_R
- pcr::slp_en_1::PROC_SLP_EN_W
- pcr::slp_en_1::PWM0_SLP_EN_R
- pcr::slp_en_1::PWM0_SLP_EN_W
- pcr::slp_en_1::PWM1_SLP_EN_R
- pcr::slp_en_1::PWM1_SLP_EN_W
- pcr::slp_en_1::PWM4_SLP_EN_R
- pcr::slp_en_1::PWM4_SLP_EN_W
- pcr::slp_en_1::PWM6_SLP_EN_R
- pcr::slp_en_1::PWM6_SLP_EN_W
- pcr::slp_en_1::PWM7_SLP_EN_R
- pcr::slp_en_1::PWM7_SLP_EN_W
- pcr::slp_en_1::SMB0_SLP_EN_R
- pcr::slp_en_1::SMB0_SLP_EN_W
- pcr::slp_en_1::TACH0_SLP_EN_R
- pcr::slp_en_1::TACH0_SLP_EN_W
- pcr::slp_en_1::TACH2_SLP_EN_R
- pcr::slp_en_1::TACH2_SLP_EN_W
- pcr::slp_en_1::TFDP_SLP_EN_R
- pcr::slp_en_1::TFDP_SLP_EN_W
- pcr::slp_en_1::TMR16_0_SLP_EN_R
- pcr::slp_en_1::TMR16_0_SLP_EN_W
- pcr::slp_en_1::TMR16_1_SLP_EN_R
- pcr::slp_en_1::TMR16_1_SLP_EN_W
- pcr::slp_en_2::UART0_SLP_EN_R
- pcr::slp_en_2::UART0_SLP_EN_W
- pcr::slp_en_2::UART1_SLP_EN_R
- pcr::slp_en_2::UART1_SLP_EN_W
- pcr::slp_en_3::ADC_SLP_EN_R
- pcr::slp_en_3::ADC_SLP_EN_W
- pcr::slp_en_3::AES_HASH_SLP_EN_R
- pcr::slp_en_3::AES_HASH_SLP_EN_W
- pcr::slp_en_3::CCT_SLP_EN_R
- pcr::slp_en_3::CCT_SLP_EN_W
- pcr::slp_en_3::HTM_0_SLP_EN_R
- pcr::slp_en_3::HTM_0_SLP_EN_W
- pcr::slp_en_3::HTM_1_SLP_EN_R
- pcr::slp_en_3::HTM_1_SLP_EN_W
- pcr::slp_en_3::LED0_SLP_EN_R
- pcr::slp_en_3::LED0_SLP_EN_W
- pcr::slp_en_3::PKE_SLP_EN_R
- pcr::slp_en_3::PKE_SLP_EN_W
- pcr::slp_en_3::PS2_0_SLP_EN_R
- pcr::slp_en_3::PS2_0_SLP_EN_W
- pcr::slp_en_3::RNG_SLP_EN_R
- pcr::slp_en_3::RNG_SLP_EN_W
- pcr::slp_en_3::SMB1_SLP_EN_R
- pcr::slp_en_3::SMB1_SLP_EN_W
- pcr::slp_en_3::SMB2_SLP_EN_R
- pcr::slp_en_3::SMB2_SLP_EN_W
- pcr::slp_en_3::SMB3_SLP_EN_R
- pcr::slp_en_3::SMB3_SLP_EN_W
- pcr::slp_en_3::SMB4_SLP_EN_R
- pcr::slp_en_3::SMB4_SLP_EN_W
- pcr::slp_en_3::TMR32_0_SLP_EN_R
- pcr::slp_en_3::TMR32_0_SLP_EN_W
- pcr::slp_en_3::TMR32_1_SLP_EN_R
- pcr::slp_en_3::TMR32_1_SLP_EN_W
- pcr::slp_en_4::QMSPI_SLP_EN_R
- pcr::slp_en_4::QMSPI_SLP_EN_W
- pcr::sys_rst::SOFT_SYS_RST_R
- pcr::sys_rst::SOFT_SYS_RST_W
- pcr::sys_slp_ctrl::SLP_ALL_R
- pcr::sys_slp_ctrl::SLP_ALL_W
- pcr::sys_slp_ctrl::SLP_MOD_R
- pcr::sys_slp_ctrl::SLP_MOD_W
- pcr::sys_slp_ctrl::TEST_R
- pcr::sys_slp_ctrl::TEST_W
- pwm0::CFG
- pwm0::CNT_OFF
- pwm0::CNT_ON
- pwm0::cfg::CLK_PRE_DIV_R
- pwm0::cfg::CLK_PRE_DIV_W
- pwm0::cfg::CLK_SEL_R
- pwm0::cfg::CLK_SEL_W
- pwm0::cfg::INV_R
- pwm0::cfg::INV_W
- pwm0::cfg::PWM_EN_R
- pwm0::cfg::PWM_EN_W
- qmspi::BUF_CNT_STS
- qmspi::BUF_CNT_TRIG
- qmspi::CSTM
- qmspi::CTRL
- qmspi::DESCR
- qmspi::EXE
- qmspi::IEN
- qmspi::IFCTRL
- qmspi::MODE
- qmspi::RX_FIFO
- qmspi::STS
- qmspi::TX_FIFO
- qmspi::buf_cnt_sts::RX_BUFF_CNT_R
- qmspi::buf_cnt_sts::RX_BUFF_CNT_W
- qmspi::buf_cnt_sts::TX_BUFF_CNT_R
- qmspi::buf_cnt_sts::TX_BUFF_CNT_W
- qmspi::buf_cnt_trig::RX_BUF_TRIG_R
- qmspi::buf_cnt_trig::RX_BUF_TRIG_W
- qmspi::buf_cnt_trig::TX_BUF_TRIG_R
- qmspi::buf_cnt_trig::TX_BUF_TRIG_W
- qmspi::cstm::DLY_CLK_STOP_CS_OFF_R
- qmspi::cstm::DLY_CLK_STOP_CS_OFF_W
- qmspi::cstm::DLY_CS_ON_CLK_STRT_R
- qmspi::cstm::DLY_CS_ON_CLK_STRT_W
- qmspi::cstm::DLY_LAST_DAT_HLD_R
- qmspi::cstm::DLY_LAST_DAT_HLD_W
- qmspi::cstm::DLY_OFF_TO_ON_R
- qmspi::cstm::DLY_OFF_TO_ON_W
- qmspi::ctrl::CLOSE_TRANS_EN_R
- qmspi::ctrl::CLOSE_TRANS_EN_W
- qmspi::ctrl::DESCR_BUFF_EN_R
- qmspi::ctrl::DESCR_BUFF_EN_W
- qmspi::ctrl::DESCR_BUFF_PTR_R
- qmspi::ctrl::DESCR_BUFF_PTR_W
- qmspi::ctrl::RX_DMA_EN_R
- qmspi::ctrl::RX_DMA_EN_W
- qmspi::ctrl::RX_TRANS_EN_R
- qmspi::ctrl::RX_TRANS_EN_W
- qmspi::ctrl::TRANS_LEN_R
- qmspi::ctrl::TRANS_LEN_W
- qmspi::ctrl::TRANS_UNITS_R
- qmspi::ctrl::TRANS_UNITS_W
- qmspi::ctrl::TX_DMA_EN_R
- qmspi::ctrl::TX_DMA_EN_W
- qmspi::ctrl::TX_MODE_R
- qmspi::ctrl::TX_MODE_W
- qmspi::ctrl::TX_TRANS_EN_R
- qmspi::ctrl::TX_TRANS_EN_W
- qmspi::descr::CLOSE_TRANS_EN_R
- qmspi::descr::CLOSE_TRANS_EN_W
- qmspi::descr::DESCR_BUF_LAST_R
- qmspi::descr::DESCR_BUF_LAST_W
- qmspi::descr::DESCR_BUF_NXT_PTR_R
- qmspi::descr::DESCR_BUF_NXT_PTR_W
- qmspi::descr::INFACE_MOD_R
- qmspi::descr::INFACE_MOD_W
- qmspi::descr::RX_DMA_EN_R
- qmspi::descr::RX_DMA_EN_W
- qmspi::descr::RX_TRANS_EN_R
- qmspi::descr::RX_TRANS_EN_W
- qmspi::descr::TRANS_LEN_BITS_R
- qmspi::descr::TRANS_LEN_BITS_W
- qmspi::descr::TX_DMA_EN_R
- qmspi::descr::TX_DMA_EN_W
- qmspi::descr::TX_LEN_R
- qmspi::descr::TX_LEN_W
- qmspi::descr::TX_TRANS_EN_R
- qmspi::descr::TX_TRANS_EN_W
- qmspi::exe::CLR_DAT_BUFF_R
- qmspi::exe::CLR_DAT_BUFF_W
- qmspi::exe::START_R
- qmspi::exe::START_W
- qmspi::exe::STOP_R
- qmspi::exe::STOP_W
- qmspi::ien::DMA_COMPL_EN_R
- qmspi::ien::DMA_COMPL_EN_W
- qmspi::ien::PRGM_ERR_EN_R
- qmspi::ien::PRGM_ERR_EN_W
- qmspi::ien::RX_BUF_EMPTY_EN_R
- qmspi::ien::RX_BUF_EMPTY_EN_W
- qmspi::ien::RX_BUF_ERR_EN_R
- qmspi::ien::RX_BUF_ERR_EN_W
- qmspi::ien::RX_BUF_FUL_EN_R
- qmspi::ien::RX_BUF_FUL_EN_W
- qmspi::ien::RX_BUF_REQ_EN_R
- qmspi::ien::RX_BUF_REQ_EN_W
- qmspi::ien::TRANS_COMPL_EN_R
- qmspi::ien::TRANS_COMPL_EN_W
- qmspi::ien::TX_BUF_EMPTY_EN_R
- qmspi::ien::TX_BUF_EMPTY_EN_W
- qmspi::ien::TX_BUF_ERR_EN_R
- qmspi::ien::TX_BUF_ERR_EN_W
- qmspi::ien::TX_BUF_FULL_EN_R
- qmspi::ien::TX_BUF_FULL_EN_W
- qmspi::ien::TX_BUF_REQ_EN_R
- qmspi::ien::TX_BUF_REQ_EN_W
- qmspi::ifctrl::HLD_OUT_EN_R
- qmspi::ifctrl::HLD_OUT_EN_W
- qmspi::ifctrl::HLD_OUT_VAL_R
- qmspi::ifctrl::HLD_OUT_VAL_W
- qmspi::ifctrl::PD_ON_NOTDRIVEN_R
- qmspi::ifctrl::PD_ON_NOTDRIVEN_W
- qmspi::ifctrl::PD_ON_NOT_SEL_R
- qmspi::ifctrl::PD_ON_NOT_SEL_W
- qmspi::ifctrl::PU_ON_NOTDRIVEN_R
- qmspi::ifctrl::PU_ON_NOTDRIVEN_W
- qmspi::ifctrl::PU_ON_NOTSEL_R
- qmspi::ifctrl::PU_ON_NOTSEL_W
- qmspi::ifctrl::WR_PRCT_OUT_EN_R
- qmspi::ifctrl::WR_PRCT_OUT_EN_W
- qmspi::ifctrl::WR_PRCT_OUT_VAL_R
- qmspi::ifctrl::WR_PRCT_OUT_VAL_W
- qmspi::mode::ACT_R
- qmspi::mode::ACT_W
- qmspi::mode::CHPA_MISO_R
- qmspi::mode::CHPA_MISO_W
- qmspi::mode::CHPA_MOSI_R
- qmspi::mode::CHPA_MOSI_W
- qmspi::mode::CLK_DIV_R
- qmspi::mode::CLK_DIV_W
- qmspi::mode::CPOL_R
- qmspi::mode::CPOL_W
- qmspi::mode::SOFT_RST_R
- qmspi::mode::SOFT_RST_W
- qmspi::rx_fifo::RX_BUF_R
- qmspi::rx_fifo::RX_BUF_W
- qmspi::sts::CUR_DESCR_BUF_R
- qmspi::sts::CUR_DESCR_BUF_W
- qmspi::sts::DMA_COMPL_R
- qmspi::sts::DMA_COMPL_W
- qmspi::sts::PRGM_ERR_R
- qmspi::sts::PRGM_ERR_W
- qmspi::sts::RX_BUFF_EMP_R
- qmspi::sts::RX_BUFF_EMP_W
- qmspi::sts::RX_BUFF_ERR_R
- qmspi::sts::RX_BUFF_ERR_W
- qmspi::sts::RX_BUFF_FULL_R
- qmspi::sts::RX_BUFF_FULL_W
- qmspi::sts::RX_BUFF_REQ_R
- qmspi::sts::RX_BUFF_REQ_W
- qmspi::sts::RX_BUFF_STALL_R
- qmspi::sts::RX_BUFF_STALL_W
- qmspi::sts::TRANS_ACTIV_R
- qmspi::sts::TRANS_ACTIV_W
- qmspi::sts::TRANS_COMPL_R
- qmspi::sts::TRANS_COMPL_W
- qmspi::sts::TX_BUFF_EMP_R
- qmspi::sts::TX_BUFF_EMP_W
- qmspi::sts::TX_BUFF_ERR_R
- qmspi::sts::TX_BUFF_ERR_W
- qmspi::sts::TX_BUFF_FULL_R
- qmspi::sts::TX_BUFF_FULL_W
- qmspi::sts::TX_BUFF_REQ_R
- qmspi::sts::TX_BUFF_REQ_W
- qmspi::sts::TX_BUFF_STALL_R
- qmspi::sts::TX_BUFF_STALL_W
- qmspi::tx_fifo::TX_BUF_R
- qmspi::tx_fifo::TX_BUF_W
- rtc::CTRL
- rtc::DAYLT_SAVB
- rtc::DAYLT_SAVF
- rtc::DAY_OF_MON
- rtc::DAY_OF_WK
- rtc::HR
- rtc::HR_ALARM
- rtc::MIN
- rtc::MIN_ALARM
- rtc::MONTH
- rtc::REGA
- rtc::REGB
- rtc::REGC
- rtc::REGD
- rtc::SEC
- rtc::SEC_ALARM
- rtc::WK_ALARM
- rtc::YEAR
- rtc::ctrl::ALM_EN_R
- rtc::ctrl::ALM_EN_W
- rtc::ctrl::BLK_EN_R
- rtc::ctrl::BLK_EN_W
- rtc::ctrl::SOFT_RST_R
- rtc::ctrl::SOFT_RST_W
- rtc::ctrl::TEST_R
- rtc::ctrl::TEST_W
- rtc::daylt_savb::DST_AM_PM_R
- rtc::daylt_savb::DST_AM_PM_W
- rtc::daylt_savb::DST_DAY_OF_WK_R
- rtc::daylt_savb::DST_DAY_OF_WK_W
- rtc::daylt_savb::DST_HR_R
- rtc::daylt_savb::DST_HR_W
- rtc::daylt_savb::DST_MON_R
- rtc::daylt_savb::DST_MON_W
- rtc::daylt_savb::DST_WK_R
- rtc::daylt_savb::DST_WK_W
- rtc::daylt_savf::DST_AM_PM_R
- rtc::daylt_savf::DST_AM_PM_W
- rtc::daylt_savf::DST_DAY_OF_WK_R
- rtc::daylt_savf::DST_DAY_OF_WK_W
- rtc::daylt_savf::DST_HR_R
- rtc::daylt_savf::DST_HR_W
- rtc::daylt_savf::DST_MON_R
- rtc::daylt_savf::DST_MON_W
- rtc::daylt_savf::DST_WK_R
- rtc::daylt_savf::DST_WK_W
- rtos::CNT
- rtos::CTRL
- rtos::PRLD
- rtos::SOFTIRQ
- rtos::cnt::CNTR_R
- rtos::cnt::CNTR_W
- rtos::ctrl::AU_RELOAD_R
- rtos::ctrl::AU_RELOAD_W
- rtos::ctrl::BLK_EN_R
- rtos::ctrl::BLK_EN_W
- rtos::ctrl::EXT_HW_HALT_EN_R
- rtos::ctrl::EXT_HW_HALT_EN_W
- rtos::ctrl::FW_TMR_HALT_R
- rtos::ctrl::FW_TMR_HALT_W
- rtos::ctrl::TMR_STRT_R
- rtos::ctrl::TMR_STRT_W
- rtos::prld::PRELOAD_R
- rtos::prld::PRELOAD_W
- rtos::softirq::SWI0_W
- rtos::softirq::SWI1_W
- rtos::softirq::SWI2_W
- rtos::softirq::SWI3_W
- smb0::BBCTRL
- smb0::BLKID
- smb0::BLKREV
- smb0::BUSCLK
- smb0::CFG
- smb0::COMPL
- smb0::DATATM
- smb0::I2CDATA
- smb0::IDLSC
- smb0::MCMD
- smb0::MTR_RXB
- smb0::MTR_TXB
- smb0::OWN_ADDR
- smb0::PEC
- smb0::PRM_CTRL
- smb0::PRM_IEN
- smb0::PRM_STS
- smb0::RSHTM
- smb0::RSTS
- smb0::RSVD1
- smb0::RSVD2
- smb0::SCMD
- smb0::SLV_ADDR
- smb0::SLV_RXB
- smb0::SLV_TXB
- smb0::TEST
- smb0::TMOUTSC
- smb0::WAKE_EN
- smb0::WAKE_STS
- smb0::WCTRL
- smb0::bbctrl::BBCLKI_R
- smb0::bbctrl::BBCLKI_W
- smb0::bbctrl::BBCLK_R
- smb0::bbctrl::BBCLK_W
- smb0::bbctrl::BBDATI_R
- smb0::bbctrl::BBDATI_W
- smb0::bbctrl::BBDAT_R
- smb0::bbctrl::BBDAT_W
- smb0::bbctrl::BBEN_R
- smb0::bbctrl::BBEN_W
- smb0::bbctrl::CLDIR_R
- smb0::bbctrl::CLDIR_W
- smb0::bbctrl::DADIR_R
- smb0::bbctrl::DADIR_W
- smb0::blkid::ID_R
- smb0::blkrev::REV_R
- smb0::busclk::HIGH_PER_R
- smb0::busclk::HIGH_PER_W
- smb0::busclk::LOW_PER_R
- smb0::busclk::LOW_PER_W
- smb0::cfg::CFG_PROMIS_R
- smb0::cfg::CFG_PROMIS_W
- smb0::cfg::DSA_R
- smb0::cfg::DSA_W
- smb0::cfg::ENIDI_R
- smb0::cfg::ENIDI_W
- smb0::cfg::ENMI_R
- smb0::cfg::ENMI_W
- smb0::cfg::ENSI_R
- smb0::cfg::ENSI_W
- smb0::cfg::EN_AAS_R
- smb0::cfg::EN_AAS_W
- smb0::cfg::EN_R
- smb0::cfg::EN_W
- smb0::cfg::FAIR_R
- smb0::cfg::FAIR_W
- smb0::cfg::FEN_R
- smb0::cfg::FEN_W
- smb0::cfg::FLUSH_MRBUF_R
- smb0::cfg::FLUSH_MRBUF_W
- smb0::cfg::FLUSH_MXBUF_R
- smb0::cfg::FLUSH_MXBUF_W
- smb0::cfg::FLUSH_SRBUF_R
- smb0::cfg::FLUSH_SRBUF_W
- smb0::cfg::FLUSH_SXBUF_R
- smb0::cfg::FLUSH_SXBUF_W
- smb0::cfg::GC_DIS_R
- smb0::cfg::GC_DIS_W
- smb0::cfg::PECEN_R
- smb0::cfg::PECEN_W
- smb0::cfg::PORT_SEL_R
- smb0::cfg::PORT_SEL_W
- smb0::cfg::RST_R
- smb0::cfg::RST_W
- smb0::cfg::SLOW_CLK_R
- smb0::cfg::SLOW_CLK_W
- smb0::cfg::TCEN_R
- smb0::cfg::TCEN_W
- smb0::cfg::TEST0_R
- smb0::cfg::TEST0_W
- smb0::cfg::TEST_R
- smb0::cfg::TEST_W
- smb0::compl::BER_R
- smb0::compl::BER_W
- smb0::compl::BIDEN_R
- smb0::compl::BIDEN_W
- smb0::compl::CHDH_R
- smb0::compl::CHDH_W
- smb0::compl::CHDL_R
- smb0::compl::CHDL_W
- smb0::compl::DTEN_R
- smb0::compl::DTEN_W
- smb0::compl::DTO_R
- smb0::compl::DTO_W
- smb0::compl::IDLE_R
- smb0::compl::IDLE_W
- smb0::compl::LAB_R
- smb0::compl::LAB_W
- smb0::compl::MCEN_R
- smb0::compl::MCEN_W
- smb0::compl::MCTO_R
- smb0::compl::MCTO_W
- smb0::compl::MDONE_R
- smb0::compl::MDONE_W
- smb0::compl::MNAKX_R
- smb0::compl::MNAKX_W
- smb0::compl::MTR_R
- smb0::compl::MTR_W
- smb0::compl::REP_RD_R
- smb0::compl::REP_RD_W
- smb0::compl::REP_WR_R
- smb0::compl::REP_WR_W
- smb0::compl::SCEN_R
- smb0::compl::SCEN_W
- smb0::compl::SCTO_R
- smb0::compl::SCTO_W
- smb0::compl::SDONE_R
- smb0::compl::SDONE_W
- smb0::compl::SNAKR_R
- smb0::compl::SNAKR_W
- smb0::compl::SPROT_R
- smb0::compl::SPROT_W
- smb0::compl::STR_R
- smb0::compl::STR_W
- smb0::compl::TIMERR_R
- smb0::compl::TIMERR_W
- smb0::datatm::DATA_HOLD_R
- smb0::datatm::DATA_HOLD_W
- smb0::datatm::FIRST_START_HOLD_R
- smb0::datatm::FIRST_START_HOLD_W
- smb0::datatm::RESTART_SETUP_R
- smb0::datatm::RESTART_SETUP_W
- smb0::datatm::STOP_SETUP_R
- smb0::datatm::STOP_SETUP_W
- smb0::idlsc::FAIR_BUS_IDL_MIN_R
- smb0::idlsc::FAIR_BUS_IDL_MIN_W
- smb0::idlsc::FAIR_IDL_DLY_R
- smb0::idlsc::FAIR_IDL_DLY_W
- smb0::mcmd::MPROCEED_R
- smb0::mcmd::MPROCEED_W
- smb0::mcmd::MRUN_R
- smb0::mcmd::MRUN_W
- smb0::mcmd::PEC_TERM_R
- smb0::mcmd::PEC_TERM_W
- smb0::mcmd::RD_CNT_R
- smb0::mcmd::RD_CNT_W
- smb0::mcmd::RD_PEC_R
- smb0::mcmd::RD_PEC_W
- smb0::mcmd::READM_R
- smb0::mcmd::READM_W
- smb0::mcmd::START0_R
- smb0::mcmd::START0_W
- smb0::mcmd::STARTN_R
- smb0::mcmd::STARTN_W
- smb0::mcmd::STOP_R
- smb0::mcmd::STOP_W
- smb0::mcmd::WR_CNT_R
- smb0::mcmd::WR_CNT_W
- smb0::mtr_rxb::MRXB_R
- smb0::mtr_rxb::MRXB_W
- smb0::mtr_txb::MTXB_R
- smb0::mtr_txb::MTXB_W
- smb0::own_addr::ADDR1_R
- smb0::own_addr::ADDR1_W
- smb0::own_addr::ADDR2_R
- smb0::own_addr::ADDR2_W
- smb0::pec::PEC_R
- smb0::pec::PEC_W
- smb0::prm_ctrl::ACK_NAK_R
- smb0::prm_ctrl::ACK_NAK_W
- smb0::prm_ien::ADDR_R
- smb0::prm_ien::ADDR_W
- smb0::prm_sts::ADDR_INTR_R
- smb0::prm_sts::ADDR_INTR_W
- smb0::rshtm::RSHTM_R
- smb0::rshtm::RSHTM_W
- smb0::rsts::AAS_R
- smb0::rsts::BER_R
- smb0::rsts::LAB_R
- smb0::rsts::LRB_AD0_R
- smb0::rsts::NBB_R
- smb0::rsts::PIN_R
- smb0::rsts::SAD_R
- smb0::rsts::STS_R
- smb0::scmd::PEC_R
- smb0::scmd::PEC_W
- smb0::scmd::RD_CNT_R
- smb0::scmd::RD_CNT_W
- smb0::scmd::SPROCEED_R
- smb0::scmd::SPROCEED_W
- smb0::scmd::SRUN_R
- smb0::scmd::SRUN_W
- smb0::scmd::WR_CNT_R
- smb0::scmd::WR_CNT_W
- smb0::slv_addr::SADDR_R
- smb0::slv_addr::SADDR_W
- smb0::slv_rxb::SRXB_R
- smb0::slv_rxb::SRXB_W
- smb0::slv_txb::STXB_R
- smb0::slv_txb::STXB_W
- smb0::test::TEST_R
- smb0::tmoutsc::BUS_IDLE_MIN_R
- smb0::tmoutsc::BUS_IDLE_MIN_W
- smb0::tmoutsc::CLK_HIGH_TIM_OUT_R
- smb0::tmoutsc::CLK_HIGH_TIM_OUT_W
- smb0::tmoutsc::MAST_CUM_TIM_OUT_R
- smb0::tmoutsc::MAST_CUM_TIM_OUT_W
- smb0::tmoutsc::SLV_CUM_TIM_OUT_R
- smb0::tmoutsc::SLV_CUM_TIM_OUT_W
- smb0::wake_en::START_DET_INT_EN_R
- smb0::wake_en::START_DET_INT_EN_W
- smb0::wake_sts::START_BIT_DET_R
- smb0::wake_sts::START_BIT_DET_W
- smb0::wctrl::ACK_W
- smb0::wctrl::ENI_W
- smb0::wctrl::ESO_W
- smb0::wctrl::PIN_W
- smb0::wctrl::STA_W
- smb0::wctrl::STO_W
- sys_tick::CALIB
- sys_tick::CSR
- sys_tick::CVR
- sys_tick::RVR
- sys_tick::calib::NOREF_R
- sys_tick::calib::SKEW_R
- sys_tick::calib::TENMS_R
- sys_tick::csr::CLKSOURCE_R
- sys_tick::csr::CLKSOURCE_W
- sys_tick::csr::COUNTFLAG_R
- sys_tick::csr::COUNTFLAG_W
- sys_tick::csr::ENABLE_R
- sys_tick::csr::ENABLE_W
- sys_tick::csr::TICKINT_R
- sys_tick::csr::TICKINT_W
- sys_tick::cvr::CURRENT_R
- sys_tick::cvr::CURRENT_W
- sys_tick::rvr::RELOAD_R
- sys_tick::rvr::RELOAD_W
- system_control::ACTLR
- system_control::ADR
- system_control::AFSR
- system_control::AIRCR
- system_control::BFAR
- system_control::CCR
- system_control::CFSR
- system_control::CPACR
- system_control::CPUID
- system_control::DFR
- system_control::DFSR
- system_control::HFSR
- system_control::ICSR
- system_control::ICTR
- system_control::ISAR
- system_control::MMFAR
- system_control::MMFR
- system_control::PFR
- system_control::SCR
- system_control::SHCSR
- system_control::SHPR1
- system_control::SHPR2
- system_control::SHPR3
- system_control::actlr::DISDEFWBUF_R
- system_control::actlr::DISDEFWBUF_W
- system_control::actlr::DISFOLD_R
- system_control::actlr::DISFOLD_W
- system_control::actlr::DISFPCA_R
- system_control::actlr::DISFPCA_W
- system_control::actlr::DISMCYCINT_R
- system_control::actlr::DISMCYCINT_W
- system_control::actlr::DISOOFP_R
- system_control::actlr::DISOOFP_W
- system_control::afsr::IMPDEF_R
- system_control::afsr::IMPDEF_W
- system_control::aircr::ENDIANNESS_R
- system_control::aircr::ENDIANNESS_W
- system_control::aircr::PRIGROUP_R
- system_control::aircr::PRIGROUP_W
- system_control::aircr::SYSRESETREQ_R
- system_control::aircr::SYSRESETREQ_W
- system_control::aircr::VECTCLRACTIVE_R
- system_control::aircr::VECTCLRACTIVE_W
- system_control::aircr::VECTKEY_R
- system_control::aircr::VECTKEY_W
- system_control::aircr::VECTRESET_R
- system_control::aircr::VECTRESET_W
- system_control::bfar::ADDRESS_R
- system_control::bfar::ADDRESS_W
- system_control::ccr::BFHFNMIGN_R
- system_control::ccr::BFHFNMIGN_W
- system_control::ccr::DIV_0_TRP_R
- system_control::ccr::DIV_0_TRP_W
- system_control::ccr::NONBASETHRDENA_R
- system_control::ccr::NONBASETHRDENA_W
- system_control::ccr::STKALIGN_R
- system_control::ccr::STKALIGN_W
- system_control::ccr::UNALIGN_TRP_R
- system_control::ccr::UNALIGN_TRP_W
- system_control::ccr::USERSETMPEND_R
- system_control::ccr::USERSETMPEND_W
- system_control::cfsr::BFARVALID_R
- system_control::cfsr::BFARVALID_W
- system_control::cfsr::DACCVIOL_R
- system_control::cfsr::DACCVIOL_W
- system_control::cfsr::DIVBYZERO_R
- system_control::cfsr::DIVBYZERO_W
- system_control::cfsr::IACCVIOL_R
- system_control::cfsr::IACCVIOL_W
- system_control::cfsr::IBUSERR_R
- system_control::cfsr::IBUSERR_W
- system_control::cfsr::IMPRECISERR_R
- system_control::cfsr::IMPRECISERR_W
- system_control::cfsr::INVPC_R
- system_control::cfsr::INVPC_W
- system_control::cfsr::INVSTATE_R
- system_control::cfsr::INVSTATE_W
- system_control::cfsr::LSPERR_R
- system_control::cfsr::LSPERR_W
- system_control::cfsr::MLSPERR_R
- system_control::cfsr::MLSPERR_W
- system_control::cfsr::MMARVALID_R
- system_control::cfsr::MMARVALID_W
- system_control::cfsr::MSTKERR_R
- system_control::cfsr::MSTKERR_W
- system_control::cfsr::MUNSTKERR_R
- system_control::cfsr::MUNSTKERR_W
- system_control::cfsr::NOCP_R
- system_control::cfsr::NOCP_W
- system_control::cfsr::PRECISERR_R
- system_control::cfsr::PRECISERR_W
- system_control::cfsr::STKERR_R
- system_control::cfsr::STKERR_W
- system_control::cfsr::UNALIGNED_R
- system_control::cfsr::UNALIGNED_W
- system_control::cfsr::UNDEFINSTR_R
- system_control::cfsr::UNDEFINSTR_W
- system_control::cfsr::UNSTKERR_R
- system_control::cfsr::UNSTKERR_W
- system_control::cpacr::CP10_R
- system_control::cpacr::CP10_W
- system_control::cpacr::CP11_R
- system_control::cpacr::CP11_W
- system_control::cpuid::CONSTANT_R
- system_control::cpuid::IMPLEMENTER_R
- system_control::cpuid::PARTNO_R
- system_control::cpuid::REVISION_R
- system_control::cpuid::VARIANT_R
- system_control::dfsr::BKPT_R
- system_control::dfsr::BKPT_W
- system_control::dfsr::DWTTRAP_R
- system_control::dfsr::DWTTRAP_W
- system_control::dfsr::EXTERNAL_R
- system_control::dfsr::EXTERNAL_W
- system_control::dfsr::HALTED_R
- system_control::dfsr::HALTED_W
- system_control::dfsr::VCATCH_R
- system_control::dfsr::VCATCH_W
- system_control::hfsr::DEBUGEVT_R
- system_control::hfsr::DEBUGEVT_W
- system_control::hfsr::FORCED_R
- system_control::hfsr::FORCED_W
- system_control::hfsr::VECTTBL_R
- system_control::hfsr::VECTTBL_W
- system_control::icsr::ISRPENDING_R
- system_control::icsr::ISRPENDING_W
- system_control::icsr::ISRPREEMPT_R
- system_control::icsr::ISRPREEMPT_W
- system_control::icsr::NMIPENDSET_R
- system_control::icsr::NMIPENDSET_W
- system_control::icsr::PENDSTCLR_R
- system_control::icsr::PENDSTCLR_W
- system_control::icsr::PENDSTSET_R
- system_control::icsr::PENDSTSET_W
- system_control::icsr::PENDSVCLR_R
- system_control::icsr::PENDSVCLR_W
- system_control::icsr::PENDSVSET_R
- system_control::icsr::PENDSVSET_W
- system_control::icsr::RETTOBASE_R
- system_control::icsr::RETTOBASE_W
- system_control::icsr::VECTACTIVE_R
- system_control::icsr::VECTACTIVE_W
- system_control::icsr::VECTPENDING_R
- system_control::icsr::VECTPENDING_W
- system_control::ictr::INTLINESNUM_R
- system_control::mmfar::ADDRESS_R
- system_control::mmfar::ADDRESS_W
- system_control::scr::SEVONPEND_R
- system_control::scr::SEVONPEND_W
- system_control::scr::SLEEPDEEP_R
- system_control::scr::SLEEPDEEP_W
- system_control::scr::SLEEPONEXIT_R
- system_control::scr::SLEEPONEXIT_W
- system_control::shcsr::BUSFAULTACT_R
- system_control::shcsr::BUSFAULTACT_W
- system_control::shcsr::BUSFAULTENA_R
- system_control::shcsr::BUSFAULTENA_W
- system_control::shcsr::BUSFAULTPENDED_R
- system_control::shcsr::BUSFAULTPENDED_W
- system_control::shcsr::MEMFAULTACT_R
- system_control::shcsr::MEMFAULTACT_W
- system_control::shcsr::MEMFAULTENA_R
- system_control::shcsr::MEMFAULTENA_W
- system_control::shcsr::MEMFAULTPENDED_R
- system_control::shcsr::MEMFAULTPENDED_W
- system_control::shcsr::MONITORACT_R
- system_control::shcsr::MONITORACT_W
- system_control::shcsr::PENDSVACT_R
- system_control::shcsr::PENDSVACT_W
- system_control::shcsr::SVCALLACT_R
- system_control::shcsr::SVCALLACT_W
- system_control::shcsr::SVCALLPENDED_R
- system_control::shcsr::SVCALLPENDED_W
- system_control::shcsr::SYSTICKACT_R
- system_control::shcsr::SYSTICKACT_W
- system_control::shcsr::USGFAULTACT_R
- system_control::shcsr::USGFAULTACT_W
- system_control::shcsr::USGFAULTENA_R
- system_control::shcsr::USGFAULTENA_W
- system_control::shcsr::USGFAULTPENDED_R
- system_control::shcsr::USGFAULTPENDED_W
- system_control::shpr1::PRI_4_R
- system_control::shpr1::PRI_4_W
- system_control::shpr1::PRI_5_R
- system_control::shpr1::PRI_5_W
- system_control::shpr1::PRI_6_R
- system_control::shpr1::PRI_6_W
- system_control::shpr2::PRI_11_R
- system_control::shpr2::PRI_11_W
- system_control::shpr3::PRI_14_R
- system_control::shpr3::PRI_14_W
- system_control::shpr3::PRI_15_R
- system_control::shpr3::PRI_15_W
- tach0::CTRL
- tach0::LIM_HI
- tach0::LIM_LO
- tach0::STS
- tach0::ctrl::CNTR_R
- tach0::ctrl::CNTR_W
- tach0::ctrl::CNT_RDY_INT_EN_R
- tach0::ctrl::CNT_RDY_INT_EN_W
- tach0::ctrl::EDGES_R
- tach0::ctrl::EDGES_W
- tach0::ctrl::EN_R
- tach0::ctrl::EN_W
- tach0::ctrl::FILT_EN_R
- tach0::ctrl::FILT_EN_W
- tach0::ctrl::IN_INT_EN_R
- tach0::ctrl::IN_INT_EN_W
- tach0::ctrl::OUTOF_LIM_EN_R
- tach0::ctrl::OUTOF_LIM_EN_W
- tach0::ctrl::RD_MOD_SEL_R
- tach0::ctrl::RD_MOD_SEL_W
- tach0::lim_hi::T_HIGH_R
- tach0::lim_hi::T_HIGH_W
- tach0::lim_lo::T_LOW_R
- tach0::lim_lo::T_LOW_W
- tach0::sts::CNT_RDY_STS_R
- tach0::sts::CNT_RDY_STS_W
- tach0::sts::OUTOF_LIM_STS_R
- tach0::sts::OUTOF_LIM_STS_W
- tach0::sts::PIN_STS_R
- tach0::sts::PIN_STS_W
- tach0::sts::TOG_STS_R
- tach0::sts::TOG_STS_W
- tfdp::CTRL
- tfdp::MSDATA
- tfdp::ctrl::DIVSEL_R
- tfdp::ctrl::DIVSEL_W
- tfdp::ctrl::EDGE_SEL_R
- tfdp::ctrl::EDGE_SEL_W
- tfdp::ctrl::EN_R
- tfdp::ctrl::EN_W
- tfdp::ctrl::IP_DLY_R
- tfdp::ctrl::IP_DLY_W
- timer16_0::CNT
- timer16_0::CTRL
- timer16_0::IEN
- timer16_0::PRLD
- timer16_0::STS
- timer16_0::ctrl::AU_RESTRT_R
- timer16_0::ctrl::AU_RESTRT_W
- timer16_0::ctrl::CNT_UP_R
- timer16_0::ctrl::CNT_UP_W
- timer16_0::ctrl::EN_R
- timer16_0::ctrl::EN_W
- timer16_0::ctrl::HLT_R
- timer16_0::ctrl::HLT_W
- timer16_0::ctrl::PRESCALE_R
- timer16_0::ctrl::PRESCALE_W
- timer16_0::ctrl::RLD_R
- timer16_0::ctrl::RLD_W
- timer16_0::ctrl::SFT_RST_R
- timer16_0::ctrl::SFT_RST_W
- timer16_0::ctrl::STRT_R
- timer16_0::ctrl::STRT_W
- timer16_0::ien::EN_R
- timer16_0::ien::EN_W
- timer16_0::sts::EVT_INT_R
- timer16_0::sts::EVT_INT_W
- timer32_0::CNT
- timer32_0::CTRL
- timer32_0::IEN
- timer32_0::PRLD
- timer32_0::STS
- timer32_0::ctrl::AU_RESTRT_R
- timer32_0::ctrl::AU_RESTRT_W
- timer32_0::ctrl::CNT_UP_R
- timer32_0::ctrl::CNT_UP_W
- timer32_0::ctrl::EN_R
- timer32_0::ctrl::EN_W
- timer32_0::ctrl::HLT_R
- timer32_0::ctrl::HLT_W
- timer32_0::ctrl::PRESCALE_R
- timer32_0::ctrl::PRESCALE_W
- timer32_0::ctrl::RLD_R
- timer32_0::ctrl::RLD_W
- timer32_0::ctrl::SFT_RST_R
- timer32_0::ctrl::SFT_RST_W
- timer32_0::ctrl::STRT_R
- timer32_0::ctrl::STRT_W
- timer32_0::ien::EN_R
- timer32_0::ien::EN_W
- timer32_0::sts::EVT_INT_R
- timer32_0::sts::EVT_INT_W
- uart0::data::ACTIVATE
- uart0::data::CFG_SEL
- uart0::data::FIFO_CR
- uart0::data::IEN
- uart0::data::INT_ID
- uart0::data::LCR
- uart0::data::LSR
- uart0::data::MCR
- uart0::data::MSR
- uart0::data::RX_DAT
- uart0::data::SCR
- uart0::data::TX_DAT
- uart0::data::cfg_sel::CLK_SRC_R
- uart0::data::cfg_sel::CLK_SRC_W
- uart0::data::cfg_sel::POLAR_R
- uart0::data::cfg_sel::POLAR_W
- uart0::data::cfg_sel::PWR_R
- uart0::data::cfg_sel::PWR_W
- uart0::data::fifo_cr::CLR_RECV_FIFO_W
- uart0::data::fifo_cr::CLR_XMIT_FIFO_W
- uart0::data::fifo_cr::DMA_MODE_SEL_W
- uart0::data::fifo_cr::EXRF_W
- uart0::data::fifo_cr::RECV_FIFO_TRIG_LVL_W
- uart0::data::ien::ELSI_R
- uart0::data::ien::ELSI_W
- uart0::data::ien::EMSI_R
- uart0::data::ien::EMSI_W
- uart0::data::ien::ERDAI_R
- uart0::data::ien::ERDAI_W
- uart0::data::ien::ETHREI_R
- uart0::data::ien::ETHREI_W
- uart0::data::int_id::FIFO_EN_R
- uart0::data::int_id::INTID_R
- uart0::data::int_id::IPEND_R
- uart0::data::lcr::BRK_CTRL_R
- uart0::data::lcr::BRK_CTRL_W
- uart0::data::lcr::DLAB_R
- uart0::data::lcr::DLAB_W
- uart0::data::lcr::EN_PAR_R
- uart0::data::lcr::EN_PAR_W
- uart0::data::lcr::PAR_SEL_R
- uart0::data::lcr::PAR_SEL_W
- uart0::data::lcr::STICK_PAR_R
- uart0::data::lcr::STICK_PAR_W
- uart0::data::lcr::STOP_BITS_R
- uart0::data::lcr::STOP_BITS_W
- uart0::data::lcr::WORD_LEN_R
- uart0::data::lcr::WORD_LEN_W
- uart0::data::lsr::BRK_INTR_R
- uart0::data::lsr::DATA_READY_R
- uart0::data::lsr::FIFO_ERR_R
- uart0::data::lsr::FRAME_ERR_R
- uart0::data::lsr::OVERRUN_R
- uart0::data::lsr::PE_R
- uart0::data::lsr::TRANS_EMPTY_R
- uart0::data::lsr::TRANS_ERR_R
- uart0::data::mcr::DTR_R
- uart0::data::mcr::DTR_W
- uart0::data::mcr::LOOPBACK_R
- uart0::data::mcr::LOOPBACK_W
- uart0::data::mcr::OUT1_R
- uart0::data::mcr::OUT1_W
- uart0::data::mcr::OUT2_R
- uart0::data::mcr::OUT2_W
- uart0::data::mcr::RTS_R
- uart0::data::mcr::RTS_W
- uart0::data::msr::CTS_R
- uart0::data::msr::DCD_R
- uart0::data::msr::DSR_R
- uart0::data::msr::N_CTS_R
- uart0::data::msr::N_DCD_R
- uart0::data::msr::N_DSR_R
- uart0::data::msr::N_RI_R
- uart0::data::msr::RI_R
- uart0::dlab::ACTIVATE
- uart0::dlab::BAUDRT_LSB
- uart0::dlab::BAUDRT_MSB
- uart0::dlab::CFG_SEL
- uart0::dlab::FIFO_CR
- uart0::dlab::INT_ID
- uart0::dlab::LCR
- uart0::dlab::LSR
- uart0::dlab::MCR
- uart0::dlab::MSR
- uart0::dlab::SCR
- uart0::dlab::cfg_sel::CLK_SRC_R
- uart0::dlab::cfg_sel::CLK_SRC_W
- uart0::dlab::cfg_sel::POLAR_R
- uart0::dlab::cfg_sel::POLAR_W
- uart0::dlab::cfg_sel::PWR_R
- uart0::dlab::cfg_sel::PWR_W
- uart0::dlab::fifo_cr::CLR_RECV_FIFO_W
- uart0::dlab::fifo_cr::CLR_XMIT_FIFO_W
- uart0::dlab::fifo_cr::DMA_MODE_SEL_W
- uart0::dlab::fifo_cr::EXRF_W
- uart0::dlab::fifo_cr::RECV_FIFO_TRIG_LVL_W
- uart0::dlab::int_id::FIFO_EN_R
- uart0::dlab::int_id::INTID_R
- uart0::dlab::int_id::IPEND_R
- uart0::dlab::lcr::BRK_CTRL_R
- uart0::dlab::lcr::BRK_CTRL_W
- uart0::dlab::lcr::DLAB_R
- uart0::dlab::lcr::DLAB_W
- uart0::dlab::lcr::EN_PAR_R
- uart0::dlab::lcr::EN_PAR_W
- uart0::dlab::lcr::PAR_SEL_R
- uart0::dlab::lcr::PAR_SEL_W
- uart0::dlab::lcr::STICK_PAR_R
- uart0::dlab::lcr::STICK_PAR_W
- uart0::dlab::lcr::STOP_BITS_R
- uart0::dlab::lcr::STOP_BITS_W
- uart0::dlab::lcr::WORD_LEN_R
- uart0::dlab::lcr::WORD_LEN_W
- uart0::dlab::lsr::BRK_INTR_R
- uart0::dlab::lsr::DATA_READY_R
- uart0::dlab::lsr::FIFO_ERR_R
- uart0::dlab::lsr::FRAME_ERR_R
- uart0::dlab::lsr::OVERRUN_R
- uart0::dlab::lsr::PE_R
- uart0::dlab::lsr::TRANS_EMPTY_R
- uart0::dlab::lsr::TRANS_ERR_R
- uart0::dlab::mcr::DTR_R
- uart0::dlab::mcr::DTR_W
- uart0::dlab::mcr::LOOPBACK_R
- uart0::dlab::mcr::LOOPBACK_W
- uart0::dlab::mcr::OUT1_R
- uart0::dlab::mcr::OUT1_W
- uart0::dlab::mcr::OUT2_R
- uart0::dlab::mcr::OUT2_W
- uart0::dlab::mcr::RTS_R
- uart0::dlab::mcr::RTS_W
- uart0::dlab::msr::CTS_R
- uart0::dlab::msr::DCD_R
- uart0::dlab::msr::DSR_R
- uart0::dlab::msr::N_CTS_R
- uart0::dlab::msr::N_DCD_R
- uart0::dlab::msr::N_DSR_R
- uart0::dlab::msr::N_RI_R
- uart0::dlab::msr::RI_R
- vbat::CLK32_EN
- vbat::MCNT_HI
- vbat::MCNT_LO
- vbat::PFRS
- vbat::SYS_SHDN
- vbat::VWR_BCKP
- vbat::clk32_en::EXT_32K_R
- vbat::clk32_en::EXT_32K_W
- vbat::mcnt_hi::CNTR_R
- vbat::mcnt_hi::CNTR_W
- vbat::mcnt_lo::CNTR_R
- vbat::mcnt_lo::CNTR_W
- vbat::pfrs::RSTI_R
- vbat::pfrs::RSTI_W
- vbat::pfrs::SOFT_R
- vbat::pfrs::SOFT_W
- vbat::pfrs::SYS_RSTREQ_R
- vbat::pfrs::SYS_RSTREQ_W
- vbat::pfrs::TEST_R
- vbat::pfrs::TEST_W
- vbat::pfrs::VBAT_RST_R
- vbat::pfrs::VBAT_RST_W
- vbat::pfrs::WDT_EVT_R
- vbat::pfrs::WDT_EVT_W
- vbat::sys_shdn::DIS_R
- vbat::sys_shdn::DIS_W
- vbat::vwr_bckp::M2S_2H_BCKUP_R
- vbat::vwr_bckp::M2S_2H_BCKUP_W
- vbat::vwr_bckp::M2S_42H_BCKUP_R
- vbat::vwr_bckp::M2S_42H_BCKUP_W
- vbat_ram::MEM
- vci::BUFFER_EN
- vci::CTRL_STS
- vci::HLDOFF_CNT
- vci::INPUT_EN
- vci::LATCH_EN
- vci::LATCH_RST
- vci::NEDGE_DET
- vci::PEDGE_DET
- vci::POLARITY
- vci::buffer_en::V_BUF_R
- vci::buffer_en::V_BUF_W
- vci::ctrl_sts::FLTRS_BYPASS_R
- vci::ctrl_sts::FLTRS_BYPASS_W
- vci::ctrl_sts::FW_EXT_R
- vci::ctrl_sts::FW_EXT_W
- vci::ctrl_sts::RTC_ALRM_R
- vci::ctrl_sts::RTC_ALRM_W
- vci::ctrl_sts::SYSPWR_PRES_R
- vci::ctrl_sts::SYSPWR_PRES_W
- vci::ctrl_sts::VCI_FW_CTRL_R
- vci::ctrl_sts::VCI_FW_CTRL_W
- vci::ctrl_sts::VCI_IN_R
- vci::ctrl_sts::VCI_IN_W
- vci::ctrl_sts::VCI_OUT_GPIO_SEL_R
- vci::ctrl_sts::VCI_OUT_GPIO_SEL_W
- vci::ctrl_sts::VCI_OUT_R
- vci::ctrl_sts::VCI_OUT_W
- vci::ctrl_sts::VCI_OVRD_IN_R
- vci::ctrl_sts::VCI_OVRD_IN_W
- vci::ctrl_sts::WK_ALRM_R
- vci::ctrl_sts::WK_ALRM_W
- vci::hldoff_cnt::TIME_R
- vci::hldoff_cnt::TIME_W
- vci::input_en::IE_R
- vci::input_en::IE_W
- vci::latch_en::LE_R
- vci::latch_en::LE_W
- vci::latch_en::RTC_ALRM_LE_R
- vci::latch_en::RTC_ALRM_LE_W
- vci::latch_en::WK_ALRM_LE_R
- vci::latch_en::WK_ALRM_LE_W
- vci::latch_rst::LS_R
- vci::latch_rst::LS_W
- vci::latch_rst::RTC_ALRM_LS_R
- vci::latch_rst::RTC_ALRM_LS_W
- vci::latch_rst::WK_ALRM_LS_R
- vci::latch_rst::WK_ALRM_LS_W
- vci::nedge_det::VCI_IN_R
- vci::nedge_det::VCI_IN_W
- vci::pedge_det::VCI_IN_R
- vci::pedge_det::VCI_IN_W
- vci::polarity::VCI_IN_R
- vci::polarity::VCI_IN_W
- wdt::CNT
- wdt::CTRL
- wdt::IEN
- wdt::KICK
- wdt::LOAD
- wdt::STS
- wdt::ctrl::HIB_TMR0_STL_R
- wdt::ctrl::HIB_TMR0_STL_W
- wdt::ctrl::JTAG_STL_R
- wdt::ctrl::JTAG_STL_W
- wdt::ctrl::WDT_EN_R
- wdt::ctrl::WDT_EN_W
- wdt::ctrl::WDT_RST_R
- wdt::ctrl::WDT_RST_W
- wdt::ctrl::WDT_STS_R
- wdt::ctrl::WDT_STS_W
- wdt::ctrl::WK_TMR_STL_R
- wdt::ctrl::WK_TMR_STL_W
- wdt::ien::WDT_INTEN_R
- wdt::ien::WDT_INTEN_W
- wdt::sts::WDT_EV_IRQ_R
- wdt::sts::WDT_EV_IRQ_W
- week::ALARM_CNT
- week::CLKDIV
- week::CTRL
- week::SS_INTR_SEL
- week::SWK_ALARM
- week::SWK_CTRL
- week::TMR_COMP
- week::alarm_cnt::WK_CNTR_R
- week::alarm_cnt::WK_CNTR_W
- week::clkdiv::DIV_R
- week::clkdiv::DIV_W
- week::ctrl::PWRUP_EN_R
- week::ctrl::PWRUP_EN_W
- week::ctrl::WT_EN_R
- week::ctrl::WT_EN_W
- week::ss_intr_sel::SPISR_R
- week::ss_intr_sel::SPISR_W
- week::swk_alarm::CNTR_LOAD_R
- week::swk_alarm::CNTR_STS_R
- week::swk_ctrl::AU_RLD_R
- week::swk_ctrl::SWKTMR_PWRUP_EVT_STS_R
- week::swk_ctrl::SWK_TICK_R
- week::swk_ctrl::TEST0_R
- week::swk_ctrl::TEST_R
- week::swk_ctrl::WKTMR_PWRUP_EVT_STS_R
- week::tmr_comp::WK_COMP_R
- week::tmr_comp::WK_COMP_W