#[doc = "Register `RCCTL0` reader"]
pub type R = crate::R<Rcctl0Spec>;
#[doc = "Register `RCCTL0` writer"]
pub type W = crate::W<Rcctl0Spec>;
#[doc = "Field `RCRS0OFF` reader - RAM Controller RAM Sector 0 Off"]
pub type Rcrs0offR = crate::BitReader;
#[doc = "Field `RCRS0OFF` writer - RAM Controller RAM Sector 0 Off"]
pub type Rcrs0offW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `RCRS1OFF` reader - RAM Controller RAM Sector 1 Off"]
pub type Rcrs1offR = crate::BitReader;
#[doc = "Field `RCRS1OFF` writer - RAM Controller RAM Sector 1 Off"]
pub type Rcrs1offW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `RCRS2OFF` reader - RAM Controller RAM Sector 2 Off"]
pub type Rcrs2offR = crate::BitReader;
#[doc = "Field `RCRS2OFF` writer - RAM Controller RAM Sector 2 Off"]
pub type Rcrs2offW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `RCRS3OFF` reader - RAM Controller RAM Sector 3 Off"]
pub type Rcrs3offR = crate::BitReader;
#[doc = "Field `RCRS3OFF` writer - RAM Controller RAM Sector 3 Off"]
pub type Rcrs3offW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - RAM Controller RAM Sector 0 Off"]
#[inline(always)]
pub fn rcrs0off(&self) -> Rcrs0offR {
Rcrs0offR::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - RAM Controller RAM Sector 1 Off"]
#[inline(always)]
pub fn rcrs1off(&self) -> Rcrs1offR {
Rcrs1offR::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - RAM Controller RAM Sector 2 Off"]
#[inline(always)]
pub fn rcrs2off(&self) -> Rcrs2offR {
Rcrs2offR::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - RAM Controller RAM Sector 3 Off"]
#[inline(always)]
pub fn rcrs3off(&self) -> Rcrs3offR {
Rcrs3offR::new(((self.bits >> 3) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - RAM Controller RAM Sector 0 Off"]
#[inline(always)]
pub fn rcrs0off(&mut self) -> Rcrs0offW<'_, Rcctl0Spec> {
Rcrs0offW::new(self, 0)
}
#[doc = "Bit 1 - RAM Controller RAM Sector 1 Off"]
#[inline(always)]
pub fn rcrs1off(&mut self) -> Rcrs1offW<'_, Rcctl0Spec> {
Rcrs1offW::new(self, 1)
}
#[doc = "Bit 2 - RAM Controller RAM Sector 2 Off"]
#[inline(always)]
pub fn rcrs2off(&mut self) -> Rcrs2offW<'_, Rcctl0Spec> {
Rcrs2offW::new(self, 2)
}
#[doc = "Bit 3 - RAM Controller RAM Sector 3 Off"]
#[inline(always)]
pub fn rcrs3off(&mut self) -> Rcrs3offW<'_, Rcctl0Spec> {
Rcrs3offW::new(self, 3)
}
}
#[doc = "Ram Controller Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rcctl0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rcctl0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Rcctl0Spec;
impl crate::RegisterSpec for Rcctl0Spec {
type Ux = u16;
}
#[doc = "`read()` method returns [`rcctl0::R`](R) reader structure"]
impl crate::Readable for Rcctl0Spec {}
#[doc = "`write(|w| ..)` method takes [`rcctl0::W`](W) writer structure"]
impl crate::Writable for Rcctl0Spec {
type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets RCCTL0 to value 0"]
impl crate::Resettable for Rcctl0Spec {}