cc3220sf/sspi/
hl_sysconfig.rs

1#[doc = "Reader of register HL_SYSCONFIG"]
2pub type R = crate::R<u32, super::HL_SYSCONFIG>;
3#[doc = "Writer for register HL_SYSCONFIG"]
4pub type W = crate::W<u32, super::HL_SYSCONFIG>;
5#[doc = "Register HL_SYSCONFIG `reset()`'s with value 0"]
6impl crate::ResetValue for super::HL_SYSCONFIG {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `IDLEMODE`"]
14pub type IDLEMODE_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `IDLEMODE`"]
16pub struct IDLEMODE_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> IDLEMODE_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
24        self.w
25    }
26}
27impl R {
28    #[doc = "Bits 2:3 - Configuration of the local target state management mode. By definition target can handle read/write transaction as long as it is out of IDLE state. 0x0 Force-idle mode: local target's idle state follows (acknowledges) the system's idle requests unconditionally i.e. regardless of the IP module's internal requirements.Backup mode for debug only. 0x1 No-idle mode: local target never enters idle state.Backup mode for debug only. 0x2 Smart-idle mode: local target's idle state eventually follows (acknowledges) the system's idle requests depending on the IP module's internal requirements.IP module shall not generate (IRQ- or DMA-request-related) wakeup events. 0x3 &quot;Smart-idle wakeup-capable mode: local target's idle state eventually follows (acknowledges) the system's idle requests depending on the IP module's internal requirements.IP module may generate (IRQ- or DMA-request-related) wakeup events when in idle state.Mode is only relevant if the appropriate IP module &quot;&quot;swakeup&quot;&quot; output(s) is (are) implemented.&quot;"]
29    #[inline(always)]
30    pub fn idlemode(&self) -> IDLEMODE_R {
31        IDLEMODE_R::new(((self.bits >> 2) & 0x03) as u8)
32    }
33}
34impl W {
35    #[doc = "Bits 2:3 - Configuration of the local target state management mode. By definition target can handle read/write transaction as long as it is out of IDLE state. 0x0 Force-idle mode: local target's idle state follows (acknowledges) the system's idle requests unconditionally i.e. regardless of the IP module's internal requirements.Backup mode for debug only. 0x1 No-idle mode: local target never enters idle state.Backup mode for debug only. 0x2 Smart-idle mode: local target's idle state eventually follows (acknowledges) the system's idle requests depending on the IP module's internal requirements.IP module shall not generate (IRQ- or DMA-request-related) wakeup events. 0x3 &quot;Smart-idle wakeup-capable mode: local target's idle state eventually follows (acknowledges) the system's idle requests depending on the IP module's internal requirements.IP module may generate (IRQ- or DMA-request-related) wakeup events when in idle state.Mode is only relevant if the appropriate IP module &quot;&quot;swakeup&quot;&quot; output(s) is (are) implemented.&quot;"]
36    #[inline(always)]
37    pub fn idlemode(&mut self) -> IDLEMODE_W {
38        IDLEMODE_W { w: self }
39    }
40}
cc3220sf/sspi/hl_sysconfig.rs

cc3220sf/sspi/
hl_sysconfig.rs
