cc3220sf/gpioa1/
gpiomis.rs

1#[doc = "Reader of register GPIOMIS"]
2pub type R = crate::R<u32, super::GPIOMIS>;
3#[doc = "Writer for register GPIOMIS"]
4pub type W = crate::W<u32, super::GPIOMIS>;
5#[doc = "Register GPIOMIS `reset()`'s with value 0"]
6impl crate::ResetValue for super::GPIOMIS {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `RIS`"]
14pub type RIS_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `RIS`"]
16pub struct RIS_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> RIS_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
24        self.w
25    }
26}
27impl R {
28    #[doc = "Bits 0:7 - GPIO masked interrupt status on corresponding pin"]
29    #[inline(always)]
30    pub fn ris(&self) -> RIS_R {
31        RIS_R::new((self.bits & 0xff) as u8)
32    }
33}
34impl W {
35    #[doc = "Bits 0:7 - GPIO masked interrupt status on corresponding pin"]
36    #[inline(always)]
37    pub fn ris(&mut self) -> RIS_W {
38        RIS_W { w: self }
39    }
40}
cc3220sf/gpioa1/gpiomis.rs

cc3220sf/gpioa1/
gpiomis.rs
