cc2650/i2s0/
stmpouttrig.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::STMPOUTTRIG {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R { bits: self.register.get() }
26 }
27 #[doc = r" Writes to the register"]
28 #[inline]
29 pub fn write<F>(&self, f: F)
30 where
31 F: FnOnce(&mut W) -> &mut W,
32 {
33 let mut w = W::reset_value();
34 f(&mut w);
35 self.register.set(w.bits);
36 }
37 #[doc = r" Writes the reset value to the register"]
38 #[inline]
39 pub fn reset(&self) {
40 self.write(|w| w)
41 }
42}
43#[doc = r" Value of the field"]
44pub struct RESERVED16R {
45 bits: u16,
46}
47impl RESERVED16R {
48 #[doc = r" Value of the field as raw bits"]
49 #[inline]
50 pub fn bits(&self) -> u16 {
51 self.bits
52 }
53}
54#[doc = r" Value of the field"]
55pub struct OUT_START_WCNTR {
56 bits: u16,
57}
58impl OUT_START_WCNTR {
59 #[doc = r" Value of the field as raw bits"]
60 #[inline]
61 pub fn bits(&self) -> u16 {
62 self.bits
63 }
64}
65#[doc = r" Proxy"]
66pub struct _OUT_START_WCNTW<'a> {
67 w: &'a mut W,
68}
69impl<'a> _OUT_START_WCNTW<'a> {
70 #[doc = r" Writes raw bits to the field"]
71 #[inline]
72 pub unsafe fn bits(self, value: u16) -> &'a mut W {
73 const MASK: u16 = 65535;
74 const OFFSET: u8 = 0;
75 self.w.bits &= !((MASK as u32) << OFFSET);
76 self.w.bits |= ((value & MASK) as u32) << OFFSET;
77 self.w
78 }
79}
80impl R {
81 #[doc = r" Value of the register as raw bits"]
82 #[inline]
83 pub fn bits(&self) -> u32 {
84 self.bits
85 }
86 #[doc = "Bits 16:31 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
87 #[inline]
88 pub fn reserved16(&self) -> RESERVED16R {
89 let bits = {
90 const MASK: u16 = 65535;
91 const OFFSET: u8 = 16;
92 ((self.bits >> OFFSET) & MASK as u32) as u16
93 };
94 RESERVED16R { bits }
95 }
96 #[doc = "Bits 0:15 - Compare value used to start the outgoing audio streams. This bit field must equal the WCLK counter value during the WCLK period in which the first output word(s) read from memory are clocked out (that is the sample at the start of the very first DMA output buffer). The value of this register takes effect when the following conditions are met: - One or more pins are configured as outputs in AIFDIRCFG. - AIFDMACFG has been configured for the correct buffer size, and 32 BCLK cycle ticks have happened. - 2 samples have been preloaded from memory (examine the AIFOUTPTR register if necessary). Note: The memory read access is only performed when required, that is channels 0/1 must be selected in AIFWMASK0/AIFWMASK1. Note: To avoid false triggers, this bit field should be set higher than STMPWPER.VALUE."]
97 #[inline]
98 pub fn out_start_wcnt(&self) -> OUT_START_WCNTR {
99 let bits = {
100 const MASK: u16 = 65535;
101 const OFFSET: u8 = 0;
102 ((self.bits >> OFFSET) & MASK as u32) as u16
103 };
104 OUT_START_WCNTR { bits }
105 }
106}
107impl W {
108 #[doc = r" Reset value of the register"]
109 #[inline]
110 pub fn reset_value() -> W {
111 W { bits: 0 }
112 }
113 #[doc = r" Writes raw bits to the register"]
114 #[inline]
115 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
116 self.bits = bits;
117 self
118 }
119 #[doc = "Bits 0:15 - Compare value used to start the outgoing audio streams. This bit field must equal the WCLK counter value during the WCLK period in which the first output word(s) read from memory are clocked out (that is the sample at the start of the very first DMA output buffer). The value of this register takes effect when the following conditions are met: - One or more pins are configured as outputs in AIFDIRCFG. - AIFDMACFG has been configured for the correct buffer size, and 32 BCLK cycle ticks have happened. - 2 samples have been preloaded from memory (examine the AIFOUTPTR register if necessary). Note: The memory read access is only performed when required, that is channels 0/1 must be selected in AIFWMASK0/AIFWMASK1. Note: To avoid false triggers, this bit field should be set higher than STMPWPER.VALUE."]
120 #[inline]
121 pub fn out_start_wcnt(&mut self) -> _OUT_START_WCNTW {
122 _OUT_START_WCNTW { w: self }
123 }
124}