1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::GPT3BCAPTSEL {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R { bits: self.register.get() }
26 }
27 #[doc = r" Writes to the register"]
28 #[inline]
29 pub fn write<F>(&self, f: F)
30 where
31 F: FnOnce(&mut W) -> &mut W,
32 {
33 let mut w = W::reset_value();
34 f(&mut w);
35 self.register.set(w.bits);
36 }
37 #[doc = r" Writes the reset value to the register"]
38 #[inline]
39 pub fn reset(&self) {
40 self.write(|w| w)
41 }
42}
43#[doc = "Possible values of the field `EV`"]
44#[derive(Clone, Copy, Debug, PartialEq)]
45pub enum EVR {
46 #[doc = "Always asserted"]
47 ALWAYS_ACTIVE,
48 #[doc = "RTC periodic event controlled by AON_RTC:CTL.RTC_UPD_EN"]
49 AON_RTC_UPD,
50 #[doc = "AUX ADC interrupt event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags are found here AUX_EVCTL:EVTOMCUFLAGS"]
51 AUX_ADC_IRQ,
52 #[doc = "Loopback of OBSMUX0 through AUX, corresponds to AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0\n\n"]
53 AUX_OBSMUX0,
54 #[doc = "AUX ADC FIFO watermark event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL"]
55 AUX_ADC_FIFO_ALMOST_FULL,
56 #[doc = "AUX ADC done, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE"]
57 AUX_ADC_DONE,
58 #[doc = "Autotake event from AUX semaphore, configured by AUX_SMPH:AUTOTAKE"]
59 AUX_SMPH_AUTOTAKE_DONE,
60 #[doc = "AUX timer 1 event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV"]
61 AUX_TIMER1_EV,
62 #[doc = "AUX timer 0 event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV"]
63 AUX_TIMER0_EV,
64 #[doc = "AUX TDC measurement done event, corresponds to the flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the AUX_TDC status AUX_TDC:STAT.DONE"]
65 AUX_TDC_DONE,
66 #[doc = "AUX Compare B event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB"]
67 AUX_COMPB,
68 #[doc = "AUX Compare A event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA"]
69 AUX_COMPA,
70 #[doc = "AON wakeup event, corresponds flags are here AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV"]
71 AUX_AON_WU_EV,
72 #[doc = "Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT7 wil be routed here."]
73 PORT_EVENT7,
74 #[doc = "Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT6 wil be routed here."]
75 PORT_EVENT6,
76 #[doc = "GPT3B compare event. Configured by GPT3:TBMR.TCACT"]
77 GPT3B_CMP,
78 #[doc = "GPT3A compare event. Configured by GPT3:TAMR.TCACT"]
79 GPT3A_CMP,
80 #[doc = "GPT2B compare event. Configured by GPT2:TBMR.TCACT"]
81 GPT2B_CMP,
82 #[doc = "GPT2A compare event. Configured by GPT2:TAMR.TCACT"]
83 GPT2A_CMP,
84 #[doc = "GPT1B compare event. Configured by GPT1:TBMR.TCACT"]
85 GPT1B_CMP,
86 #[doc = "GPT1A compare event. Configured by GPT1:TAMR.TCACT"]
87 GPT1A_CMP,
88 #[doc = "GPT0B compare event. Configured by GPT0:TBMR.TCACT"]
89 GPT0B_CMP,
90 #[doc = "GPT0A compare event. Configured by GPT0:TAMR.TCACT"]
91 GPT0A_CMP,
92 #[doc = "UART0 combined interrupt, interrupt flags are found here UART0:MIS"]
93 UART0_COMB,
94 #[doc = "SSI1 combined interrupt, interrupt flags are found here SSI1:MIS"]
95 SSI1_COMB,
96 #[doc = "SSI0 combined interrupt, interrupt flags are found here SSI0:MIS"]
97 SSI0_COMB,
98 #[doc = "Combined Interrupt for CPE Generated events. Corresponding flags are here RFC_DBELL:RFCPEIFG. Only interrupts selected with CPE1 in RFC_DBELL:RFCPEIFG can trigger a RFC_CPE_1 event"]
99 RFC_CPE_1,
100 #[doc = "Combined Interrupt for CPE Generated events. Corresponding flags are here RFC_DBELL:RFCPEIFG. Only interrupts selected with CPE0 in RFC_DBELL:RFCPEIFG can trigger a RFC_CPE_0 event"]
101 RFC_CPE_0,
102 #[doc = "Combined RFC hardware interrupt, corresponding flag is here RFC_DBELL:RFHWIFG"]
103 RFC_HW_COMB,
104 #[doc = "RFC Doorbell Command Acknowledgement Interrupt, equvialent to RFC_DBELL:RFACKIFG.ACKFLAG"]
105 RFC_CMD_ACK,
106 #[doc = "FLASH controller error event, the status flags are FLASH:FEDACSTAT.FSM_DONE and FLASH:FEDACSTAT.RVF_INT"]
107 FLASH,
108 #[doc = "AUX combined event, the corresponding flag register is here AUX_EVCTL:EVTOMCUFLAGS"]
109 AUX_COMB,
110 #[doc = "Event from AON_RTC, controlled by the AON_RTC:CTL.COMB_EV_MASK setting"]
111 AON_RTC_COMB,
112 #[doc = "Edge detect event from IOC. Configureded by the IOC:IOCFGn.EDGE_IRQ_EN and IOC:IOCFGn.EDGE_DET settings"]
113 AON_GPIO_EDGE,
114 #[doc = "Always inactive"]
115 NONE,
116 #[doc = r" Reserved"]
117 _Reserved(u8),
118}
119impl EVR {
120 #[doc = r" Value of the field as raw bits"]
121 #[inline]
122 pub fn bits(&self) -> u8 {
123 match *self {
124 EVR::ALWAYS_ACTIVE => 121,
125 EVR::AON_RTC_UPD => 119,
126 EVR::AUX_ADC_IRQ => 115,
127 EVR::AUX_OBSMUX0 => 114,
128 EVR::AUX_ADC_FIFO_ALMOST_FULL => 113,
129 EVR::AUX_ADC_DONE => 112,
130 EVR::AUX_SMPH_AUTOTAKE_DONE => 111,
131 EVR::AUX_TIMER1_EV => 110,
132 EVR::AUX_TIMER0_EV => 109,
133 EVR::AUX_TDC_DONE => 108,
134 EVR::AUX_COMPB => 107,
135 EVR::AUX_COMPA => 106,
136 EVR::AUX_AON_WU_EV => 105,
137 EVR::PORT_EVENT7 => 92,
138 EVR::PORT_EVENT6 => 91,
139 EVR::GPT3B_CMP => 68,
140 EVR::GPT3A_CMP => 67,
141 EVR::GPT2B_CMP => 66,
142 EVR::GPT2A_CMP => 65,
143 EVR::GPT1B_CMP => 64,
144 EVR::GPT1A_CMP => 63,
145 EVR::GPT0B_CMP => 62,
146 EVR::GPT0A_CMP => 61,
147 EVR::UART0_COMB => 36,
148 EVR::SSI1_COMB => 35,
149 EVR::SSI0_COMB => 34,
150 EVR::RFC_CPE_1 => 30,
151 EVR::RFC_CPE_0 => 27,
152 EVR::RFC_HW_COMB => 26,
153 EVR::RFC_CMD_ACK => 25,
154 EVR::FLASH => 21,
155 EVR::AUX_COMB => 11,
156 EVR::AON_RTC_COMB => 7,
157 EVR::AON_GPIO_EDGE => 4,
158 EVR::NONE => 0,
159 EVR::_Reserved(bits) => bits,
160 }
161 }
162 #[allow(missing_docs)]
163 #[doc(hidden)]
164 #[inline]
165 pub fn _from(value: u8) -> EVR {
166 match value {
167 121 => EVR::ALWAYS_ACTIVE,
168 119 => EVR::AON_RTC_UPD,
169 115 => EVR::AUX_ADC_IRQ,
170 114 => EVR::AUX_OBSMUX0,
171 113 => EVR::AUX_ADC_FIFO_ALMOST_FULL,
172 112 => EVR::AUX_ADC_DONE,
173 111 => EVR::AUX_SMPH_AUTOTAKE_DONE,
174 110 => EVR::AUX_TIMER1_EV,
175 109 => EVR::AUX_TIMER0_EV,
176 108 => EVR::AUX_TDC_DONE,
177 107 => EVR::AUX_COMPB,
178 106 => EVR::AUX_COMPA,
179 105 => EVR::AUX_AON_WU_EV,
180 92 => EVR::PORT_EVENT7,
181 91 => EVR::PORT_EVENT6,
182 68 => EVR::GPT3B_CMP,
183 67 => EVR::GPT3A_CMP,
184 66 => EVR::GPT2B_CMP,
185 65 => EVR::GPT2A_CMP,
186 64 => EVR::GPT1B_CMP,
187 63 => EVR::GPT1A_CMP,
188 62 => EVR::GPT0B_CMP,
189 61 => EVR::GPT0A_CMP,
190 36 => EVR::UART0_COMB,
191 35 => EVR::SSI1_COMB,
192 34 => EVR::SSI0_COMB,
193 30 => EVR::RFC_CPE_1,
194 27 => EVR::RFC_CPE_0,
195 26 => EVR::RFC_HW_COMB,
196 25 => EVR::RFC_CMD_ACK,
197 21 => EVR::FLASH,
198 11 => EVR::AUX_COMB,
199 7 => EVR::AON_RTC_COMB,
200 4 => EVR::AON_GPIO_EDGE,
201 0 => EVR::NONE,
202 i => EVR::_Reserved(i),
203 }
204 }
205 #[doc = "Checks if the value of the field is `ALWAYS_ACTIVE`"]
206 #[inline]
207 pub fn is_always_active(&self) -> bool {
208 *self == EVR::ALWAYS_ACTIVE
209 }
210 #[doc = "Checks if the value of the field is `AON_RTC_UPD`"]
211 #[inline]
212 pub fn is_aon_rtc_upd(&self) -> bool {
213 *self == EVR::AON_RTC_UPD
214 }
215 #[doc = "Checks if the value of the field is `AUX_ADC_IRQ`"]
216 #[inline]
217 pub fn is_aux_adc_irq(&self) -> bool {
218 *self == EVR::AUX_ADC_IRQ
219 }
220 #[doc = "Checks if the value of the field is `AUX_OBSMUX0`"]
221 #[inline]
222 pub fn is_aux_obsmux0(&self) -> bool {
223 *self == EVR::AUX_OBSMUX0
224 }
225 #[doc = "Checks if the value of the field is `AUX_ADC_FIFO_ALMOST_FULL`"]
226 #[inline]
227 pub fn is_aux_adc_fifo_almost_full(&self) -> bool {
228 *self == EVR::AUX_ADC_FIFO_ALMOST_FULL
229 }
230 #[doc = "Checks if the value of the field is `AUX_ADC_DONE`"]
231 #[inline]
232 pub fn is_aux_adc_done(&self) -> bool {
233 *self == EVR::AUX_ADC_DONE
234 }
235 #[doc = "Checks if the value of the field is `AUX_SMPH_AUTOTAKE_DONE`"]
236 #[inline]
237 pub fn is_aux_smph_autotake_done(&self) -> bool {
238 *self == EVR::AUX_SMPH_AUTOTAKE_DONE
239 }
240 #[doc = "Checks if the value of the field is `AUX_TIMER1_EV`"]
241 #[inline]
242 pub fn is_aux_timer1_ev(&self) -> bool {
243 *self == EVR::AUX_TIMER1_EV
244 }
245 #[doc = "Checks if the value of the field is `AUX_TIMER0_EV`"]
246 #[inline]
247 pub fn is_aux_timer0_ev(&self) -> bool {
248 *self == EVR::AUX_TIMER0_EV
249 }
250 #[doc = "Checks if the value of the field is `AUX_TDC_DONE`"]
251 #[inline]
252 pub fn is_aux_tdc_done(&self) -> bool {
253 *self == EVR::AUX_TDC_DONE
254 }
255 #[doc = "Checks if the value of the field is `AUX_COMPB`"]
256 #[inline]
257 pub fn is_aux_compb(&self) -> bool {
258 *self == EVR::AUX_COMPB
259 }
260 #[doc = "Checks if the value of the field is `AUX_COMPA`"]
261 #[inline]
262 pub fn is_aux_compa(&self) -> bool {
263 *self == EVR::AUX_COMPA
264 }
265 #[doc = "Checks if the value of the field is `AUX_AON_WU_EV`"]
266 #[inline]
267 pub fn is_aux_aon_wu_ev(&self) -> bool {
268 *self == EVR::AUX_AON_WU_EV
269 }
270 #[doc = "Checks if the value of the field is `PORT_EVENT7`"]
271 #[inline]
272 pub fn is_port_event7(&self) -> bool {
273 *self == EVR::PORT_EVENT7
274 }
275 #[doc = "Checks if the value of the field is `PORT_EVENT6`"]
276 #[inline]
277 pub fn is_port_event6(&self) -> bool {
278 *self == EVR::PORT_EVENT6
279 }
280 #[doc = "Checks if the value of the field is `GPT3B_CMP`"]
281 #[inline]
282 pub fn is_gpt3b_cmp(&self) -> bool {
283 *self == EVR::GPT3B_CMP
284 }
285 #[doc = "Checks if the value of the field is `GPT3A_CMP`"]
286 #[inline]
287 pub fn is_gpt3a_cmp(&self) -> bool {
288 *self == EVR::GPT3A_CMP
289 }
290 #[doc = "Checks if the value of the field is `GPT2B_CMP`"]
291 #[inline]
292 pub fn is_gpt2b_cmp(&self) -> bool {
293 *self == EVR::GPT2B_CMP
294 }
295 #[doc = "Checks if the value of the field is `GPT2A_CMP`"]
296 #[inline]
297 pub fn is_gpt2a_cmp(&self) -> bool {
298 *self == EVR::GPT2A_CMP
299 }
300 #[doc = "Checks if the value of the field is `GPT1B_CMP`"]
301 #[inline]
302 pub fn is_gpt1b_cmp(&self) -> bool {
303 *self == EVR::GPT1B_CMP
304 }
305 #[doc = "Checks if the value of the field is `GPT1A_CMP`"]
306 #[inline]
307 pub fn is_gpt1a_cmp(&self) -> bool {
308 *self == EVR::GPT1A_CMP
309 }
310 #[doc = "Checks if the value of the field is `GPT0B_CMP`"]
311 #[inline]
312 pub fn is_gpt0b_cmp(&self) -> bool {
313 *self == EVR::GPT0B_CMP
314 }
315 #[doc = "Checks if the value of the field is `GPT0A_CMP`"]
316 #[inline]
317 pub fn is_gpt0a_cmp(&self) -> bool {
318 *self == EVR::GPT0A_CMP
319 }
320 #[doc = "Checks if the value of the field is `UART0_COMB`"]
321 #[inline]
322 pub fn is_uart0_comb(&self) -> bool {
323 *self == EVR::UART0_COMB
324 }
325 #[doc = "Checks if the value of the field is `SSI1_COMB`"]
326 #[inline]
327 pub fn is_ssi1_comb(&self) -> bool {
328 *self == EVR::SSI1_COMB
329 }
330 #[doc = "Checks if the value of the field is `SSI0_COMB`"]
331 #[inline]
332 pub fn is_ssi0_comb(&self) -> bool {
333 *self == EVR::SSI0_COMB
334 }
335 #[doc = "Checks if the value of the field is `RFC_CPE_1`"]
336 #[inline]
337 pub fn is_rfc_cpe_1(&self) -> bool {
338 *self == EVR::RFC_CPE_1
339 }
340 #[doc = "Checks if the value of the field is `RFC_CPE_0`"]
341 #[inline]
342 pub fn is_rfc_cpe_0(&self) -> bool {
343 *self == EVR::RFC_CPE_0
344 }
345 #[doc = "Checks if the value of the field is `RFC_HW_COMB`"]
346 #[inline]
347 pub fn is_rfc_hw_comb(&self) -> bool {
348 *self == EVR::RFC_HW_COMB
349 }
350 #[doc = "Checks if the value of the field is `RFC_CMD_ACK`"]
351 #[inline]
352 pub fn is_rfc_cmd_ack(&self) -> bool {
353 *self == EVR::RFC_CMD_ACK
354 }
355 #[doc = "Checks if the value of the field is `FLASH`"]
356 #[inline]
357 pub fn is_flash(&self) -> bool {
358 *self == EVR::FLASH
359 }
360 #[doc = "Checks if the value of the field is `AUX_COMB`"]
361 #[inline]
362 pub fn is_aux_comb(&self) -> bool {
363 *self == EVR::AUX_COMB
364 }
365 #[doc = "Checks if the value of the field is `AON_RTC_COMB`"]
366 #[inline]
367 pub fn is_aon_rtc_comb(&self) -> bool {
368 *self == EVR::AON_RTC_COMB
369 }
370 #[doc = "Checks if the value of the field is `AON_GPIO_EDGE`"]
371 #[inline]
372 pub fn is_aon_gpio_edge(&self) -> bool {
373 *self == EVR::AON_GPIO_EDGE
374 }
375 #[doc = "Checks if the value of the field is `NONE`"]
376 #[inline]
377 pub fn is_none(&self) -> bool {
378 *self == EVR::NONE
379 }
380}
381#[doc = "Values that can be written to the field `EV`"]
382#[derive(Clone, Copy, Debug, PartialEq)]
383pub enum EVW {
384 #[doc = "Always asserted"]
385 ALWAYS_ACTIVE,
386 #[doc = "RTC periodic event controlled by AON_RTC:CTL.RTC_UPD_EN"]
387 AON_RTC_UPD,
388 #[doc = "AUX ADC interrupt event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags are found here AUX_EVCTL:EVTOMCUFLAGS"]
389 AUX_ADC_IRQ,
390 #[doc = "Loopback of OBSMUX0 through AUX, corresponds to AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0\n\n"]
391 AUX_OBSMUX0,
392 #[doc = "AUX ADC FIFO watermark event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL"]
393 AUX_ADC_FIFO_ALMOST_FULL,
394 #[doc = "AUX ADC done, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE"]
395 AUX_ADC_DONE,
396 #[doc = "Autotake event from AUX semaphore, configured by AUX_SMPH:AUTOTAKE"]
397 AUX_SMPH_AUTOTAKE_DONE,
398 #[doc = "AUX timer 1 event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV"]
399 AUX_TIMER1_EV,
400 #[doc = "AUX timer 0 event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV"]
401 AUX_TIMER0_EV,
402 #[doc = "AUX TDC measurement done event, corresponds to the flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the AUX_TDC status AUX_TDC:STAT.DONE"]
403 AUX_TDC_DONE,
404 #[doc = "AUX Compare B event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB"]
405 AUX_COMPB,
406 #[doc = "AUX Compare A event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA"]
407 AUX_COMPA,
408 #[doc = "AON wakeup event, corresponds flags are here AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV"]
409 AUX_AON_WU_EV,
410 #[doc = "Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT7 wil be routed here."]
411 PORT_EVENT7,
412 #[doc = "Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT6 wil be routed here."]
413 PORT_EVENT6,
414 #[doc = "GPT3B compare event. Configured by GPT3:TBMR.TCACT"]
415 GPT3B_CMP,
416 #[doc = "GPT3A compare event. Configured by GPT3:TAMR.TCACT"]
417 GPT3A_CMP,
418 #[doc = "GPT2B compare event. Configured by GPT2:TBMR.TCACT"]
419 GPT2B_CMP,
420 #[doc = "GPT2A compare event. Configured by GPT2:TAMR.TCACT"]
421 GPT2A_CMP,
422 #[doc = "GPT1B compare event. Configured by GPT1:TBMR.TCACT"]
423 GPT1B_CMP,
424 #[doc = "GPT1A compare event. Configured by GPT1:TAMR.TCACT"]
425 GPT1A_CMP,
426 #[doc = "GPT0B compare event. Configured by GPT0:TBMR.TCACT"]
427 GPT0B_CMP,
428 #[doc = "GPT0A compare event. Configured by GPT0:TAMR.TCACT"]
429 GPT0A_CMP,
430 #[doc = "UART0 combined interrupt, interrupt flags are found here UART0:MIS"]
431 UART0_COMB,
432 #[doc = "SSI1 combined interrupt, interrupt flags are found here SSI1:MIS"]
433 SSI1_COMB,
434 #[doc = "SSI0 combined interrupt, interrupt flags are found here SSI0:MIS"]
435 SSI0_COMB,
436 #[doc = "Combined Interrupt for CPE Generated events. Corresponding flags are here RFC_DBELL:RFCPEIFG. Only interrupts selected with CPE1 in RFC_DBELL:RFCPEIFG can trigger a RFC_CPE_1 event"]
437 RFC_CPE_1,
438 #[doc = "Combined Interrupt for CPE Generated events. Corresponding flags are here RFC_DBELL:RFCPEIFG. Only interrupts selected with CPE0 in RFC_DBELL:RFCPEIFG can trigger a RFC_CPE_0 event"]
439 RFC_CPE_0,
440 #[doc = "Combined RFC hardware interrupt, corresponding flag is here RFC_DBELL:RFHWIFG"]
441 RFC_HW_COMB,
442 #[doc = "RFC Doorbell Command Acknowledgement Interrupt, equvialent to RFC_DBELL:RFACKIFG.ACKFLAG"]
443 RFC_CMD_ACK,
444 #[doc = "FLASH controller error event, the status flags are FLASH:FEDACSTAT.FSM_DONE and FLASH:FEDACSTAT.RVF_INT"]
445 FLASH,
446 #[doc = "AUX combined event, the corresponding flag register is here AUX_EVCTL:EVTOMCUFLAGS"]
447 AUX_COMB,
448 #[doc = "Event from AON_RTC, controlled by the AON_RTC:CTL.COMB_EV_MASK setting"]
449 AON_RTC_COMB,
450 #[doc = "Edge detect event from IOC. Configureded by the IOC:IOCFGn.EDGE_IRQ_EN and IOC:IOCFGn.EDGE_DET settings"]
451 AON_GPIO_EDGE,
452 #[doc = "Always inactive"]
453 NONE,
454}
455impl EVW {
456 #[allow(missing_docs)]
457 #[doc(hidden)]
458 #[inline]
459 pub fn _bits(&self) -> u8 {
460 match *self {
461 EVW::ALWAYS_ACTIVE => 121,
462 EVW::AON_RTC_UPD => 119,
463 EVW::AUX_ADC_IRQ => 115,
464 EVW::AUX_OBSMUX0 => 114,
465 EVW::AUX_ADC_FIFO_ALMOST_FULL => 113,
466 EVW::AUX_ADC_DONE => 112,
467 EVW::AUX_SMPH_AUTOTAKE_DONE => 111,
468 EVW::AUX_TIMER1_EV => 110,
469 EVW::AUX_TIMER0_EV => 109,
470 EVW::AUX_TDC_DONE => 108,
471 EVW::AUX_COMPB => 107,
472 EVW::AUX_COMPA => 106,
473 EVW::AUX_AON_WU_EV => 105,
474 EVW::PORT_EVENT7 => 92,
475 EVW::PORT_EVENT6 => 91,
476 EVW::GPT3B_CMP => 68,
477 EVW::GPT3A_CMP => 67,
478 EVW::GPT2B_CMP => 66,
479 EVW::GPT2A_CMP => 65,
480 EVW::GPT1B_CMP => 64,
481 EVW::GPT1A_CMP => 63,
482 EVW::GPT0B_CMP => 62,
483 EVW::GPT0A_CMP => 61,
484 EVW::UART0_COMB => 36,
485 EVW::SSI1_COMB => 35,
486 EVW::SSI0_COMB => 34,
487 EVW::RFC_CPE_1 => 30,
488 EVW::RFC_CPE_0 => 27,
489 EVW::RFC_HW_COMB => 26,
490 EVW::RFC_CMD_ACK => 25,
491 EVW::FLASH => 21,
492 EVW::AUX_COMB => 11,
493 EVW::AON_RTC_COMB => 7,
494 EVW::AON_GPIO_EDGE => 4,
495 EVW::NONE => 0,
496 }
497 }
498}
499#[doc = r" Proxy"]
500pub struct _EVW<'a> {
501 w: &'a mut W,
502}
503impl<'a> _EVW<'a> {
504 #[doc = r" Writes `variant` to the field"]
505 #[inline]
506 pub fn variant(self, variant: EVW) -> &'a mut W {
507 unsafe { self.bits(variant._bits()) }
508 }
509 #[doc = "Always asserted"]
510 #[inline]
511 pub fn always_active(self) -> &'a mut W {
512 self.variant(EVW::ALWAYS_ACTIVE)
513 }
514 #[doc = "RTC periodic event controlled by AON_RTC:CTL.RTC_UPD_EN"]
515 #[inline]
516 pub fn aon_rtc_upd(self) -> &'a mut W {
517 self.variant(EVW::AON_RTC_UPD)
518 }
519 #[doc = "AUX ADC interrupt event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags are found here AUX_EVCTL:EVTOMCUFLAGS"]
520 #[inline]
521 pub fn aux_adc_irq(self) -> &'a mut W {
522 self.variant(EVW::AUX_ADC_IRQ)
523 }
524 #[doc = "Loopback of OBSMUX0 through AUX, corresponds to AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0"]
525 #[inline]
526 pub fn aux_obsmux0(self) -> &'a mut W {
527 self.variant(EVW::AUX_OBSMUX0)
528 }
529 #[doc = "AUX ADC FIFO watermark event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL"]
530 #[inline]
531 pub fn aux_adc_fifo_almost_full(self) -> &'a mut W {
532 self.variant(EVW::AUX_ADC_FIFO_ALMOST_FULL)
533 }
534 #[doc = "AUX ADC done, corresponds to AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE"]
535 #[inline]
536 pub fn aux_adc_done(self) -> &'a mut W {
537 self.variant(EVW::AUX_ADC_DONE)
538 }
539 #[doc = "Autotake event from AUX semaphore, configured by AUX_SMPH:AUTOTAKE"]
540 #[inline]
541 pub fn aux_smph_autotake_done(self) -> &'a mut W {
542 self.variant(EVW::AUX_SMPH_AUTOTAKE_DONE)
543 }
544 #[doc = "AUX timer 1 event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV"]
545 #[inline]
546 pub fn aux_timer1_ev(self) -> &'a mut W {
547 self.variant(EVW::AUX_TIMER1_EV)
548 }
549 #[doc = "AUX timer 0 event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV"]
550 #[inline]
551 pub fn aux_timer0_ev(self) -> &'a mut W {
552 self.variant(EVW::AUX_TIMER0_EV)
553 }
554 #[doc = "AUX TDC measurement done event, corresponds to the flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the AUX_TDC status AUX_TDC:STAT.DONE"]
555 #[inline]
556 pub fn aux_tdc_done(self) -> &'a mut W {
557 self.variant(EVW::AUX_TDC_DONE)
558 }
559 #[doc = "AUX Compare B event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB"]
560 #[inline]
561 pub fn aux_compb(self) -> &'a mut W {
562 self.variant(EVW::AUX_COMPB)
563 }
564 #[doc = "AUX Compare A event, corresponds to AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA"]
565 #[inline]
566 pub fn aux_compa(self) -> &'a mut W {
567 self.variant(EVW::AUX_COMPA)
568 }
569 #[doc = "AON wakeup event, corresponds flags are here AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV"]
570 #[inline]
571 pub fn aux_aon_wu_ev(self) -> &'a mut W {
572 self.variant(EVW::AUX_AON_WU_EV)
573 }
574 #[doc = "Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT7 wil be routed here."]
575 #[inline]
576 pub fn port_event7(self) -> &'a mut W {
577 self.variant(EVW::PORT_EVENT7)
578 }
579 #[doc = "Port capture event from IOC, configured by IOC:IOCFGn.PORT_ID. Events on ports configured with ENUM PORT_EVENT6 wil be routed here."]
580 #[inline]
581 pub fn port_event6(self) -> &'a mut W {
582 self.variant(EVW::PORT_EVENT6)
583 }
584 #[doc = "GPT3B compare event. Configured by GPT3:TBMR.TCACT"]
585 #[inline]
586 pub fn gpt3b_cmp(self) -> &'a mut W {
587 self.variant(EVW::GPT3B_CMP)
588 }
589 #[doc = "GPT3A compare event. Configured by GPT3:TAMR.TCACT"]
590 #[inline]
591 pub fn gpt3a_cmp(self) -> &'a mut W {
592 self.variant(EVW::GPT3A_CMP)
593 }
594 #[doc = "GPT2B compare event. Configured by GPT2:TBMR.TCACT"]
595 #[inline]
596 pub fn gpt2b_cmp(self) -> &'a mut W {
597 self.variant(EVW::GPT2B_CMP)
598 }
599 #[doc = "GPT2A compare event. Configured by GPT2:TAMR.TCACT"]
600 #[inline]
601 pub fn gpt2a_cmp(self) -> &'a mut W {
602 self.variant(EVW::GPT2A_CMP)
603 }
604 #[doc = "GPT1B compare event. Configured by GPT1:TBMR.TCACT"]
605 #[inline]
606 pub fn gpt1b_cmp(self) -> &'a mut W {
607 self.variant(EVW::GPT1B_CMP)
608 }
609 #[doc = "GPT1A compare event. Configured by GPT1:TAMR.TCACT"]
610 #[inline]
611 pub fn gpt1a_cmp(self) -> &'a mut W {
612 self.variant(EVW::GPT1A_CMP)
613 }
614 #[doc = "GPT0B compare event. Configured by GPT0:TBMR.TCACT"]
615 #[inline]
616 pub fn gpt0b_cmp(self) -> &'a mut W {
617 self.variant(EVW::GPT0B_CMP)
618 }
619 #[doc = "GPT0A compare event. Configured by GPT0:TAMR.TCACT"]
620 #[inline]
621 pub fn gpt0a_cmp(self) -> &'a mut W {
622 self.variant(EVW::GPT0A_CMP)
623 }
624 #[doc = "UART0 combined interrupt, interrupt flags are found here UART0:MIS"]
625 #[inline]
626 pub fn uart0_comb(self) -> &'a mut W {
627 self.variant(EVW::UART0_COMB)
628 }
629 #[doc = "SSI1 combined interrupt, interrupt flags are found here SSI1:MIS"]
630 #[inline]
631 pub fn ssi1_comb(self) -> &'a mut W {
632 self.variant(EVW::SSI1_COMB)
633 }
634 #[doc = "SSI0 combined interrupt, interrupt flags are found here SSI0:MIS"]
635 #[inline]
636 pub fn ssi0_comb(self) -> &'a mut W {
637 self.variant(EVW::SSI0_COMB)
638 }
639 #[doc = "Combined Interrupt for CPE Generated events. Corresponding flags are here RFC_DBELL:RFCPEIFG. Only interrupts selected with CPE1 in RFC_DBELL:RFCPEIFG can trigger a RFC_CPE_1 event"]
640 #[inline]
641 pub fn rfc_cpe_1(self) -> &'a mut W {
642 self.variant(EVW::RFC_CPE_1)
643 }
644 #[doc = "Combined Interrupt for CPE Generated events. Corresponding flags are here RFC_DBELL:RFCPEIFG. Only interrupts selected with CPE0 in RFC_DBELL:RFCPEIFG can trigger a RFC_CPE_0 event"]
645 #[inline]
646 pub fn rfc_cpe_0(self) -> &'a mut W {
647 self.variant(EVW::RFC_CPE_0)
648 }
649 #[doc = "Combined RFC hardware interrupt, corresponding flag is here RFC_DBELL:RFHWIFG"]
650 #[inline]
651 pub fn rfc_hw_comb(self) -> &'a mut W {
652 self.variant(EVW::RFC_HW_COMB)
653 }
654 #[doc = "RFC Doorbell Command Acknowledgement Interrupt, equvialent to RFC_DBELL:RFACKIFG.ACKFLAG"]
655 #[inline]
656 pub fn rfc_cmd_ack(self) -> &'a mut W {
657 self.variant(EVW::RFC_CMD_ACK)
658 }
659 #[doc = "FLASH controller error event, the status flags are FLASH:FEDACSTAT.FSM_DONE and FLASH:FEDACSTAT.RVF_INT"]
660 #[inline]
661 pub fn flash(self) -> &'a mut W {
662 self.variant(EVW::FLASH)
663 }
664 #[doc = "AUX combined event, the corresponding flag register is here AUX_EVCTL:EVTOMCUFLAGS"]
665 #[inline]
666 pub fn aux_comb(self) -> &'a mut W {
667 self.variant(EVW::AUX_COMB)
668 }
669 #[doc = "Event from AON_RTC, controlled by the AON_RTC:CTL.COMB_EV_MASK setting"]
670 #[inline]
671 pub fn aon_rtc_comb(self) -> &'a mut W {
672 self.variant(EVW::AON_RTC_COMB)
673 }
674 #[doc = "Edge detect event from IOC. Configureded by the IOC:IOCFGn.EDGE_IRQ_EN and IOC:IOCFGn.EDGE_DET settings"]
675 #[inline]
676 pub fn aon_gpio_edge(self) -> &'a mut W {
677 self.variant(EVW::AON_GPIO_EDGE)
678 }
679 #[doc = "Always inactive"]
680 #[inline]
681 pub fn none(self) -> &'a mut W {
682 self.variant(EVW::NONE)
683 }
684 #[doc = r" Writes raw bits to the field"]
685 #[inline]
686 pub unsafe fn bits(self, value: u8) -> &'a mut W {
687 const MASK: u8 = 127;
688 const OFFSET: u8 = 0;
689 self.w.bits &= !((MASK as u32) << OFFSET);
690 self.w.bits |= ((value & MASK) as u32) << OFFSET;
691 self.w
692 }
693}
694impl R {
695 #[doc = r" Value of the register as raw bits"]
696 #[inline]
697 pub fn bits(&self) -> u32 {
698 self.bits
699 }
700 #[doc = "Bits 0:6 - Read/write selection value Writing any other value than values defined by a ENUM may result in undefined behavior."]
701 #[inline]
702 pub fn ev(&self) -> EVR {
703 EVR::_from({
704 const MASK: u8 = 127;
705 const OFFSET: u8 = 0;
706 ((self.bits >> OFFSET) & MASK as u32) as u8
707 })
708 }
709}
710impl W {
711 #[doc = r" Reset value of the register"]
712 #[inline]
713 pub fn reset_value() -> W {
714 W { bits: 0 }
715 }
716 #[doc = r" Writes raw bits to the register"]
717 #[inline]
718 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
719 self.bits = bits;
720 self
721 }
722 #[doc = "Bits 0:6 - Read/write selection value Writing any other value than values defined by a ENUM may result in undefined behavior."]
723 #[inline]
724 pub fn ev(&mut self) -> _EVW {
725 _EVW { w: self }
726 }
727}