#[doc = "Register `IMR` reader"]
pub struct R(crate::R<IMR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<IMR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<IMR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<IMR_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `IMR` writer"]
pub struct W(crate::W<IMR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<IMR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<IMR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<IMR_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `TBMIM` reader - GPTM Timer B match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct TBMIM_R(crate::FieldReader<bool, bool>);
impl TBMIM_R {
pub(crate) fn new(bits: bool) -> Self {
TBMIM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TBMIM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TBMIM` writer - GPTM Timer B match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct TBMIM_W<'a> {
w: &'a mut W,
}
impl<'a> TBMIM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11);
self.w
}
}
#[doc = "Field `CBEIM` reader - GPTM Timer B capture event interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct CBEIM_R(crate::FieldReader<bool, bool>);
impl CBEIM_R {
pub(crate) fn new(bits: bool) -> Self {
CBEIM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for CBEIM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `CBEIM` writer - GPTM Timer B capture event interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct CBEIM_W<'a> {
w: &'a mut W,
}
impl<'a> CBEIM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10);
self.w
}
}
#[doc = "Field `CBMIM` reader - GPTM Timer B capture match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct CBMIM_R(crate::FieldReader<bool, bool>);
impl CBMIM_R {
pub(crate) fn new(bits: bool) -> Self {
CBMIM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for CBMIM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `CBMIM` writer - GPTM Timer B capture match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct CBMIM_W<'a> {
w: &'a mut W,
}
impl<'a> CBMIM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9);
self.w
}
}
#[doc = "Field `TBTOIM` reader - GPTM Timer B time-out interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct TBTOIM_R(crate::FieldReader<bool, bool>);
impl TBTOIM_R {
pub(crate) fn new(bits: bool) -> Self {
TBTOIM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TBTOIM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TBTOIM` writer - GPTM Timer B time-out interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct TBTOIM_W<'a> {
w: &'a mut W,
}
impl<'a> TBTOIM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8);
self.w
}
}
#[doc = "Field `TAMIM` reader - GPTM Timer A match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct TAMIM_R(crate::FieldReader<bool, bool>);
impl TAMIM_R {
pub(crate) fn new(bits: bool) -> Self {
TAMIM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TAMIM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TAMIM` writer - GPTM Timer A match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct TAMIM_W<'a> {
w: &'a mut W,
}
impl<'a> TAMIM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4);
self.w
}
}
#[doc = "Field `CAEIM` reader - GPTM Timer A capture event interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct CAEIM_R(crate::FieldReader<bool, bool>);
impl CAEIM_R {
pub(crate) fn new(bits: bool) -> Self {
CAEIM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for CAEIM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `CAEIM` writer - GPTM Timer A capture event interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct CAEIM_W<'a> {
w: &'a mut W,
}
impl<'a> CAEIM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2);
self.w
}
}
#[doc = "Field `CAMIM` reader - GPTM Timer A capture match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct CAMIM_R(crate::FieldReader<bool, bool>);
impl CAMIM_R {
pub(crate) fn new(bits: bool) -> Self {
CAMIM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for CAMIM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `CAMIM` writer - GPTM Timer A capture match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct CAMIM_W<'a> {
w: &'a mut W,
}
impl<'a> CAMIM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1);
self.w
}
}
#[doc = "Field `TATOIM` reader - GPTM Timer A time-out interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct TATOIM_R(crate::FieldReader<bool, bool>);
impl TATOIM_R {
pub(crate) fn new(bits: bool) -> Self {
TATOIM_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for TATOIM_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `TATOIM` writer - GPTM Timer A time-out interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
pub struct TATOIM_W<'a> {
w: &'a mut W,
}
impl<'a> TATOIM_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01);
self.w
}
}
impl R {
#[doc = "Bit 11 - GPTM Timer B match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn tbmim(&self) -> TBMIM_R {
TBMIM_R::new(((self.bits >> 11) & 0x01) != 0)
}
#[doc = "Bit 10 - GPTM Timer B capture event interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn cbeim(&self) -> CBEIM_R {
CBEIM_R::new(((self.bits >> 10) & 0x01) != 0)
}
#[doc = "Bit 9 - GPTM Timer B capture match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn cbmim(&self) -> CBMIM_R {
CBMIM_R::new(((self.bits >> 9) & 0x01) != 0)
}
#[doc = "Bit 8 - GPTM Timer B time-out interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn tbtoim(&self) -> TBTOIM_R {
TBTOIM_R::new(((self.bits >> 8) & 0x01) != 0)
}
#[doc = "Bit 4 - GPTM Timer A match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn tamim(&self) -> TAMIM_R {
TAMIM_R::new(((self.bits >> 4) & 0x01) != 0)
}
#[doc = "Bit 2 - GPTM Timer A capture event interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn caeim(&self) -> CAEIM_R {
CAEIM_R::new(((self.bits >> 2) & 0x01) != 0)
}
#[doc = "Bit 1 - GPTM Timer A capture match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn camim(&self) -> CAMIM_R {
CAMIM_R::new(((self.bits >> 1) & 0x01) != 0)
}
#[doc = "Bit 0 - GPTM Timer A time-out interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn tatoim(&self) -> TATOIM_R {
TATOIM_R::new((self.bits & 0x01) != 0)
}
}
impl W {
#[doc = "Bit 11 - GPTM Timer B match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn tbmim(&mut self) -> TBMIM_W {
TBMIM_W { w: self }
}
#[doc = "Bit 10 - GPTM Timer B capture event interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn cbeim(&mut self) -> CBEIM_W {
CBEIM_W { w: self }
}
#[doc = "Bit 9 - GPTM Timer B capture match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn cbmim(&mut self) -> CBMIM_W {
CBMIM_W { w: self }
}
#[doc = "Bit 8 - GPTM Timer B time-out interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn tbtoim(&mut self) -> TBTOIM_W {
TBTOIM_W { w: self }
}
#[doc = "Bit 4 - GPTM Timer A match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn tamim(&mut self) -> TAMIM_W {
TAMIM_W { w: self }
}
#[doc = "Bit 2 - GPTM Timer A capture event interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn caeim(&mut self) -> CAEIM_W {
CAEIM_W { w: self }
}
#[doc = "Bit 1 - GPTM Timer A capture match interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn camim(&mut self) -> CAMIM_W {
CAMIM_W { w: self }
}
#[doc = "Bit 0 - GPTM Timer A time-out interrupt mask 0: Interrupt is disabled. 1: Interrupt is enabled."]
#[inline(always)]
pub fn tatoim(&mut self) -> TATOIM_W {
TATOIM_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "GPTM interrupt mask This register allows software to enable and disable GPTM controller-level interrupts. Setting a bit enables the corresponding interrupt, while clearing a bit disables it.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr](index.html) module"]
pub struct IMR_SPEC;
impl crate::RegisterSpec for IMR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [imr::R](R) reader structure"]
impl crate::Readable for IMR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [imr::W](W) writer structure"]
impl crate::Writable for IMR_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets IMR to value 0"]
impl crate::Resettable for IMR_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}