cc13x2_26x2_pac/aon_rtc/
ch2cmp.rs

1#[doc = "Register `CH2CMP` reader"]
2pub type R = crate::R<Ch2cmpSpec>;
3#[doc = "Register `CH2CMP` writer"]
4pub type W = crate::W<Ch2cmpSpec>;
5#[doc = "Field `VALUE` reader - 31:0\\]
6RTC Channel 2 compare value. Bit 31 to 16 represents seconds and bits 15 to 0 represents subseconds of the compare value. The compare value is compared against SEC.VALUE (15:0) and SUBSEC.VALUE (31:16) values of the Real Time Clock register. A Cannel 0 event is generated when {SEC.VALUE(15:0),SUBSEC.VALUE (31:16)} is reaching or exciting the compare value. Writing to this register can trigger an immediate*) event in case the new compare value matches a Real Time Clock value from 1 second in the past up till current Real Time Clock value. Example: To generate a compare 5.5 seconds RTC start,- set this value = 0x0005_8000 *) It can take up to one SCLK_LF clock cycles before event occurs due to synchronization."]
7pub type ValueR = crate::FieldReader<u32>;
8#[doc = "Field `VALUE` writer - 31:0\\]
9RTC Channel 2 compare value. Bit 31 to 16 represents seconds and bits 15 to 0 represents subseconds of the compare value. The compare value is compared against SEC.VALUE (15:0) and SUBSEC.VALUE (31:16) values of the Real Time Clock register. A Cannel 0 event is generated when {SEC.VALUE(15:0),SUBSEC.VALUE (31:16)} is reaching or exciting the compare value. Writing to this register can trigger an immediate*) event in case the new compare value matches a Real Time Clock value from 1 second in the past up till current Real Time Clock value. Example: To generate a compare 5.5 seconds RTC start,- set this value = 0x0005_8000 *) It can take up to one SCLK_LF clock cycles before event occurs due to synchronization."]
10pub type ValueW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
11impl R {
12    #[doc = "Bits 0:31 - 31:0\\]
13RTC Channel 2 compare value. Bit 31 to 16 represents seconds and bits 15 to 0 represents subseconds of the compare value. The compare value is compared against SEC.VALUE (15:0) and SUBSEC.VALUE (31:16) values of the Real Time Clock register. A Cannel 0 event is generated when {SEC.VALUE(15:0),SUBSEC.VALUE (31:16)} is reaching or exciting the compare value. Writing to this register can trigger an immediate*) event in case the new compare value matches a Real Time Clock value from 1 second in the past up till current Real Time Clock value. Example: To generate a compare 5.5 seconds RTC start,- set this value = 0x0005_8000 *) It can take up to one SCLK_LF clock cycles before event occurs due to synchronization."]
14    #[inline(always)]
15    pub fn value(&self) -> ValueR {
16        ValueR::new(self.bits)
17    }
18}
19impl W {
20    #[doc = "Bits 0:31 - 31:0\\]
21RTC Channel 2 compare value. Bit 31 to 16 represents seconds and bits 15 to 0 represents subseconds of the compare value. The compare value is compared against SEC.VALUE (15:0) and SUBSEC.VALUE (31:16) values of the Real Time Clock register. A Cannel 0 event is generated when {SEC.VALUE(15:0),SUBSEC.VALUE (31:16)} is reaching or exciting the compare value. Writing to this register can trigger an immediate*) event in case the new compare value matches a Real Time Clock value from 1 second in the past up till current Real Time Clock value. Example: To generate a compare 5.5 seconds RTC start,- set this value = 0x0005_8000 *) It can take up to one SCLK_LF clock cycles before event occurs due to synchronization."]
22    #[inline(always)]
23    #[must_use]
24    pub fn value(&mut self) -> ValueW<Ch2cmpSpec> {
25        ValueW::new(self, 0)
26    }
27}
28#[doc = "Channel 2 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ch2cmp::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ch2cmp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
29pub struct Ch2cmpSpec;
30impl crate::RegisterSpec for Ch2cmpSpec {
31    type Ux = u32;
32}
33#[doc = "`read()` method returns [`ch2cmp::R`](R) reader structure"]
34impl crate::Readable for Ch2cmpSpec {}
35#[doc = "`write(|w| ..)` method takes [`ch2cmp::W`](W) writer structure"]
36impl crate::Writable for Ch2cmpSpec {
37    type Safety = crate::Unsafe;
38    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
39    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
40}
41#[doc = "`reset()` method sets CH2CMP to value 0"]
42impl crate::Resettable for Ch2cmpSpec {
43    const RESET_VALUE: u32 = 0;
44}
cc13x2_26x2_pac/aon_rtc/ch2cmp.rs

cc13x2_26x2_pac/aon_rtc/
ch2cmp.rs
