cc13x2_cc26x2_pac/cpu_scs/
icsr.rs1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::ICSR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct NMIPENDSETR {
47 bits: bool,
48}
49impl NMIPENDSETR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Value of the field"]
67pub struct RESERVED29R {
68 bits: u8,
69}
70impl RESERVED29R {
71 #[doc = r" Value of the field as raw bits"]
72 #[inline]
73 pub fn bits(&self) -> u8 {
74 self.bits
75 }
76}
77#[doc = r" Value of the field"]
78pub struct PENDSVSETR {
79 bits: bool,
80}
81impl PENDSVSETR {
82 #[doc = r" Value of the field as raw bits"]
83 #[inline]
84 pub fn bit(&self) -> bool {
85 self.bits
86 }
87 #[doc = r" Returns `true` if the bit is clear (0)"]
88 #[inline]
89 pub fn bit_is_clear(&self) -> bool {
90 !self.bit()
91 }
92 #[doc = r" Returns `true` if the bit is set (1)"]
93 #[inline]
94 pub fn bit_is_set(&self) -> bool {
95 self.bit()
96 }
97}
98#[doc = r" Value of the field"]
99pub struct PENDSVCLRR {
100 bits: bool,
101}
102impl PENDSVCLRR {
103 #[doc = r" Value of the field as raw bits"]
104 #[inline]
105 pub fn bit(&self) -> bool {
106 self.bits
107 }
108 #[doc = r" Returns `true` if the bit is clear (0)"]
109 #[inline]
110 pub fn bit_is_clear(&self) -> bool {
111 !self.bit()
112 }
113 #[doc = r" Returns `true` if the bit is set (1)"]
114 #[inline]
115 pub fn bit_is_set(&self) -> bool {
116 self.bit()
117 }
118}
119#[doc = r" Value of the field"]
120pub struct PENDSTSETR {
121 bits: bool,
122}
123impl PENDSTSETR {
124 #[doc = r" Value of the field as raw bits"]
125 #[inline]
126 pub fn bit(&self) -> bool {
127 self.bits
128 }
129 #[doc = r" Returns `true` if the bit is clear (0)"]
130 #[inline]
131 pub fn bit_is_clear(&self) -> bool {
132 !self.bit()
133 }
134 #[doc = r" Returns `true` if the bit is set (1)"]
135 #[inline]
136 pub fn bit_is_set(&self) -> bool {
137 self.bit()
138 }
139}
140#[doc = r" Value of the field"]
141pub struct PENDSTCLRR {
142 bits: bool,
143}
144impl PENDSTCLRR {
145 #[doc = r" Value of the field as raw bits"]
146 #[inline]
147 pub fn bit(&self) -> bool {
148 self.bits
149 }
150 #[doc = r" Returns `true` if the bit is clear (0)"]
151 #[inline]
152 pub fn bit_is_clear(&self) -> bool {
153 !self.bit()
154 }
155 #[doc = r" Returns `true` if the bit is set (1)"]
156 #[inline]
157 pub fn bit_is_set(&self) -> bool {
158 self.bit()
159 }
160}
161#[doc = r" Value of the field"]
162pub struct RESERVED24R {
163 bits: bool,
164}
165impl RESERVED24R {
166 #[doc = r" Value of the field as raw bits"]
167 #[inline]
168 pub fn bit(&self) -> bool {
169 self.bits
170 }
171 #[doc = r" Returns `true` if the bit is clear (0)"]
172 #[inline]
173 pub fn bit_is_clear(&self) -> bool {
174 !self.bit()
175 }
176 #[doc = r" Returns `true` if the bit is set (1)"]
177 #[inline]
178 pub fn bit_is_set(&self) -> bool {
179 self.bit()
180 }
181}
182#[doc = r" Value of the field"]
183pub struct ISRPREEMPTR {
184 bits: bool,
185}
186impl ISRPREEMPTR {
187 #[doc = r" Value of the field as raw bits"]
188 #[inline]
189 pub fn bit(&self) -> bool {
190 self.bits
191 }
192 #[doc = r" Returns `true` if the bit is clear (0)"]
193 #[inline]
194 pub fn bit_is_clear(&self) -> bool {
195 !self.bit()
196 }
197 #[doc = r" Returns `true` if the bit is set (1)"]
198 #[inline]
199 pub fn bit_is_set(&self) -> bool {
200 self.bit()
201 }
202}
203#[doc = r" Value of the field"]
204pub struct ISRPENDINGR {
205 bits: bool,
206}
207impl ISRPENDINGR {
208 #[doc = r" Value of the field as raw bits"]
209 #[inline]
210 pub fn bit(&self) -> bool {
211 self.bits
212 }
213 #[doc = r" Returns `true` if the bit is clear (0)"]
214 #[inline]
215 pub fn bit_is_clear(&self) -> bool {
216 !self.bit()
217 }
218 #[doc = r" Returns `true` if the bit is set (1)"]
219 #[inline]
220 pub fn bit_is_set(&self) -> bool {
221 self.bit()
222 }
223}
224#[doc = r" Value of the field"]
225pub struct RESERVED18R {
226 bits: u8,
227}
228impl RESERVED18R {
229 #[doc = r" Value of the field as raw bits"]
230 #[inline]
231 pub fn bits(&self) -> u8 {
232 self.bits
233 }
234}
235#[doc = r" Value of the field"]
236pub struct VECTPENDINGR {
237 bits: u8,
238}
239impl VECTPENDINGR {
240 #[doc = r" Value of the field as raw bits"]
241 #[inline]
242 pub fn bits(&self) -> u8 {
243 self.bits
244 }
245}
246#[doc = r" Value of the field"]
247pub struct RETTOBASER {
248 bits: bool,
249}
250impl RETTOBASER {
251 #[doc = r" Value of the field as raw bits"]
252 #[inline]
253 pub fn bit(&self) -> bool {
254 self.bits
255 }
256 #[doc = r" Returns `true` if the bit is clear (0)"]
257 #[inline]
258 pub fn bit_is_clear(&self) -> bool {
259 !self.bit()
260 }
261 #[doc = r" Returns `true` if the bit is set (1)"]
262 #[inline]
263 pub fn bit_is_set(&self) -> bool {
264 self.bit()
265 }
266}
267#[doc = r" Value of the field"]
268pub struct RESERVED9R {
269 bits: u8,
270}
271impl RESERVED9R {
272 #[doc = r" Value of the field as raw bits"]
273 #[inline]
274 pub fn bits(&self) -> u8 {
275 self.bits
276 }
277}
278#[doc = r" Value of the field"]
279pub struct VECTACTIVER {
280 bits: u16,
281}
282impl VECTACTIVER {
283 #[doc = r" Value of the field as raw bits"]
284 #[inline]
285 pub fn bits(&self) -> u16 {
286 self.bits
287 }
288}
289#[doc = r" Proxy"]
290pub struct _NMIPENDSETW<'a> {
291 w: &'a mut W,
292}
293impl<'a> _NMIPENDSETW<'a> {
294 #[doc = r" Sets the field bit"]
295 pub fn set_bit(self) -> &'a mut W {
296 self.bit(true)
297 }
298 #[doc = r" Clears the field bit"]
299 pub fn clear_bit(self) -> &'a mut W {
300 self.bit(false)
301 }
302 #[doc = r" Writes raw bits to the field"]
303 #[inline]
304 pub fn bit(self, value: bool) -> &'a mut W {
305 const MASK: bool = true;
306 const OFFSET: u8 = 31;
307 self.w.bits &= !((MASK as u32) << OFFSET);
308 self.w.bits |= ((value & MASK) as u32) << OFFSET;
309 self.w
310 }
311}
312#[doc = r" Proxy"]
313pub struct _RESERVED29W<'a> {
314 w: &'a mut W,
315}
316impl<'a> _RESERVED29W<'a> {
317 #[doc = r" Writes raw bits to the field"]
318 #[inline]
319 pub unsafe fn bits(self, value: u8) -> &'a mut W {
320 const MASK: u8 = 3;
321 const OFFSET: u8 = 29;
322 self.w.bits &= !((MASK as u32) << OFFSET);
323 self.w.bits |= ((value & MASK) as u32) << OFFSET;
324 self.w
325 }
326}
327#[doc = r" Proxy"]
328pub struct _PENDSVSETW<'a> {
329 w: &'a mut W,
330}
331impl<'a> _PENDSVSETW<'a> {
332 #[doc = r" Sets the field bit"]
333 pub fn set_bit(self) -> &'a mut W {
334 self.bit(true)
335 }
336 #[doc = r" Clears the field bit"]
337 pub fn clear_bit(self) -> &'a mut W {
338 self.bit(false)
339 }
340 #[doc = r" Writes raw bits to the field"]
341 #[inline]
342 pub fn bit(self, value: bool) -> &'a mut W {
343 const MASK: bool = true;
344 const OFFSET: u8 = 28;
345 self.w.bits &= !((MASK as u32) << OFFSET);
346 self.w.bits |= ((value & MASK) as u32) << OFFSET;
347 self.w
348 }
349}
350#[doc = r" Proxy"]
351pub struct _PENDSVCLRW<'a> {
352 w: &'a mut W,
353}
354impl<'a> _PENDSVCLRW<'a> {
355 #[doc = r" Sets the field bit"]
356 pub fn set_bit(self) -> &'a mut W {
357 self.bit(true)
358 }
359 #[doc = r" Clears the field bit"]
360 pub fn clear_bit(self) -> &'a mut W {
361 self.bit(false)
362 }
363 #[doc = r" Writes raw bits to the field"]
364 #[inline]
365 pub fn bit(self, value: bool) -> &'a mut W {
366 const MASK: bool = true;
367 const OFFSET: u8 = 27;
368 self.w.bits &= !((MASK as u32) << OFFSET);
369 self.w.bits |= ((value & MASK) as u32) << OFFSET;
370 self.w
371 }
372}
373#[doc = r" Proxy"]
374pub struct _PENDSTSETW<'a> {
375 w: &'a mut W,
376}
377impl<'a> _PENDSTSETW<'a> {
378 #[doc = r" Sets the field bit"]
379 pub fn set_bit(self) -> &'a mut W {
380 self.bit(true)
381 }
382 #[doc = r" Clears the field bit"]
383 pub fn clear_bit(self) -> &'a mut W {
384 self.bit(false)
385 }
386 #[doc = r" Writes raw bits to the field"]
387 #[inline]
388 pub fn bit(self, value: bool) -> &'a mut W {
389 const MASK: bool = true;
390 const OFFSET: u8 = 26;
391 self.w.bits &= !((MASK as u32) << OFFSET);
392 self.w.bits |= ((value & MASK) as u32) << OFFSET;
393 self.w
394 }
395}
396#[doc = r" Proxy"]
397pub struct _PENDSTCLRW<'a> {
398 w: &'a mut W,
399}
400impl<'a> _PENDSTCLRW<'a> {
401 #[doc = r" Sets the field bit"]
402 pub fn set_bit(self) -> &'a mut W {
403 self.bit(true)
404 }
405 #[doc = r" Clears the field bit"]
406 pub fn clear_bit(self) -> &'a mut W {
407 self.bit(false)
408 }
409 #[doc = r" Writes raw bits to the field"]
410 #[inline]
411 pub fn bit(self, value: bool) -> &'a mut W {
412 const MASK: bool = true;
413 const OFFSET: u8 = 25;
414 self.w.bits &= !((MASK as u32) << OFFSET);
415 self.w.bits |= ((value & MASK) as u32) << OFFSET;
416 self.w
417 }
418}
419#[doc = r" Proxy"]
420pub struct _RESERVED24W<'a> {
421 w: &'a mut W,
422}
423impl<'a> _RESERVED24W<'a> {
424 #[doc = r" Sets the field bit"]
425 pub fn set_bit(self) -> &'a mut W {
426 self.bit(true)
427 }
428 #[doc = r" Clears the field bit"]
429 pub fn clear_bit(self) -> &'a mut W {
430 self.bit(false)
431 }
432 #[doc = r" Writes raw bits to the field"]
433 #[inline]
434 pub fn bit(self, value: bool) -> &'a mut W {
435 const MASK: bool = true;
436 const OFFSET: u8 = 24;
437 self.w.bits &= !((MASK as u32) << OFFSET);
438 self.w.bits |= ((value & MASK) as u32) << OFFSET;
439 self.w
440 }
441}
442#[doc = r" Proxy"]
443pub struct _ISRPREEMPTW<'a> {
444 w: &'a mut W,
445}
446impl<'a> _ISRPREEMPTW<'a> {
447 #[doc = r" Sets the field bit"]
448 pub fn set_bit(self) -> &'a mut W {
449 self.bit(true)
450 }
451 #[doc = r" Clears the field bit"]
452 pub fn clear_bit(self) -> &'a mut W {
453 self.bit(false)
454 }
455 #[doc = r" Writes raw bits to the field"]
456 #[inline]
457 pub fn bit(self, value: bool) -> &'a mut W {
458 const MASK: bool = true;
459 const OFFSET: u8 = 23;
460 self.w.bits &= !((MASK as u32) << OFFSET);
461 self.w.bits |= ((value & MASK) as u32) << OFFSET;
462 self.w
463 }
464}
465#[doc = r" Proxy"]
466pub struct _ISRPENDINGW<'a> {
467 w: &'a mut W,
468}
469impl<'a> _ISRPENDINGW<'a> {
470 #[doc = r" Sets the field bit"]
471 pub fn set_bit(self) -> &'a mut W {
472 self.bit(true)
473 }
474 #[doc = r" Clears the field bit"]
475 pub fn clear_bit(self) -> &'a mut W {
476 self.bit(false)
477 }
478 #[doc = r" Writes raw bits to the field"]
479 #[inline]
480 pub fn bit(self, value: bool) -> &'a mut W {
481 const MASK: bool = true;
482 const OFFSET: u8 = 22;
483 self.w.bits &= !((MASK as u32) << OFFSET);
484 self.w.bits |= ((value & MASK) as u32) << OFFSET;
485 self.w
486 }
487}
488#[doc = r" Proxy"]
489pub struct _RESERVED18W<'a> {
490 w: &'a mut W,
491}
492impl<'a> _RESERVED18W<'a> {
493 #[doc = r" Writes raw bits to the field"]
494 #[inline]
495 pub unsafe fn bits(self, value: u8) -> &'a mut W {
496 const MASK: u8 = 15;
497 const OFFSET: u8 = 18;
498 self.w.bits &= !((MASK as u32) << OFFSET);
499 self.w.bits |= ((value & MASK) as u32) << OFFSET;
500 self.w
501 }
502}
503#[doc = r" Proxy"]
504pub struct _VECTPENDINGW<'a> {
505 w: &'a mut W,
506}
507impl<'a> _VECTPENDINGW<'a> {
508 #[doc = r" Writes raw bits to the field"]
509 #[inline]
510 pub unsafe fn bits(self, value: u8) -> &'a mut W {
511 const MASK: u8 = 63;
512 const OFFSET: u8 = 12;
513 self.w.bits &= !((MASK as u32) << OFFSET);
514 self.w.bits |= ((value & MASK) as u32) << OFFSET;
515 self.w
516 }
517}
518#[doc = r" Proxy"]
519pub struct _RETTOBASEW<'a> {
520 w: &'a mut W,
521}
522impl<'a> _RETTOBASEW<'a> {
523 #[doc = r" Sets the field bit"]
524 pub fn set_bit(self) -> &'a mut W {
525 self.bit(true)
526 }
527 #[doc = r" Clears the field bit"]
528 pub fn clear_bit(self) -> &'a mut W {
529 self.bit(false)
530 }
531 #[doc = r" Writes raw bits to the field"]
532 #[inline]
533 pub fn bit(self, value: bool) -> &'a mut W {
534 const MASK: bool = true;
535 const OFFSET: u8 = 11;
536 self.w.bits &= !((MASK as u32) << OFFSET);
537 self.w.bits |= ((value & MASK) as u32) << OFFSET;
538 self.w
539 }
540}
541#[doc = r" Proxy"]
542pub struct _RESERVED9W<'a> {
543 w: &'a mut W,
544}
545impl<'a> _RESERVED9W<'a> {
546 #[doc = r" Writes raw bits to the field"]
547 #[inline]
548 pub unsafe fn bits(self, value: u8) -> &'a mut W {
549 const MASK: u8 = 3;
550 const OFFSET: u8 = 9;
551 self.w.bits &= !((MASK as u32) << OFFSET);
552 self.w.bits |= ((value & MASK) as u32) << OFFSET;
553 self.w
554 }
555}
556#[doc = r" Proxy"]
557pub struct _VECTACTIVEW<'a> {
558 w: &'a mut W,
559}
560impl<'a> _VECTACTIVEW<'a> {
561 #[doc = r" Writes raw bits to the field"]
562 #[inline]
563 pub unsafe fn bits(self, value: u16) -> &'a mut W {
564 const MASK: u16 = 511;
565 const OFFSET: u8 = 0;
566 self.w.bits &= !((MASK as u32) << OFFSET);
567 self.w.bits |= ((value & MASK) as u32) << OFFSET;
568 self.w
569 }
570}
571impl R {
572 #[doc = r" Value of the register as raw bits"]
573 #[inline]
574 pub fn bits(&self) -> u32 {
575 self.bits
576 }
577 #[doc = "Bit 31 - 31:31\\] Set pending NMI bit. Setting this bit pends and activates an NMI. Because NMI is the highest-priority interrupt, it takes effect as soon as it registers. 0: No action 1: Set pending NMI"]
578 #[inline]
579 pub fn nmipendset(&self) -> NMIPENDSETR {
580 let bits = {
581 const MASK: bool = true;
582 const OFFSET: u8 = 31;
583 ((self.bits >> OFFSET) & MASK as u32) != 0
584 };
585 NMIPENDSETR { bits }
586 }
587 #[doc = "Bits 29:30 - 30:29\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
588 #[inline]
589 pub fn reserved29(&self) -> RESERVED29R {
590 let bits = {
591 const MASK: u8 = 3;
592 const OFFSET: u8 = 29;
593 ((self.bits >> OFFSET) & MASK as u32) as u8
594 };
595 RESERVED29R { bits }
596 }
597 #[doc = "Bit 28 - 28:28\\] Set pending pendSV bit. 0: No action 1: Set pending PendSV"]
598 #[inline]
599 pub fn pendsvset(&self) -> PENDSVSETR {
600 let bits = {
601 const MASK: bool = true;
602 const OFFSET: u8 = 28;
603 ((self.bits >> OFFSET) & MASK as u32) != 0
604 };
605 PENDSVSETR { bits }
606 }
607 #[doc = "Bit 27 - 27:27\\] Clear pending pendSV bit 0: No action 1: Clear pending pendSV"]
608 #[inline]
609 pub fn pendsvclr(&self) -> PENDSVCLRR {
610 let bits = {
611 const MASK: bool = true;
612 const OFFSET: u8 = 27;
613 ((self.bits >> OFFSET) & MASK as u32) != 0
614 };
615 PENDSVCLRR { bits }
616 }
617 #[doc = "Bit 26 - 26:26\\] Set a pending SysTick bit. 0: No action 1: Set pending SysTick"]
618 #[inline]
619 pub fn pendstset(&self) -> PENDSTSETR {
620 let bits = {
621 const MASK: bool = true;
622 const OFFSET: u8 = 26;
623 ((self.bits >> OFFSET) & MASK as u32) != 0
624 };
625 PENDSTSETR { bits }
626 }
627 #[doc = "Bit 25 - 25:25\\] Clear pending SysTick bit 0: No action 1: Clear pending SysTick"]
628 #[inline]
629 pub fn pendstclr(&self) -> PENDSTCLRR {
630 let bits = {
631 const MASK: bool = true;
632 const OFFSET: u8 = 25;
633 ((self.bits >> OFFSET) & MASK as u32) != 0
634 };
635 PENDSTCLRR { bits }
636 }
637 #[doc = "Bit 24 - 24:24\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
638 #[inline]
639 pub fn reserved24(&self) -> RESERVED24R {
640 let bits = {
641 const MASK: bool = true;
642 const OFFSET: u8 = 24;
643 ((self.bits >> OFFSET) & MASK as u32) != 0
644 };
645 RESERVED24R { bits }
646 }
647 #[doc = "Bit 23 - 23:23\\] This field can only be used at debug time. It indicates that a pending interrupt is to be taken in the next running cycle. If DHCSR.C_MASKINTS= 0, the interrupt is serviced. 0: A pending exception is not serviced. 1: A pending exception is serviced on exit from the debug halt state"]
648 #[inline]
649 pub fn isrpreempt(&self) -> ISRPREEMPTR {
650 let bits = {
651 const MASK: bool = true;
652 const OFFSET: u8 = 23;
653 ((self.bits >> OFFSET) & MASK as u32) != 0
654 };
655 ISRPREEMPTR { bits }
656 }
657 #[doc = "Bit 22 - 22:22\\] Interrupt pending flag. Excludes NMI and faults. 0x0: Interrupt not pending 0x1: Interrupt pending"]
658 #[inline]
659 pub fn isrpending(&self) -> ISRPENDINGR {
660 let bits = {
661 const MASK: bool = true;
662 const OFFSET: u8 = 22;
663 ((self.bits >> OFFSET) & MASK as u32) != 0
664 };
665 ISRPENDINGR { bits }
666 }
667 #[doc = "Bits 18:21 - 21:18\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
668 #[inline]
669 pub fn reserved18(&self) -> RESERVED18R {
670 let bits = {
671 const MASK: u8 = 15;
672 const OFFSET: u8 = 18;
673 ((self.bits >> OFFSET) & MASK as u32) as u8
674 };
675 RESERVED18R { bits }
676 }
677 #[doc = "Bits 12:17 - 17:12\\] Pending ISR number field. This field contains the interrupt number of the highest priority pending ISR."]
678 #[inline]
679 pub fn vectpending(&self) -> VECTPENDINGR {
680 let bits = {
681 const MASK: u8 = 63;
682 const OFFSET: u8 = 12;
683 ((self.bits >> OFFSET) & MASK as u32) as u8
684 };
685 VECTPENDINGR { bits }
686 }
687 #[doc = "Bit 11 - 11:11\\] Indicates whether there are preempted active exceptions: 0: There are preempted active exceptions to execute 1: There are no active exceptions, or the currently-executing exception is the only active exception."]
688 #[inline]
689 pub fn rettobase(&self) -> RETTOBASER {
690 let bits = {
691 const MASK: bool = true;
692 const OFFSET: u8 = 11;
693 ((self.bits >> OFFSET) & MASK as u32) != 0
694 };
695 RETTOBASER { bits }
696 }
697 #[doc = "Bits 9:10 - 10:9\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
698 #[inline]
699 pub fn reserved9(&self) -> RESERVED9R {
700 let bits = {
701 const MASK: u8 = 3;
702 const OFFSET: u8 = 9;
703 ((self.bits >> OFFSET) & MASK as u32) as u8
704 };
705 RESERVED9R { bits }
706 }
707 #[doc = "Bits 0:8 - 8:0\\] Active ISR number field. Reset clears this field."]
708 #[inline]
709 pub fn vectactive(&self) -> VECTACTIVER {
710 let bits = {
711 const MASK: u16 = 511;
712 const OFFSET: u8 = 0;
713 ((self.bits >> OFFSET) & MASK as u32) as u16
714 };
715 VECTACTIVER { bits }
716 }
717}
718impl W {
719 #[doc = r" Reset value of the register"]
720 #[inline]
721 pub fn reset_value() -> W {
722 W { bits: 0 }
723 }
724 #[doc = r" Writes raw bits to the register"]
725 #[inline]
726 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
727 self.bits = bits;
728 self
729 }
730 #[doc = "Bit 31 - 31:31\\] Set pending NMI bit. Setting this bit pends and activates an NMI. Because NMI is the highest-priority interrupt, it takes effect as soon as it registers. 0: No action 1: Set pending NMI"]
731 #[inline]
732 pub fn nmipendset(&mut self) -> _NMIPENDSETW {
733 _NMIPENDSETW { w: self }
734 }
735 #[doc = "Bits 29:30 - 30:29\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
736 #[inline]
737 pub fn reserved29(&mut self) -> _RESERVED29W {
738 _RESERVED29W { w: self }
739 }
740 #[doc = "Bit 28 - 28:28\\] Set pending pendSV bit. 0: No action 1: Set pending PendSV"]
741 #[inline]
742 pub fn pendsvset(&mut self) -> _PENDSVSETW {
743 _PENDSVSETW { w: self }
744 }
745 #[doc = "Bit 27 - 27:27\\] Clear pending pendSV bit 0: No action 1: Clear pending pendSV"]
746 #[inline]
747 pub fn pendsvclr(&mut self) -> _PENDSVCLRW {
748 _PENDSVCLRW { w: self }
749 }
750 #[doc = "Bit 26 - 26:26\\] Set a pending SysTick bit. 0: No action 1: Set pending SysTick"]
751 #[inline]
752 pub fn pendstset(&mut self) -> _PENDSTSETW {
753 _PENDSTSETW { w: self }
754 }
755 #[doc = "Bit 25 - 25:25\\] Clear pending SysTick bit 0: No action 1: Clear pending SysTick"]
756 #[inline]
757 pub fn pendstclr(&mut self) -> _PENDSTCLRW {
758 _PENDSTCLRW { w: self }
759 }
760 #[doc = "Bit 24 - 24:24\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
761 #[inline]
762 pub fn reserved24(&mut self) -> _RESERVED24W {
763 _RESERVED24W { w: self }
764 }
765 #[doc = "Bit 23 - 23:23\\] This field can only be used at debug time. It indicates that a pending interrupt is to be taken in the next running cycle. If DHCSR.C_MASKINTS= 0, the interrupt is serviced. 0: A pending exception is not serviced. 1: A pending exception is serviced on exit from the debug halt state"]
766 #[inline]
767 pub fn isrpreempt(&mut self) -> _ISRPREEMPTW {
768 _ISRPREEMPTW { w: self }
769 }
770 #[doc = "Bit 22 - 22:22\\] Interrupt pending flag. Excludes NMI and faults. 0x0: Interrupt not pending 0x1: Interrupt pending"]
771 #[inline]
772 pub fn isrpending(&mut self) -> _ISRPENDINGW {
773 _ISRPENDINGW { w: self }
774 }
775 #[doc = "Bits 18:21 - 21:18\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
776 #[inline]
777 pub fn reserved18(&mut self) -> _RESERVED18W {
778 _RESERVED18W { w: self }
779 }
780 #[doc = "Bits 12:17 - 17:12\\] Pending ISR number field. This field contains the interrupt number of the highest priority pending ISR."]
781 #[inline]
782 pub fn vectpending(&mut self) -> _VECTPENDINGW {
783 _VECTPENDINGW { w: self }
784 }
785 #[doc = "Bit 11 - 11:11\\] Indicates whether there are preempted active exceptions: 0: There are preempted active exceptions to execute 1: There are no active exceptions, or the currently-executing exception is the only active exception."]
786 #[inline]
787 pub fn rettobase(&mut self) -> _RETTOBASEW {
788 _RETTOBASEW { w: self }
789 }
790 #[doc = "Bits 9:10 - 10:9\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
791 #[inline]
792 pub fn reserved9(&mut self) -> _RESERVED9W {
793 _RESERVED9W { w: self }
794 }
795 #[doc = "Bits 0:8 - 8:0\\] Active ISR number field. Reset clears this field."]
796 #[inline]
797 pub fn vectactive(&mut self) -> _VECTACTIVEW {
798 _VECTACTIVEW { w: self }
799 }
800}