cc13x0_pac 0.10.3

Peripheral Access Crate for TI's cc13x0 microcontroller
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

#[doc = "Register `AIFDMACFG` reader"]
pub type R = crate::R<AifdmacfgSpec>;
#[doc = "Register `AIFDMACFG` writer"]
pub type W = crate::W<AifdmacfgSpec>;
#[doc = "Field `END_FRAME_IDX` reader - 7:0\\]
Defines the length of the DMA buffer. Writing a non-zero value to this register field enables and initializes AIF. Note that before doing so, all other configuration must have been done, and AIFINPTRNEXT/AIFOUTPTRNEXT must have been loaded."]
pub type EndFrameIdxR = crate::FieldReader;
#[doc = "Field `END_FRAME_IDX` writer - 7:0\\]
Defines the length of the DMA buffer. Writing a non-zero value to this register field enables and initializes AIF. Note that before doing so, all other configuration must have been done, and AIFINPTRNEXT/AIFOUTPTRNEXT must have been loaded."]
pub type EndFrameIdxW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
#[doc = "Field `RESERVED8` reader - 31:8\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
pub type Reserved8R = crate::FieldReader<u32>;
#[doc = "Field `RESERVED8` writer - 31:8\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
pub type Reserved8W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>;
impl R {
    #[doc = "Bits 0:7 - 7:0\\]
Defines the length of the DMA buffer. Writing a non-zero value to this register field enables and initializes AIF. Note that before doing so, all other configuration must have been done, and AIFINPTRNEXT/AIFOUTPTRNEXT must have been loaded."]
    #[inline(always)]
    pub fn end_frame_idx(&self) -> EndFrameIdxR {
        EndFrameIdxR::new((self.bits & 0xff) as u8)
    }
    #[doc = "Bits 8:31 - 31:8\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
    #[inline(always)]
    pub fn reserved8(&self) -> Reserved8R {
        Reserved8R::new((self.bits >> 8) & 0x00ff_ffff)
    }
}
impl W {
    #[doc = "Bits 0:7 - 7:0\\]
Defines the length of the DMA buffer. Writing a non-zero value to this register field enables and initializes AIF. Note that before doing so, all other configuration must have been done, and AIFINPTRNEXT/AIFOUTPTRNEXT must have been loaded."]
    #[inline(always)]
    #[must_use]
    pub fn end_frame_idx(&mut self) -> EndFrameIdxW<AifdmacfgSpec> {
        EndFrameIdxW::new(self, 0)
    }
    #[doc = "Bits 8:31 - 31:8\\]
Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
    #[inline(always)]
    #[must_use]
    pub fn reserved8(&mut self) -> Reserved8W<AifdmacfgSpec> {
        Reserved8W::new(self, 8)
    }
}
#[doc = "DMA Buffer Size Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aifdmacfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aifdmacfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct AifdmacfgSpec;
impl crate::RegisterSpec for AifdmacfgSpec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`aifdmacfg::R`](R) reader structure"]
impl crate::Readable for AifdmacfgSpec {}
#[doc = "`write(|w| ..)` method takes [`aifdmacfg::W`](W) writer structure"]
impl crate::Writable for AifdmacfgSpec {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets AIFDMACFG to value 0"]
impl crate::Resettable for AifdmacfgSpec {
    const RESET_VALUE: u32 = 0;
}