#[doc = "Register `TER` reader"]
pub type R = crate::R<TerSpec>;
#[doc = "Register `TER` writer"]
pub type W = crate::W<TerSpec>;
#[doc = "Field `STIMENA0` reader - 0:0\\]
Bit mask to enable tracing on ITM stimulus port 0."]
pub type Stimena0R = crate::BitReader;
#[doc = "Field `STIMENA0` writer - 0:0\\]
Bit mask to enable tracing on ITM stimulus port 0."]
pub type Stimena0W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA1` reader - 1:1\\]
Bit mask to enable tracing on ITM stimulus port 1."]
pub type Stimena1R = crate::BitReader;
#[doc = "Field `STIMENA1` writer - 1:1\\]
Bit mask to enable tracing on ITM stimulus port 1."]
pub type Stimena1W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA2` reader - 2:2\\]
Bit mask to enable tracing on ITM stimulus port 2."]
pub type Stimena2R = crate::BitReader;
#[doc = "Field `STIMENA2` writer - 2:2\\]
Bit mask to enable tracing on ITM stimulus port 2."]
pub type Stimena2W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA3` reader - 3:3\\]
Bit mask to enable tracing on ITM stimulus port 3."]
pub type Stimena3R = crate::BitReader;
#[doc = "Field `STIMENA3` writer - 3:3\\]
Bit mask to enable tracing on ITM stimulus port 3."]
pub type Stimena3W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA4` reader - 4:4\\]
Bit mask to enable tracing on ITM stimulus port 4."]
pub type Stimena4R = crate::BitReader;
#[doc = "Field `STIMENA4` writer - 4:4\\]
Bit mask to enable tracing on ITM stimulus port 4."]
pub type Stimena4W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA5` reader - 5:5\\]
Bit mask to enable tracing on ITM stimulus port 5."]
pub type Stimena5R = crate::BitReader;
#[doc = "Field `STIMENA5` writer - 5:5\\]
Bit mask to enable tracing on ITM stimulus port 5."]
pub type Stimena5W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA6` reader - 6:6\\]
Bit mask to enable tracing on ITM stimulus port 6."]
pub type Stimena6R = crate::BitReader;
#[doc = "Field `STIMENA6` writer - 6:6\\]
Bit mask to enable tracing on ITM stimulus port 6."]
pub type Stimena6W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA7` reader - 7:7\\]
Bit mask to enable tracing on ITM stimulus port 7."]
pub type Stimena7R = crate::BitReader;
#[doc = "Field `STIMENA7` writer - 7:7\\]
Bit mask to enable tracing on ITM stimulus port 7."]
pub type Stimena7W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA8` reader - 8:8\\]
Bit mask to enable tracing on ITM stimulus port 8."]
pub type Stimena8R = crate::BitReader;
#[doc = "Field `STIMENA8` writer - 8:8\\]
Bit mask to enable tracing on ITM stimulus port 8."]
pub type Stimena8W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA9` reader - 9:9\\]
Bit mask to enable tracing on ITM stimulus port 9."]
pub type Stimena9R = crate::BitReader;
#[doc = "Field `STIMENA9` writer - 9:9\\]
Bit mask to enable tracing on ITM stimulus port 9."]
pub type Stimena9W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA10` reader - 10:10\\]
Bit mask to enable tracing on ITM stimulus port 10."]
pub type Stimena10R = crate::BitReader;
#[doc = "Field `STIMENA10` writer - 10:10\\]
Bit mask to enable tracing on ITM stimulus port 10."]
pub type Stimena10W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA11` reader - 11:11\\]
Bit mask to enable tracing on ITM stimulus port 11."]
pub type Stimena11R = crate::BitReader;
#[doc = "Field `STIMENA11` writer - 11:11\\]
Bit mask to enable tracing on ITM stimulus port 11."]
pub type Stimena11W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA12` reader - 12:12\\]
Bit mask to enable tracing on ITM stimulus port 12."]
pub type Stimena12R = crate::BitReader;
#[doc = "Field `STIMENA12` writer - 12:12\\]
Bit mask to enable tracing on ITM stimulus port 12."]
pub type Stimena12W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA13` reader - 13:13\\]
Bit mask to enable tracing on ITM stimulus port 13."]
pub type Stimena13R = crate::BitReader;
#[doc = "Field `STIMENA13` writer - 13:13\\]
Bit mask to enable tracing on ITM stimulus port 13."]
pub type Stimena13W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA14` reader - 14:14\\]
Bit mask to enable tracing on ITM stimulus port 14."]
pub type Stimena14R = crate::BitReader;
#[doc = "Field `STIMENA14` writer - 14:14\\]
Bit mask to enable tracing on ITM stimulus port 14."]
pub type Stimena14W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA15` reader - 15:15\\]
Bit mask to enable tracing on ITM stimulus port 15."]
pub type Stimena15R = crate::BitReader;
#[doc = "Field `STIMENA15` writer - 15:15\\]
Bit mask to enable tracing on ITM stimulus port 15."]
pub type Stimena15W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA16` reader - 16:16\\]
Bit mask to enable tracing on ITM stimulus port 16."]
pub type Stimena16R = crate::BitReader;
#[doc = "Field `STIMENA16` writer - 16:16\\]
Bit mask to enable tracing on ITM stimulus port 16."]
pub type Stimena16W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA17` reader - 17:17\\]
Bit mask to enable tracing on ITM stimulus port 17."]
pub type Stimena17R = crate::BitReader;
#[doc = "Field `STIMENA17` writer - 17:17\\]
Bit mask to enable tracing on ITM stimulus port 17."]
pub type Stimena17W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA18` reader - 18:18\\]
Bit mask to enable tracing on ITM stimulus port 18."]
pub type Stimena18R = crate::BitReader;
#[doc = "Field `STIMENA18` writer - 18:18\\]
Bit mask to enable tracing on ITM stimulus port 18."]
pub type Stimena18W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA19` reader - 19:19\\]
Bit mask to enable tracing on ITM stimulus port 19."]
pub type Stimena19R = crate::BitReader;
#[doc = "Field `STIMENA19` writer - 19:19\\]
Bit mask to enable tracing on ITM stimulus port 19."]
pub type Stimena19W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA20` reader - 20:20\\]
Bit mask to enable tracing on ITM stimulus port 20."]
pub type Stimena20R = crate::BitReader;
#[doc = "Field `STIMENA20` writer - 20:20\\]
Bit mask to enable tracing on ITM stimulus port 20."]
pub type Stimena20W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA21` reader - 21:21\\]
Bit mask to enable tracing on ITM stimulus port 21."]
pub type Stimena21R = crate::BitReader;
#[doc = "Field `STIMENA21` writer - 21:21\\]
Bit mask to enable tracing on ITM stimulus port 21."]
pub type Stimena21W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA22` reader - 22:22\\]
Bit mask to enable tracing on ITM stimulus port 22."]
pub type Stimena22R = crate::BitReader;
#[doc = "Field `STIMENA22` writer - 22:22\\]
Bit mask to enable tracing on ITM stimulus port 22."]
pub type Stimena22W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA23` reader - 23:23\\]
Bit mask to enable tracing on ITM stimulus port 23."]
pub type Stimena23R = crate::BitReader;
#[doc = "Field `STIMENA23` writer - 23:23\\]
Bit mask to enable tracing on ITM stimulus port 23."]
pub type Stimena23W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA24` reader - 24:24\\]
Bit mask to enable tracing on ITM stimulus port 24."]
pub type Stimena24R = crate::BitReader;
#[doc = "Field `STIMENA24` writer - 24:24\\]
Bit mask to enable tracing on ITM stimulus port 24."]
pub type Stimena24W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA25` reader - 25:25\\]
Bit mask to enable tracing on ITM stimulus port 25."]
pub type Stimena25R = crate::BitReader;
#[doc = "Field `STIMENA25` writer - 25:25\\]
Bit mask to enable tracing on ITM stimulus port 25."]
pub type Stimena25W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA26` reader - 26:26\\]
Bit mask to enable tracing on ITM stimulus port 26."]
pub type Stimena26R = crate::BitReader;
#[doc = "Field `STIMENA26` writer - 26:26\\]
Bit mask to enable tracing on ITM stimulus port 26."]
pub type Stimena26W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA27` reader - 27:27\\]
Bit mask to enable tracing on ITM stimulus port 27."]
pub type Stimena27R = crate::BitReader;
#[doc = "Field `STIMENA27` writer - 27:27\\]
Bit mask to enable tracing on ITM stimulus port 27."]
pub type Stimena27W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA28` reader - 28:28\\]
Bit mask to enable tracing on ITM stimulus port 28."]
pub type Stimena28R = crate::BitReader;
#[doc = "Field `STIMENA28` writer - 28:28\\]
Bit mask to enable tracing on ITM stimulus port 28."]
pub type Stimena28W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA29` reader - 29:29\\]
Bit mask to enable tracing on ITM stimulus port 29."]
pub type Stimena29R = crate::BitReader;
#[doc = "Field `STIMENA29` writer - 29:29\\]
Bit mask to enable tracing on ITM stimulus port 29."]
pub type Stimena29W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA30` reader - 30:30\\]
Bit mask to enable tracing on ITM stimulus port 30."]
pub type Stimena30R = crate::BitReader;
#[doc = "Field `STIMENA30` writer - 30:30\\]
Bit mask to enable tracing on ITM stimulus port 30."]
pub type Stimena30W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STIMENA31` reader - 31:31\\]
Bit mask to enable tracing on ITM stimulus port 31."]
pub type Stimena31R = crate::BitReader;
#[doc = "Field `STIMENA31` writer - 31:31\\]
Bit mask to enable tracing on ITM stimulus port 31."]
pub type Stimena31W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - 0:0\\]
Bit mask to enable tracing on ITM stimulus port 0."]
#[inline(always)]
pub fn stimena0(&self) -> Stimena0R {
Stimena0R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - 1:1\\]
Bit mask to enable tracing on ITM stimulus port 1."]
#[inline(always)]
pub fn stimena1(&self) -> Stimena1R {
Stimena1R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - 2:2\\]
Bit mask to enable tracing on ITM stimulus port 2."]
#[inline(always)]
pub fn stimena2(&self) -> Stimena2R {
Stimena2R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - 3:3\\]
Bit mask to enable tracing on ITM stimulus port 3."]
#[inline(always)]
pub fn stimena3(&self) -> Stimena3R {
Stimena3R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - 4:4\\]
Bit mask to enable tracing on ITM stimulus port 4."]
#[inline(always)]
pub fn stimena4(&self) -> Stimena4R {
Stimena4R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 5 - 5:5\\]
Bit mask to enable tracing on ITM stimulus port 5."]
#[inline(always)]
pub fn stimena5(&self) -> Stimena5R {
Stimena5R::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 6 - 6:6\\]
Bit mask to enable tracing on ITM stimulus port 6."]
#[inline(always)]
pub fn stimena6(&self) -> Stimena6R {
Stimena6R::new(((self.bits >> 6) & 1) != 0)
}
#[doc = "Bit 7 - 7:7\\]
Bit mask to enable tracing on ITM stimulus port 7."]
#[inline(always)]
pub fn stimena7(&self) -> Stimena7R {
Stimena7R::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 8 - 8:8\\]
Bit mask to enable tracing on ITM stimulus port 8."]
#[inline(always)]
pub fn stimena8(&self) -> Stimena8R {
Stimena8R::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9 - 9:9\\]
Bit mask to enable tracing on ITM stimulus port 9."]
#[inline(always)]
pub fn stimena9(&self) -> Stimena9R {
Stimena9R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10 - 10:10\\]
Bit mask to enable tracing on ITM stimulus port 10."]
#[inline(always)]
pub fn stimena10(&self) -> Stimena10R {
Stimena10R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - 11:11\\]
Bit mask to enable tracing on ITM stimulus port 11."]
#[inline(always)]
pub fn stimena11(&self) -> Stimena11R {
Stimena11R::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 12 - 12:12\\]
Bit mask to enable tracing on ITM stimulus port 12."]
#[inline(always)]
pub fn stimena12(&self) -> Stimena12R {
Stimena12R::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 13 - 13:13\\]
Bit mask to enable tracing on ITM stimulus port 13."]
#[inline(always)]
pub fn stimena13(&self) -> Stimena13R {
Stimena13R::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bit 14 - 14:14\\]
Bit mask to enable tracing on ITM stimulus port 14."]
#[inline(always)]
pub fn stimena14(&self) -> Stimena14R {
Stimena14R::new(((self.bits >> 14) & 1) != 0)
}
#[doc = "Bit 15 - 15:15\\]
Bit mask to enable tracing on ITM stimulus port 15."]
#[inline(always)]
pub fn stimena15(&self) -> Stimena15R {
Stimena15R::new(((self.bits >> 15) & 1) != 0)
}
#[doc = "Bit 16 - 16:16\\]
Bit mask to enable tracing on ITM stimulus port 16."]
#[inline(always)]
pub fn stimena16(&self) -> Stimena16R {
Stimena16R::new(((self.bits >> 16) & 1) != 0)
}
#[doc = "Bit 17 - 17:17\\]
Bit mask to enable tracing on ITM stimulus port 17."]
#[inline(always)]
pub fn stimena17(&self) -> Stimena17R {
Stimena17R::new(((self.bits >> 17) & 1) != 0)
}
#[doc = "Bit 18 - 18:18\\]
Bit mask to enable tracing on ITM stimulus port 18."]
#[inline(always)]
pub fn stimena18(&self) -> Stimena18R {
Stimena18R::new(((self.bits >> 18) & 1) != 0)
}
#[doc = "Bit 19 - 19:19\\]
Bit mask to enable tracing on ITM stimulus port 19."]
#[inline(always)]
pub fn stimena19(&self) -> Stimena19R {
Stimena19R::new(((self.bits >> 19) & 1) != 0)
}
#[doc = "Bit 20 - 20:20\\]
Bit mask to enable tracing on ITM stimulus port 20."]
#[inline(always)]
pub fn stimena20(&self) -> Stimena20R {
Stimena20R::new(((self.bits >> 20) & 1) != 0)
}
#[doc = "Bit 21 - 21:21\\]
Bit mask to enable tracing on ITM stimulus port 21."]
#[inline(always)]
pub fn stimena21(&self) -> Stimena21R {
Stimena21R::new(((self.bits >> 21) & 1) != 0)
}
#[doc = "Bit 22 - 22:22\\]
Bit mask to enable tracing on ITM stimulus port 22."]
#[inline(always)]
pub fn stimena22(&self) -> Stimena22R {
Stimena22R::new(((self.bits >> 22) & 1) != 0)
}
#[doc = "Bit 23 - 23:23\\]
Bit mask to enable tracing on ITM stimulus port 23."]
#[inline(always)]
pub fn stimena23(&self) -> Stimena23R {
Stimena23R::new(((self.bits >> 23) & 1) != 0)
}
#[doc = "Bit 24 - 24:24\\]
Bit mask to enable tracing on ITM stimulus port 24."]
#[inline(always)]
pub fn stimena24(&self) -> Stimena24R {
Stimena24R::new(((self.bits >> 24) & 1) != 0)
}
#[doc = "Bit 25 - 25:25\\]
Bit mask to enable tracing on ITM stimulus port 25."]
#[inline(always)]
pub fn stimena25(&self) -> Stimena25R {
Stimena25R::new(((self.bits >> 25) & 1) != 0)
}
#[doc = "Bit 26 - 26:26\\]
Bit mask to enable tracing on ITM stimulus port 26."]
#[inline(always)]
pub fn stimena26(&self) -> Stimena26R {
Stimena26R::new(((self.bits >> 26) & 1) != 0)
}
#[doc = "Bit 27 - 27:27\\]
Bit mask to enable tracing on ITM stimulus port 27."]
#[inline(always)]
pub fn stimena27(&self) -> Stimena27R {
Stimena27R::new(((self.bits >> 27) & 1) != 0)
}
#[doc = "Bit 28 - 28:28\\]
Bit mask to enable tracing on ITM stimulus port 28."]
#[inline(always)]
pub fn stimena28(&self) -> Stimena28R {
Stimena28R::new(((self.bits >> 28) & 1) != 0)
}
#[doc = "Bit 29 - 29:29\\]
Bit mask to enable tracing on ITM stimulus port 29."]
#[inline(always)]
pub fn stimena29(&self) -> Stimena29R {
Stimena29R::new(((self.bits >> 29) & 1) != 0)
}
#[doc = "Bit 30 - 30:30\\]
Bit mask to enable tracing on ITM stimulus port 30."]
#[inline(always)]
pub fn stimena30(&self) -> Stimena30R {
Stimena30R::new(((self.bits >> 30) & 1) != 0)
}
#[doc = "Bit 31 - 31:31\\]
Bit mask to enable tracing on ITM stimulus port 31."]
#[inline(always)]
pub fn stimena31(&self) -> Stimena31R {
Stimena31R::new(((self.bits >> 31) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - 0:0\\]
Bit mask to enable tracing on ITM stimulus port 0."]
#[inline(always)]
#[must_use]
pub fn stimena0(&mut self) -> Stimena0W<TerSpec> {
Stimena0W::new(self, 0)
}
#[doc = "Bit 1 - 1:1\\]
Bit mask to enable tracing on ITM stimulus port 1."]
#[inline(always)]
#[must_use]
pub fn stimena1(&mut self) -> Stimena1W<TerSpec> {
Stimena1W::new(self, 1)
}
#[doc = "Bit 2 - 2:2\\]
Bit mask to enable tracing on ITM stimulus port 2."]
#[inline(always)]
#[must_use]
pub fn stimena2(&mut self) -> Stimena2W<TerSpec> {
Stimena2W::new(self, 2)
}
#[doc = "Bit 3 - 3:3\\]
Bit mask to enable tracing on ITM stimulus port 3."]
#[inline(always)]
#[must_use]
pub fn stimena3(&mut self) -> Stimena3W<TerSpec> {
Stimena3W::new(self, 3)
}
#[doc = "Bit 4 - 4:4\\]
Bit mask to enable tracing on ITM stimulus port 4."]
#[inline(always)]
#[must_use]
pub fn stimena4(&mut self) -> Stimena4W<TerSpec> {
Stimena4W::new(self, 4)
}
#[doc = "Bit 5 - 5:5\\]
Bit mask to enable tracing on ITM stimulus port 5."]
#[inline(always)]
#[must_use]
pub fn stimena5(&mut self) -> Stimena5W<TerSpec> {
Stimena5W::new(self, 5)
}
#[doc = "Bit 6 - 6:6\\]
Bit mask to enable tracing on ITM stimulus port 6."]
#[inline(always)]
#[must_use]
pub fn stimena6(&mut self) -> Stimena6W<TerSpec> {
Stimena6W::new(self, 6)
}
#[doc = "Bit 7 - 7:7\\]
Bit mask to enable tracing on ITM stimulus port 7."]
#[inline(always)]
#[must_use]
pub fn stimena7(&mut self) -> Stimena7W<TerSpec> {
Stimena7W::new(self, 7)
}
#[doc = "Bit 8 - 8:8\\]
Bit mask to enable tracing on ITM stimulus port 8."]
#[inline(always)]
#[must_use]
pub fn stimena8(&mut self) -> Stimena8W<TerSpec> {
Stimena8W::new(self, 8)
}
#[doc = "Bit 9 - 9:9\\]
Bit mask to enable tracing on ITM stimulus port 9."]
#[inline(always)]
#[must_use]
pub fn stimena9(&mut self) -> Stimena9W<TerSpec> {
Stimena9W::new(self, 9)
}
#[doc = "Bit 10 - 10:10\\]
Bit mask to enable tracing on ITM stimulus port 10."]
#[inline(always)]
#[must_use]
pub fn stimena10(&mut self) -> Stimena10W<TerSpec> {
Stimena10W::new(self, 10)
}
#[doc = "Bit 11 - 11:11\\]
Bit mask to enable tracing on ITM stimulus port 11."]
#[inline(always)]
#[must_use]
pub fn stimena11(&mut self) -> Stimena11W<TerSpec> {
Stimena11W::new(self, 11)
}
#[doc = "Bit 12 - 12:12\\]
Bit mask to enable tracing on ITM stimulus port 12."]
#[inline(always)]
#[must_use]
pub fn stimena12(&mut self) -> Stimena12W<TerSpec> {
Stimena12W::new(self, 12)
}
#[doc = "Bit 13 - 13:13\\]
Bit mask to enable tracing on ITM stimulus port 13."]
#[inline(always)]
#[must_use]
pub fn stimena13(&mut self) -> Stimena13W<TerSpec> {
Stimena13W::new(self, 13)
}
#[doc = "Bit 14 - 14:14\\]
Bit mask to enable tracing on ITM stimulus port 14."]
#[inline(always)]
#[must_use]
pub fn stimena14(&mut self) -> Stimena14W<TerSpec> {
Stimena14W::new(self, 14)
}
#[doc = "Bit 15 - 15:15\\]
Bit mask to enable tracing on ITM stimulus port 15."]
#[inline(always)]
#[must_use]
pub fn stimena15(&mut self) -> Stimena15W<TerSpec> {
Stimena15W::new(self, 15)
}
#[doc = "Bit 16 - 16:16\\]
Bit mask to enable tracing on ITM stimulus port 16."]
#[inline(always)]
#[must_use]
pub fn stimena16(&mut self) -> Stimena16W<TerSpec> {
Stimena16W::new(self, 16)
}
#[doc = "Bit 17 - 17:17\\]
Bit mask to enable tracing on ITM stimulus port 17."]
#[inline(always)]
#[must_use]
pub fn stimena17(&mut self) -> Stimena17W<TerSpec> {
Stimena17W::new(self, 17)
}
#[doc = "Bit 18 - 18:18\\]
Bit mask to enable tracing on ITM stimulus port 18."]
#[inline(always)]
#[must_use]
pub fn stimena18(&mut self) -> Stimena18W<TerSpec> {
Stimena18W::new(self, 18)
}
#[doc = "Bit 19 - 19:19\\]
Bit mask to enable tracing on ITM stimulus port 19."]
#[inline(always)]
#[must_use]
pub fn stimena19(&mut self) -> Stimena19W<TerSpec> {
Stimena19W::new(self, 19)
}
#[doc = "Bit 20 - 20:20\\]
Bit mask to enable tracing on ITM stimulus port 20."]
#[inline(always)]
#[must_use]
pub fn stimena20(&mut self) -> Stimena20W<TerSpec> {
Stimena20W::new(self, 20)
}
#[doc = "Bit 21 - 21:21\\]
Bit mask to enable tracing on ITM stimulus port 21."]
#[inline(always)]
#[must_use]
pub fn stimena21(&mut self) -> Stimena21W<TerSpec> {
Stimena21W::new(self, 21)
}
#[doc = "Bit 22 - 22:22\\]
Bit mask to enable tracing on ITM stimulus port 22."]
#[inline(always)]
#[must_use]
pub fn stimena22(&mut self) -> Stimena22W<TerSpec> {
Stimena22W::new(self, 22)
}
#[doc = "Bit 23 - 23:23\\]
Bit mask to enable tracing on ITM stimulus port 23."]
#[inline(always)]
#[must_use]
pub fn stimena23(&mut self) -> Stimena23W<TerSpec> {
Stimena23W::new(self, 23)
}
#[doc = "Bit 24 - 24:24\\]
Bit mask to enable tracing on ITM stimulus port 24."]
#[inline(always)]
#[must_use]
pub fn stimena24(&mut self) -> Stimena24W<TerSpec> {
Stimena24W::new(self, 24)
}
#[doc = "Bit 25 - 25:25\\]
Bit mask to enable tracing on ITM stimulus port 25."]
#[inline(always)]
#[must_use]
pub fn stimena25(&mut self) -> Stimena25W<TerSpec> {
Stimena25W::new(self, 25)
}
#[doc = "Bit 26 - 26:26\\]
Bit mask to enable tracing on ITM stimulus port 26."]
#[inline(always)]
#[must_use]
pub fn stimena26(&mut self) -> Stimena26W<TerSpec> {
Stimena26W::new(self, 26)
}
#[doc = "Bit 27 - 27:27\\]
Bit mask to enable tracing on ITM stimulus port 27."]
#[inline(always)]
#[must_use]
pub fn stimena27(&mut self) -> Stimena27W<TerSpec> {
Stimena27W::new(self, 27)
}
#[doc = "Bit 28 - 28:28\\]
Bit mask to enable tracing on ITM stimulus port 28."]
#[inline(always)]
#[must_use]
pub fn stimena28(&mut self) -> Stimena28W<TerSpec> {
Stimena28W::new(self, 28)
}
#[doc = "Bit 29 - 29:29\\]
Bit mask to enable tracing on ITM stimulus port 29."]
#[inline(always)]
#[must_use]
pub fn stimena29(&mut self) -> Stimena29W<TerSpec> {
Stimena29W::new(self, 29)
}
#[doc = "Bit 30 - 30:30\\]
Bit mask to enable tracing on ITM stimulus port 30."]
#[inline(always)]
#[must_use]
pub fn stimena30(&mut self) -> Stimena30W<TerSpec> {
Stimena30W::new(self, 30)
}
#[doc = "Bit 31 - 31:31\\]
Bit mask to enable tracing on ITM stimulus port 31."]
#[inline(always)]
#[must_use]
pub fn stimena31(&mut self) -> Stimena31W<TerSpec> {
Stimena31W::new(self, 31)
}
}
#[doc = "Trace Enable Use the Trace Enable Register to generate trace data by writing to the corresponding stimulus port. Note: Privileged writes are accepted to this register if TCR.ITMENA is set. User writes are accepted to this register if TCR.ITMENA is set and the appropriate privilege mask is cleared. Privileged access to the stimulus ports enables an RTOS kernel to guarantee instrumentation slots or bandwidth as required.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ter::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ter::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct TerSpec;
impl crate::RegisterSpec for TerSpec {
type Ux = u32;
}
#[doc = "`read()` method returns [`ter::R`](R) reader structure"]
impl crate::Readable for TerSpec {}
#[doc = "`write(|w| ..)` method takes [`ter::W`](W) writer structure"]
impl crate::Writable for TerSpec {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets TER to value 0"]
impl crate::Resettable for TerSpec {
const RESET_VALUE: u32 = 0;
}