capstone_git/arch/
mos65xx.rs

1//! Contains mos65xx-specific types
2
3use core::convert::From;
4use core::{fmt, slice};
5
6pub use capstone_sys::mos65xx_insn as Mos65xxInsn;
7pub use capstone_sys::mos65xx_reg as Mos65xxReg;
8use capstone_sys::{cs_mos65xx, cs_mos65xx_op, mos65xx_op_type};
9
10pub use crate::arch::arch_builder::mos65xx::*;
11use crate::arch::DetailsArchInsn;
12use crate::instruction::{RegId, RegIdInt};
13
14/// Contains mos65xx-specific details for an instruction
15pub struct Mos65xxInsnDetail<'a>(pub(crate) &'a cs_mos65xx);
16
17impl_PartialEq_repr_fields!(Mos65xxInsnDetail<'a> [ 'a ];
18    operands
19);
20
21/// mos65xx operand
22#[derive(Clone, Debug, Eq, PartialEq)]
23pub enum Mos65xxOperand {
24    /// Register
25    Reg(RegId),
26
27    /// Immediate
28    Imm(u16),
29
30    /// Memory
31    Mem(u32),
32
33    /// Invalid
34    Invalid,
35}
36
37impl Default for Mos65xxOperand {
38    fn default() -> Self {
39        Mos65xxOperand::Invalid
40    }
41}
42
43impl From<&cs_mos65xx_op> for Mos65xxOperand {
44    fn from(insn: &cs_mos65xx_op) -> Mos65xxOperand {
45        match insn.type_ {
46            mos65xx_op_type::MOS65XX_OP_REG => {
47                Mos65xxOperand::Reg(RegId(unsafe { insn.__bindgen_anon_1.reg } as RegIdInt))
48            }
49            mos65xx_op_type::MOS65XX_OP_IMM => {
50                Mos65xxOperand::Imm(unsafe { insn.__bindgen_anon_1.imm })
51            }
52            mos65xx_op_type::MOS65XX_OP_MEM => {
53                Mos65xxOperand::Mem(unsafe { insn.__bindgen_anon_1.mem })
54            }
55            mos65xx_op_type::MOS65XX_OP_INVALID => Mos65xxOperand::Invalid,
56        }
57    }
58}
59
60def_arch_details_struct!(
61    InsnDetail = Mos65xxInsnDetail;
62    Operand = Mos65xxOperand;
63    OperandIterator = Mos65xxOperandIterator;
64    OperandIteratorLife = Mos65xxOperandIterator<'a>;
65    [ pub struct Mos65xxOperandIterator<'a>(slice::Iter<'a, cs_mos65xx_op>); ]
66    cs_arch_op = cs_mos65xx_op;
67    cs_arch = cs_mos65xx;
68);