calyx 0.7.1

Compiler Infrastructure for Hardware Accelerator Generation
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

{
  "x": {
    "data": [[1, 2, 3, 4], [2, 4, 6, 8]],
    "format": {
      "numeric_type": "bitnum",
      "is_signed": true,
      "width": 32
    }
  },
  "y": {
    "data": [[4, 8, 16, 32], [3, 6, 9, 12]],
    "format": {
      "numeric_type": "bitnum",
      "is_signed": true,
      "width": 32
    }
  },
  "x1": {
    "data": [[0, 0, 0, 0], [0, 0, 0, 0]],
    "format": {
      "numeric_type": "bitnum",
      "is_signed": true,
      "width": 32
    }
  }
}