calyx 0.7.1

Compiler Infrastructure for Hardware Accelerator Generation
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import "primitives/compile.futil";
import "primitives/core.futil";
import "primitives/memories/comb.futil"\rimport "primitives/memories/comb.futil";

component main() -> () {
    cells {
        @external r = std_reg(32);
        @external mem = comb_mem_d1(32, 1, 1);
        w = std_wire(0);
        add = std_add(32);
    }
    wires {
       add.left = 32'd1;
       add.right = r.out;
    }
    control {
        invoke r(in=add.out)();
    }
}